86301e23d7eacef32a7c657aea50bab4f1756b54
[mesa.git] / src / gallium / drivers / r300 / r300_state_derived.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28
29 #include "r300_context.h"
30 #include "r300_fs.h"
31 #include "r300_screen.h"
32 #include "r300_shader_semantics.h"
33 #include "r300_state_derived.h"
34 #include "r300_state_inlines.h"
35 #include "r300_vs.h"
36
37 /* r300_state_derived: Various bits of state which are dependent upon
38 * currently bound CSO data. */
39
40 static void r300_draw_emit_attrib(struct r300_context* r300,
41 enum attrib_emit emit,
42 enum interp_mode interp,
43 int index)
44 {
45 struct r300_vertex_shader* vs = r300->vs_state.state;
46 struct tgsi_shader_info* info = &vs->info;
47 int output;
48
49 output = draw_find_shader_output(r300->draw,
50 info->output_semantic_name[index],
51 info->output_semantic_index[index]);
52 draw_emit_vertex_attr(
53 (struct vertex_info*)r300->vertex_format_state.state,
54 emit, interp, output);
55 }
56
57 static void r300_draw_emit_all_attribs(struct r300_context* r300)
58 {
59 struct r300_vertex_shader* vs = r300->vs_state.state;
60 struct r300_shader_semantics* vs_outputs = &vs->outputs;
61 int i, gen_count;
62
63 /* Position. */
64 if (vs_outputs->pos != ATTR_UNUSED) {
65 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
66 vs_outputs->pos);
67 } else {
68 assert(0);
69 }
70
71 /* Point size. */
72 if (vs_outputs->psize != ATTR_UNUSED) {
73 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
74 vs_outputs->psize);
75 }
76
77 /* Colors. */
78 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
79 if (vs_outputs->color[i] != ATTR_UNUSED) {
80 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
81 vs_outputs->color[i]);
82 }
83 }
84
85 /* XXX Back-face colors. */
86
87 /* Texture coordinates. */
88 gen_count = 0;
89 for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
90 if (vs_outputs->generic[i] != ATTR_UNUSED) {
91 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
92 vs_outputs->generic[i]);
93 gen_count++;
94 }
95 }
96
97 /* Fog coordinates. */
98 if (vs_outputs->fog != ATTR_UNUSED) {
99 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
100 vs_outputs->fog);
101 gen_count++;
102 }
103
104 /* XXX magic */
105 assert(gen_count <= 8);
106 }
107
108 /* Update the PSC tables. */
109 static void r300_vertex_psc(struct r300_context* r300)
110 {
111 struct r300_vertex_shader* vs = r300->vs_state.state;
112 struct r300_vertex_info *vformat =
113 (struct r300_vertex_info*)r300->vertex_format_state.state;
114 uint16_t type, swizzle;
115 enum pipe_format format;
116 unsigned i;
117 int identity[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
118 int* stream_tab;
119
120 /* If TCL is bypassed, map vertex streams to equivalent VS output
121 * locations. */
122 if (r300->tcl_bypass) {
123 stream_tab = vs->stream_loc_notcl;
124 } else {
125 stream_tab = identity;
126 }
127
128 /* Vertex shaders have no semantics on their inputs,
129 * so PSC should just route stuff based on the vertex elements,
130 * and not on attrib information. */
131 DBG(r300, DBG_DRAW, "r300: vs expects %d attribs, routing %d elements"
132 " in psc\n",
133 vs->info.num_inputs,
134 r300->vertex_element_count);
135
136 for (i = 0; i < r300->vertex_element_count; i++) {
137 format = r300->vertex_element[i].src_format;
138
139 type = r300_translate_vertex_data_type(format) |
140 (stream_tab[i] << R300_DST_VEC_LOC_SHIFT);
141 swizzle = r300_translate_vertex_data_swizzle(format);
142
143 if (i & 1) {
144 vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
145 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
146 } else {
147 vformat->vap_prog_stream_cntl[i >> 1] |= type;
148 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
149 }
150 }
151
152 assert(i <= 15);
153
154 /* Set the last vector in the PSC. */
155 if (i) {
156 i -= 1;
157 }
158 vformat->vap_prog_stream_cntl[i >> 1] |=
159 (R300_LAST_VEC << (i & 1 ? 16 : 0));
160 }
161
162 /* Update the PSC tables for SW TCL, using Draw. */
163 static void r300_swtcl_vertex_psc(struct r300_context* r300)
164 {
165 struct r300_vertex_shader* vs = r300->vs_state.state;
166 struct r300_vertex_info *vformat =
167 (struct r300_vertex_info*)r300->vertex_format_state.state;
168 struct vertex_info* vinfo = &vformat->vinfo;
169 uint16_t type, swizzle;
170 enum pipe_format format;
171 unsigned i, attrib_count;
172 int* vs_output_tab = vs->stream_loc_notcl;
173
174 /* For each Draw attribute, route it to the fragment shader according
175 * to the vs_output_tab. */
176 attrib_count = vinfo->num_attribs;
177 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
178 for (i = 0; i < attrib_count; i++) {
179 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
180 " vs_output_tab %d\n", vinfo->attrib[i].src_index,
181 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
182 vs_output_tab[i]);
183 }
184
185 for (i = 0; i < attrib_count; i++) {
186 /* Make sure we have a proper destination for our attribute. */
187 assert(vs_output_tab[i] != -1);
188
189 format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
190
191 /* Obtain the type of data in this attribute. */
192 type = r300_translate_vertex_data_type(format) |
193 vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
194
195 /* Obtain the swizzle for this attribute. Note that the default
196 * swizzle in the hardware is not XYZW! */
197 swizzle = r300_translate_vertex_data_swizzle(format);
198
199 /* Add the attribute to the PSC table. */
200 if (i & 1) {
201 vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
202 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
203 } else {
204 vformat->vap_prog_stream_cntl[i >> 1] |= type;
205 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
206 }
207 }
208
209 /* Set the last vector in the PSC. */
210 if (i) {
211 i -= 1;
212 }
213 vformat->vap_prog_stream_cntl[i >> 1] |=
214 (R300_LAST_VEC << (i & 1 ? 16 : 0));
215 }
216
217 static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
218 boolean swizzle_0001)
219 {
220 rs->ip[id] |= R300_RS_COL_PTR(ptr);
221 if (swizzle_0001) {
222 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
223 } else {
224 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
225 }
226 rs->inst[id] |= R300_RS_INST_COL_ID(id);
227 }
228
229 static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
230 {
231 rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
232 R300_RS_INST_COL_ADDR(fp_offset);
233 }
234
235 static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
236 boolean swizzle_X001)
237 {
238 if (swizzle_X001) {
239 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
240 R300_RS_SEL_S(R300_RS_SEL_C0) |
241 R300_RS_SEL_T(R300_RS_SEL_K0) |
242 R300_RS_SEL_R(R300_RS_SEL_K0) |
243 R300_RS_SEL_Q(R300_RS_SEL_K1);
244 } else {
245 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
246 R300_RS_SEL_S(R300_RS_SEL_C0) |
247 R300_RS_SEL_T(R300_RS_SEL_C1) |
248 R300_RS_SEL_R(R300_RS_SEL_C2) |
249 R300_RS_SEL_Q(R300_RS_SEL_C3);
250 }
251 rs->inst[id] |= R300_RS_INST_TEX_ID(id);
252 }
253
254 static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
255 {
256 rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
257 R300_RS_INST_TEX_ADDR(fp_offset);
258 }
259
260 static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
261 boolean swizzle_0001)
262 {
263 rs->ip[id] |= R500_RS_COL_PTR(ptr);
264 if (swizzle_0001) {
265 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
266 } else {
267 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
268 }
269 rs->inst[id] |= R500_RS_INST_COL_ID(id);
270 }
271
272 static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
273 {
274 rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
275 R500_RS_INST_COL_ADDR(fp_offset);
276 }
277
278 static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
279 boolean swizzle_X001)
280 {
281 int rs_tex_comp = ptr*4;
282
283 if (swizzle_X001) {
284 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
285 R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
286 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
287 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
288 } else {
289 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
290 R500_RS_SEL_T(rs_tex_comp + 1) |
291 R500_RS_SEL_R(rs_tex_comp + 2) |
292 R500_RS_SEL_Q(rs_tex_comp + 3);
293 }
294 rs->inst[id] |= R500_RS_INST_TEX_ID(id);
295 }
296
297 static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
298 {
299 rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
300 R500_RS_INST_TEX_ADDR(fp_offset);
301 }
302
303 /* Set up the RS block.
304 *
305 * This is the part of the chipset that actually does the rasterization
306 * of vertices into fragments. This is also the part of the chipset that
307 * locks up if any part of it is even slightly wrong. */
308 static void r300_update_rs_block(struct r300_context* r300,
309 struct r300_shader_semantics* vs_outputs,
310 struct r300_shader_semantics* fs_inputs)
311 {
312 struct r300_rs_block rs = { { 0 } };
313 int i, col_count = 0, tex_count = 0, fp_offset = 0, count;
314 void (*rX00_rs_col)(struct r300_rs_block*, int, int, boolean);
315 void (*rX00_rs_col_write)(struct r300_rs_block*, int, int);
316 void (*rX00_rs_tex)(struct r300_rs_block*, int, int, boolean);
317 void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
318 boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED ||
319 vs_outputs->bcolor[1] != ATTR_UNUSED;
320
321 if (r300_screen(r300->context.screen)->caps->is_r500) {
322 rX00_rs_col = r500_rs_col;
323 rX00_rs_col_write = r500_rs_col_write;
324 rX00_rs_tex = r500_rs_tex;
325 rX00_rs_tex_write = r500_rs_tex_write;
326 } else {
327 rX00_rs_col = r300_rs_col;
328 rX00_rs_col_write = r300_rs_col_write;
329 rX00_rs_tex = r300_rs_tex;
330 rX00_rs_tex_write = r300_rs_tex_write;
331 }
332
333 /* Rasterize colors. */
334 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
335 if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used ||
336 vs_outputs->color[1] != ATTR_UNUSED) {
337 /* Always rasterize if it's written by the VS,
338 * otherwise it locks up. */
339 rX00_rs_col(&rs, col_count, i, FALSE);
340
341 /* Write it to the FS input register if it's used by the FS. */
342 if (fs_inputs->color[i] != ATTR_UNUSED) {
343 rX00_rs_col_write(&rs, col_count, fp_offset);
344 fp_offset++;
345 }
346 col_count++;
347 } else {
348 /* Skip the FS input register, leave it uninitialized. */
349 /* If we try to set it to (0,0,0,1), it will lock up. */
350 if (fs_inputs->color[i] != ATTR_UNUSED) {
351 fp_offset++;
352 }
353 }
354 }
355
356 /* Rasterize texture coordinates. */
357 for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
358 if (vs_outputs->generic[i] != ATTR_UNUSED) {
359 /* Always rasterize if it's written by the VS,
360 * otherwise it locks up. */
361 rX00_rs_tex(&rs, tex_count, tex_count, FALSE);
362
363 /* Write it to the FS input register if it's used by the FS. */
364 if (fs_inputs->generic[i] != ATTR_UNUSED) {
365 rX00_rs_tex_write(&rs, tex_count, fp_offset);
366 fp_offset++;
367 }
368 tex_count++;
369 } else {
370 /* Skip the FS input register, leave it uninitialized. */
371 /* If we try to set it to (0,0,0,1), it will lock up. */
372 if (fs_inputs->generic[i] != ATTR_UNUSED) {
373 fp_offset++;
374 }
375 }
376 }
377
378 /* Rasterize fog coordinates. */
379 if (vs_outputs->fog != ATTR_UNUSED) {
380 /* Always rasterize if it's written by the VS,
381 * otherwise it locks up. */
382 rX00_rs_tex(&rs, tex_count, tex_count, TRUE);
383
384 /* Write it to the FS input register if it's used by the FS. */
385 if (fs_inputs->fog != ATTR_UNUSED) {
386 rX00_rs_tex_write(&rs, tex_count, fp_offset);
387 fp_offset++;
388 }
389 tex_count++;
390 } else {
391 /* Skip the FS input register, leave it uninitialized. */
392 /* If we try to set it to (0,0,0,1), it will lock up. */
393 if (fs_inputs->fog != ATTR_UNUSED) {
394 fp_offset++;
395 }
396 }
397
398 /* Rasterize WPOS. */
399 /* If the FS doesn't need it, it's not written by the VS. */
400 if (fs_inputs->wpos != ATTR_UNUSED) {
401 rX00_rs_tex(&rs, tex_count, tex_count, FALSE);
402 rX00_rs_tex_write(&rs, tex_count, fp_offset);
403
404 fp_offset++;
405 tex_count++;
406 }
407
408 /* Rasterize at least one color, or bad things happen. */
409 if (col_count == 0 && tex_count == 0) {
410 rX00_rs_col(&rs, 0, 0, TRUE);
411 col_count++;
412 }
413
414 rs.count = (tex_count*4) | (col_count << R300_IC_COUNT_SHIFT) |
415 R300_HIRES_EN;
416
417 count = MAX3(col_count, tex_count, 1);
418 rs.inst_count = count - 1;
419
420 /* Now, after all that, see if we actually need to update the state. */
421 if (memcmp(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block))) {
422 memcpy(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block));
423 r300->rs_block_state.size = 5 + count*2;
424 r300->rs_block_state.dirty = TRUE;
425 }
426 }
427
428 /* Update the shader-dependant states. */
429 static void r300_update_derived_shader_state(struct r300_context* r300)
430 {
431 struct r300_vertex_shader* vs = r300->vs_state.state;
432 struct r300_screen* r300screen = r300_screen(r300->context.screen);
433 struct r300_vertex_info *vformat =
434 (struct r300_vertex_info*)r300->vertex_format_state.state;
435 struct vertex_info* vinfo = &vformat->vinfo;
436
437 /* Mmm, delicious hax */
438 memset(r300->vertex_format_state.state, 0, sizeof(struct r300_vertex_info));
439 memcpy(vinfo->hwfmt, vs->hwfmt, sizeof(uint)*4);
440
441 r300_update_rs_block(r300, &vs->outputs, &r300->fs->inputs);
442
443 if (r300screen->caps->has_tcl) {
444 r300_vertex_psc(r300);
445 } else {
446 r300_draw_emit_all_attribs(r300);
447 draw_compute_vertex_size(
448 (struct vertex_info*)r300->vertex_format_state.state);
449 r300_swtcl_vertex_psc(r300);
450 }
451 }
452
453 static boolean r300_dsa_writes_depth_stencil(struct r300_dsa_state* dsa)
454 {
455 /* We are interested only in the cases when a new depth or stencil value
456 * can be written and changed. */
457
458 /* We might optionally check for [Z func: never] and inspect the stencil
459 * state in a similar fashion, but it's not terribly important. */
460 return (dsa->z_buffer_control & R300_Z_WRITE_ENABLE) ||
461 (dsa->stencil_ref_mask & R300_STENCILWRITEMASK_MASK) ||
462 ((dsa->z_buffer_control & R500_STENCIL_REFMASK_FRONT_BACK) &&
463 (dsa->stencil_ref_bf & R300_STENCILWRITEMASK_MASK));
464 }
465
466 static boolean r300_dsa_alpha_test_enabled(struct r300_dsa_state* dsa)
467 {
468 /* We are interested only in the cases when alpha testing can kill
469 * a fragment. */
470 uint32_t af = dsa->alpha_function;
471
472 return (af & R300_FG_ALPHA_FUNC_ENABLE) &&
473 (af & R300_FG_ALPHA_FUNC_ALWAYS) != R300_FG_ALPHA_FUNC_ALWAYS;
474 }
475
476 static void r300_update_ztop(struct r300_context* r300)
477 {
478 struct r300_ztop_state* ztop_state =
479 (struct r300_ztop_state*)r300->ztop_state.state;
480
481 /* This is important enough that I felt it warranted a comment.
482 *
483 * According to the docs, these are the conditions where ZTOP must be
484 * disabled:
485 * 1) Alpha testing enabled
486 * 2) Texture kill instructions in fragment shader
487 * 3) Chroma key culling enabled
488 * 4) W-buffering enabled
489 *
490 * The docs claim that for the first three cases, if no ZS writes happen,
491 * then ZTOP can be used.
492 *
493 * (3) will never apply since we do not support chroma-keyed operations.
494 * (4) will need to be re-examined (and this comment updated) if/when
495 * Hyper-Z becomes supported.
496 *
497 * Additionally, the following conditions require disabled ZTOP:
498 * 5) Depth writes in fragment shader
499 * 6) Outstanding occlusion queries
500 *
501 * This register causes stalls all the way from SC to CB when changed,
502 * but it is buffered on-chip so it does not hurt to write it if it has
503 * not changed.
504 *
505 * ~C.
506 */
507
508 /* ZS writes */
509 if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) &&
510 (r300_dsa_alpha_test_enabled(r300->dsa_state.state) ||/* (1) */
511 r300->fs->info.uses_kill)) { /* (2) */
512 ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
513 } else if (r300_fragment_shader_writes_depth(r300->fs)) { /* (5) */
514 ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
515 } else if (r300->query_current) { /* (6) */
516 ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
517 } else {
518 ztop_state->z_buffer_top = R300_ZTOP_ENABLE;
519 }
520
521 r300->ztop_state.dirty = TRUE;
522 }
523
524 void r300_update_derived_state(struct r300_context* r300)
525 {
526 /* XXX */
527 if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER ||
528 r300->vs_state.dirty || r300->vertex_format_state.dirty ||
529 r300->rs_state.dirty) {
530 r300_update_derived_shader_state(r300);
531 }
532
533 r300_update_ztop(r300);
534 }