2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
29 #include "r300_context.h"
31 #include "r300_hyperz.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state.h"
35 #include "r300_state_derived.h"
36 #include "r300_state_inlines.h"
37 #include "r300_texture.h"
40 /* r300_state_derived: Various bits of state which are dependent upon
41 * currently bound CSO data. */
43 enum r300_rs_swizzle
{
50 static void r300_draw_emit_attrib(struct r300_context
* r300
,
51 enum attrib_emit emit
,
52 enum interp_mode interp
,
55 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
56 struct tgsi_shader_info
* info
= &vs
->info
;
59 output
= draw_find_shader_output(r300
->draw
,
60 info
->output_semantic_name
[index
],
61 info
->output_semantic_index
[index
]);
62 draw_emit_vertex_attr(&r300
->vertex_info
, emit
, interp
, output
);
65 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
67 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
68 struct r300_shader_semantics
* vs_outputs
= &vs
->outputs
;
72 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
73 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
80 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
81 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
86 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
87 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
88 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
89 vs_outputs
->color
[i
]);
93 /* Back-face colors. */
94 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
95 if (vs_outputs
->bcolor
[i
] != ATTR_UNUSED
) {
96 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
97 vs_outputs
->bcolor
[i
]);
101 /* Texture coordinates. */
102 /* Only 8 generic vertex attributes can be used. If there are more,
103 * they won't be rasterized. */
105 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& gen_count
< 8; i
++) {
106 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
107 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
108 vs_outputs
->generic
[i
]);
113 /* Fog coordinates. */
114 if (gen_count
< 8 && vs_outputs
->fog
!= ATTR_UNUSED
) {
115 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
121 if (r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
&& gen_count
< 8) {
122 DBG(r300
, DBG_DRAW
, "draw_emit_attrib: WPOS, index: %i\n",
124 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
129 /* Update the PSC tables for SW TCL, using Draw. */
130 static void r300_swtcl_vertex_psc(struct r300_context
*r300
)
132 struct r300_vertex_stream_state
*vstream
= r300
->vertex_stream_state
.state
;
133 struct vertex_info
*vinfo
= &r300
->vertex_info
;
134 uint16_t type
, swizzle
;
135 enum pipe_format format
;
136 unsigned i
, attrib_count
;
137 int* vs_output_tab
= r300
->stream_loc_notcl
;
139 memset(vstream
, 0, sizeof(struct r300_vertex_stream_state
));
141 /* For each Draw attribute, route it to the fragment shader according
142 * to the vs_output_tab. */
143 attrib_count
= vinfo
->num_attribs
;
144 DBG(r300
, DBG_DRAW
, "r300: attrib count: %d\n", attrib_count
);
145 for (i
= 0; i
< attrib_count
; i
++) {
146 DBG(r300
, DBG_DRAW
, "r300: attrib: index %d, interp %d, emit %d,"
147 " vs_output_tab %d\n", vinfo
->attrib
[i
].src_index
,
148 vinfo
->attrib
[i
].interp_mode
, vinfo
->attrib
[i
].emit
,
151 /* Make sure we have a proper destination for our attribute. */
152 assert(vs_output_tab
[i
] != -1);
154 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
156 /* Obtain the type of data in this attribute. */
157 type
= r300_translate_vertex_data_type(format
);
158 if (type
== R300_INVALID_FORMAT
) {
159 fprintf(stderr
, "r300: Bad vertex format %s.\n",
160 util_format_short_name(format
));
165 type
|= vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
167 /* Obtain the swizzle for this attribute. Note that the default
168 * swizzle in the hardware is not XYZW! */
169 swizzle
= r300_translate_vertex_data_swizzle(format
);
171 /* Add the attribute to the PSC table. */
173 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
174 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
176 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
177 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
181 /* Set the last vector in the PSC. */
185 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
186 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
188 vstream
->count
= (i
>> 1) + 1;
189 r300
->vertex_stream_state
.dirty
= TRUE
;
190 r300
->vertex_stream_state
.size
= (1 + vstream
->count
) * 2;
193 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
194 enum r300_rs_swizzle swiz
)
196 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
197 if (swiz
== SWIZ_0001
) {
198 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
200 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
202 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
205 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
207 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
208 R300_RS_INST_COL_ADDR(fp_offset
);
211 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
212 enum r300_rs_swizzle swiz
)
214 if (swiz
== SWIZ_X001
) {
215 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
216 R300_RS_SEL_S(R300_RS_SEL_C0
) |
217 R300_RS_SEL_T(R300_RS_SEL_K0
) |
218 R300_RS_SEL_R(R300_RS_SEL_K0
) |
219 R300_RS_SEL_Q(R300_RS_SEL_K1
);
220 } else if (swiz
== SWIZ_XY01
) {
221 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
222 R300_RS_SEL_S(R300_RS_SEL_C0
) |
223 R300_RS_SEL_T(R300_RS_SEL_C1
) |
224 R300_RS_SEL_R(R300_RS_SEL_K0
) |
225 R300_RS_SEL_Q(R300_RS_SEL_K1
);
227 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
228 R300_RS_SEL_S(R300_RS_SEL_C0
) |
229 R300_RS_SEL_T(R300_RS_SEL_C1
) |
230 R300_RS_SEL_R(R300_RS_SEL_C2
) |
231 R300_RS_SEL_Q(R300_RS_SEL_C3
);
233 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
236 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
238 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
239 R300_RS_INST_TEX_ADDR(fp_offset
);
242 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
243 enum r300_rs_swizzle swiz
)
245 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
246 if (swiz
== SWIZ_0001
) {
247 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
249 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
251 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
254 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
256 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
257 R500_RS_INST_COL_ADDR(fp_offset
);
260 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
261 enum r300_rs_swizzle swiz
)
263 int rs_tex_comp
= ptr
*4;
265 if (swiz
== SWIZ_X001
) {
266 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
267 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
268 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
269 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
270 } else if (swiz
== SWIZ_XY01
) {
271 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
272 R500_RS_SEL_T(rs_tex_comp
+ 1) |
273 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
274 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
276 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
277 R500_RS_SEL_T(rs_tex_comp
+ 1) |
278 R500_RS_SEL_R(rs_tex_comp
+ 2) |
279 R500_RS_SEL_Q(rs_tex_comp
+ 3);
281 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
284 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
286 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
287 R500_RS_INST_TEX_ADDR(fp_offset
);
290 /* Set up the RS block.
292 * This is the part of the chipset that is responsible for linking vertex
293 * and fragment shaders and stuffed texture coordinates.
295 * The rasterizer reads data from VAP, which produces vertex shader outputs,
296 * and GA, which produces stuffed texture coordinates. VAP outputs have
297 * precedence over GA. All outputs must be rasterized otherwise it locks up.
298 * If there are more outputs rasterized than is set in VAP/GA, it locks up
299 * too. The funky part is that this info has been pretty much obtained by trial
301 static void r300_update_rs_block(struct r300_context
*r300
)
303 struct r300_vertex_shader
*vs
= r300
->vs_state
.state
;
304 struct r300_shader_semantics
*vs_outputs
= &vs
->outputs
;
305 struct r300_shader_semantics
*fs_inputs
= &r300_fs(r300
)->shader
->inputs
;
306 struct r300_rs_block rs
= {0};
307 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0, count
, loc
= 0;
308 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
309 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int);
310 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
311 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
312 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
313 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
314 int *stream_loc_notcl
= r300
->stream_loc_notcl
;
316 if (r300
->screen
->caps
.is_r500
) {
317 rX00_rs_col
= r500_rs_col
;
318 rX00_rs_col_write
= r500_rs_col_write
;
319 rX00_rs_tex
= r500_rs_tex
;
320 rX00_rs_tex_write
= r500_rs_tex_write
;
322 rX00_rs_col
= r300_rs_col
;
323 rX00_rs_col_write
= r300_rs_col_write
;
324 rX00_rs_tex
= r300_rs_tex
;
325 rX00_rs_tex_write
= r300_rs_tex_write
;
328 /* The position is always present in VAP. */
329 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_POS
;
330 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
;
331 stream_loc_notcl
[loc
++] = 0;
333 /* Set up the point size in VAP. */
334 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
335 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT
;
336 stream_loc_notcl
[loc
++] = 1;
339 /* Set up and rasterize colors. */
340 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
341 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
342 vs_outputs
->color
[1] != ATTR_UNUSED
) {
343 /* Set up the color in VAP. */
344 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
345 rs
.vap_out_vtx_fmt
[0] |=
346 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< i
;
347 stream_loc_notcl
[loc
++] = 2 + i
;
350 rX00_rs_col(&rs
, col_count
, col_count
, SWIZ_XYZW
);
352 /* Write it to the FS input register if it's needed by the FS. */
353 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
354 rX00_rs_col_write(&rs
, col_count
, fp_offset
);
358 "r300: Rasterized color %i written to FS.\n", i
);
360 DBG(r300
, DBG_RS
, "r300: Rasterized color %i unused.\n", i
);
364 /* Skip the FS input register, leave it uninitialized. */
365 /* If we try to set it to (0,0,0,1), it will lock up. */
366 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
369 DBG(r300
, DBG_RS
, "r300: FS input color %i unassigned%s.\n",
375 /* Set up back-face colors. The rasterizer will do the color selection
377 if (any_bcolor_used
) {
378 if (r300
->two_sided_color
) {
379 /* Rasterize as back-face colors. */
380 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
381 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
382 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< (2+i
);
383 stream_loc_notcl
[loc
++] = 4 + i
;
386 /* Rasterize two fake texcoords to prevent from the two-sided color
388 /* XXX Consider recompiling the vertex shader to save 2 RS units. */
389 for (i
= 0; i
< 2; i
++) {
390 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
391 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
392 stream_loc_notcl
[loc
++] = 6 + tex_count
;
395 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_XYZW
);
401 /* Rasterize texture coordinates. */
402 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& tex_count
< 8; i
++) {
403 bool sprite_coord
= !!(r300
->sprite_coord_enable
& (1 << i
));
405 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
|| sprite_coord
) {
407 /* Set up the texture coordinates in VAP. */
408 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
409 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
410 stream_loc_notcl
[loc
++] = 6 + tex_count
;
414 rX00_rs_tex(&rs
, tex_count
, tex_count
,
415 sprite_coord
? SWIZ_XY01
: SWIZ_XYZW
);
417 /* Write it to the FS input register if it's needed by the FS. */
418 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
419 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
423 "r300: Rasterized generic %i written to FS%s.\n",
424 i
, sprite_coord
? " (sprite coord)" : "");
427 "r300: Rasterized generic %i unused%s.\n",
428 i
, sprite_coord
? " (sprite coord)" : "");
432 /* Skip the FS input register, leave it uninitialized. */
433 /* If we try to set it to (0,0,0,1), it will lock up. */
434 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
437 DBG(r300
, DBG_RS
, "r300: FS input generic %i unassigned%s.\n",
438 i
, sprite_coord
? " (sprite coord)" : "");
443 /* Rasterize fog coordinates. */
444 if (vs_outputs
->fog
!= ATTR_UNUSED
&& tex_count
< 8) {
445 /* Set up the fog coordinates in VAP. */
446 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
447 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
448 stream_loc_notcl
[loc
++] = 6 + tex_count
;
451 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_X001
);
453 /* Write it to the FS input register if it's needed by the FS. */
454 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
455 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
458 DBG(r300
, DBG_RS
, "r300: Rasterized fog written to FS.\n");
460 DBG(r300
, DBG_RS
, "r300: Rasterized fog unused.\n");
464 /* Skip the FS input register, leave it uninitialized. */
465 /* If we try to set it to (0,0,0,1), it will lock up. */
466 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
469 DBG(r300
, DBG_RS
, "r300: FS input fog unassigned.\n");
473 /* Rasterize WPOS. */
474 /* Don't set it in VAP if the FS doesn't need it. */
475 if (fs_inputs
->wpos
!= ATTR_UNUSED
&& tex_count
< 8) {
476 /* Set up the WPOS coordinates in VAP. */
477 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
478 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
479 stream_loc_notcl
[loc
++] = 6 + tex_count
;
482 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_XYZW
);
484 /* Write it to the FS input register. */
485 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
487 DBG(r300
, DBG_RS
, "r300: Rasterized WPOS written to FS.\n");
493 /* Invalidate the rest of the no-TCL (GA) stream locations. */
495 stream_loc_notcl
[loc
++] = -1;
498 /* Rasterize at least one color, or bad things happen. */
499 if (col_count
== 0 && tex_count
== 0) {
500 rX00_rs_col(&rs
, 0, 0, SWIZ_0001
);
503 DBG(r300
, DBG_RS
, "r300: Rasterized color 0 to prevent lockups.\n");
506 DBG(r300
, DBG_RS
, "r300: --- Rasterizer status ---: colors: %i, "
507 "generics: %i.\n", col_count
, tex_count
);
509 rs
.count
= (tex_count
*4) | (col_count
<< R300_IC_COUNT_SHIFT
) |
512 count
= MAX3(col_count
, tex_count
, 1);
513 rs
.inst_count
= count
- 1;
515 /* Now, after all that, see if we actually need to update the state. */
516 if (memcmp(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
))) {
517 memcpy(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
));
518 r300
->rs_block_state
.size
= 11 + count
*2;
522 static void r300_merge_textures_and_samplers(struct r300_context
* r300
)
524 struct r300_textures_state
*state
=
525 (struct r300_textures_state
*)r300
->textures_state
.state
;
526 struct r300_texture_sampler_state
*texstate
;
527 struct r300_sampler_state
*sampler
;
528 struct r300_sampler_view
*view
;
529 struct r300_texture
*tex
;
530 unsigned min_level
, max_level
, i
, size
;
531 unsigned count
= MIN2(state
->sampler_view_count
,
532 state
->sampler_state_count
);
533 unsigned char depth_swizzle
[4] = {
534 UTIL_FORMAT_SWIZZLE_X
,
535 UTIL_FORMAT_SWIZZLE_X
,
536 UTIL_FORMAT_SWIZZLE_X
,
537 UTIL_FORMAT_SWIZZLE_X
540 state
->tx_enable
= 0;
544 for (i
= 0; i
< count
; i
++) {
545 if (state
->sampler_views
[i
] && state
->sampler_states
[i
]) {
546 state
->tx_enable
|= 1 << i
;
548 view
= state
->sampler_views
[i
];
549 tex
= r300_texture(view
->base
.texture
);
550 sampler
= state
->sampler_states
[i
];
552 texstate
= &state
->regs
[i
];
553 texstate
->format
= view
->format
;
554 texstate
->filter0
= sampler
->filter0
;
555 texstate
->filter1
= sampler
->filter1
;
556 texstate
->border_color
= sampler
->border_color
;
558 /* If compare mode is disabled, the sampler view swizzles
559 * are stored in the format.
560 * Otherwise, swizzles must be applied after the compare mode
561 * in the fragment shader. */
562 if (util_format_is_depth_or_stencil(tex
->b
.b
.format
)) {
563 if (sampler
->state
.compare_mode
== PIPE_TEX_COMPARE_NONE
) {
564 texstate
->format
.format1
|=
565 r300_get_swizzle_combined(depth_swizzle
, view
->swizzle
);
567 texstate
->format
.format1
|=
568 r300_get_swizzle_combined(depth_swizzle
, 0);
572 /* to emulate 1D textures through 2D ones correctly */
573 if (tex
->b
.b
.target
== PIPE_TEXTURE_1D
) {
574 texstate
->filter0
&= ~R300_TX_WRAP_T_MASK
;
575 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
578 if (tex
->uses_pitch
) {
579 /* NPOT textures don't support mip filter, unfortunately.
580 * This prevents incorrect rendering. */
581 texstate
->filter0
&= ~R300_TX_MIN_FILTER_MIP_MASK
;
583 /* Mask out the mirrored flag. */
584 if (texstate
->filter0
& R300_TX_WRAP_S(R300_TX_MIRRORED
)) {
585 texstate
->filter0
&= ~R300_TX_WRAP_S(R300_TX_MIRRORED
);
587 if (texstate
->filter0
& R300_TX_WRAP_T(R300_TX_MIRRORED
)) {
588 texstate
->filter0
&= ~R300_TX_WRAP_T(R300_TX_MIRRORED
);
591 /* Change repeat to clamp-to-edge.
592 * (the repeat bit has a value of 0, no masking needed). */
593 if ((texstate
->filter0
& R300_TX_WRAP_S_MASK
) ==
594 R300_TX_WRAP_S(R300_TX_REPEAT
)) {
595 texstate
->filter0
|= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE
);
597 if ((texstate
->filter0
& R300_TX_WRAP_T_MASK
) ==
598 R300_TX_WRAP_T(R300_TX_REPEAT
)) {
599 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
602 /* determine min/max levels */
603 /* the MAX_MIP level is the largest (finest) one */
604 max_level
= MIN3(sampler
->max_lod
+ view
->base
.first_level
,
605 tex
->b
.b
.last_level
, view
->base
.last_level
);
606 min_level
= MIN2(sampler
->min_lod
+ view
->base
.first_level
,
608 texstate
->format
.format0
|= R300_TX_NUM_LEVELS(max_level
);
609 texstate
->filter0
|= R300_TX_MAX_MIP_LEVEL(min_level
);
612 texstate
->filter0
|= i
<< 28;
619 r300
->textures_state
.size
= size
;
621 /* Pick a fragment shader based on either the texture compare state
622 * or the uses_pitch flag. */
623 if (r300
->fs
.state
&& count
) {
624 if (r300_pick_fragment_shader(r300
)) {
625 r300_mark_fs_code_dirty(r300
);
630 void r300_update_derived_state(struct r300_context
* r300
)
632 if (r300
->textures_state
.dirty
) {
633 r300_merge_textures_and_samplers(r300
);
636 if (r300
->rs_block_state
.dirty
) {
637 r300_update_rs_block(r300
);
640 memset(&r300
->vertex_info
, 0, sizeof(struct vertex_info
));
641 r300_draw_emit_all_attribs(r300
);
642 draw_compute_vertex_size(&r300
->vertex_info
);
643 r300_swtcl_vertex_psc(r300
);
647 r300_update_hyperz_state(r300
);