2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
29 #include "r300_context.h"
31 #include "r300_hyperz.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state_derived.h"
35 #include "r300_state_inlines.h"
36 #include "r300_texture.h"
39 /* r300_state_derived: Various bits of state which are dependent upon
40 * currently bound CSO data. */
42 enum r300_rs_swizzle
{
49 static void r300_draw_emit_attrib(struct r300_context
* r300
,
50 enum attrib_emit emit
,
51 enum interp_mode interp
,
54 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
55 struct tgsi_shader_info
* info
= &vs
->info
;
58 output
= draw_find_shader_output(r300
->draw
,
59 info
->output_semantic_name
[index
],
60 info
->output_semantic_index
[index
]);
61 draw_emit_vertex_attr(&r300
->vertex_info
, emit
, interp
, output
);
64 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
66 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
67 struct r300_shader_semantics
* vs_outputs
= &vs
->outputs
;
71 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
72 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
79 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
80 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
85 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
86 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
87 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
88 vs_outputs
->color
[i
]);
92 /* Back-face colors. */
93 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
94 if (vs_outputs
->bcolor
[i
] != ATTR_UNUSED
) {
95 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
96 vs_outputs
->bcolor
[i
]);
100 /* Texture coordinates. */
101 /* Only 8 generic vertex attributes can be used. If there are more,
102 * they won't be rasterized. */
104 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& gen_count
< 8; i
++) {
105 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
&&
106 !(r300
->sprite_coord_enable
& (1 << i
))) {
107 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
108 vs_outputs
->generic
[i
]);
113 /* Fog coordinates. */
114 if (gen_count
< 8 && vs_outputs
->fog
!= ATTR_UNUSED
) {
115 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
121 if (r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
&& gen_count
< 8) {
122 DBG(r300
, DBG_SWTCL
, "draw_emit_attrib: WPOS, index: %i\n",
124 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
129 /* Update the PSC tables for SW TCL, using Draw. */
130 static void r300_swtcl_vertex_psc(struct r300_context
*r300
)
132 struct r300_vertex_stream_state
*vstream
= r300
->vertex_stream_state
.state
;
133 struct vertex_info
*vinfo
= &r300
->vertex_info
;
134 uint16_t type
, swizzle
;
135 enum pipe_format format
;
136 unsigned i
, attrib_count
;
137 int* vs_output_tab
= r300
->stream_loc_notcl
;
139 memset(vstream
, 0, sizeof(struct r300_vertex_stream_state
));
141 /* For each Draw attribute, route it to the fragment shader according
142 * to the vs_output_tab. */
143 attrib_count
= vinfo
->num_attribs
;
144 DBG(r300
, DBG_SWTCL
, "r300: attrib count: %d\n", attrib_count
);
145 for (i
= 0; i
< attrib_count
; i
++) {
146 if (vs_output_tab
[i
] == -1) {
151 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
154 "r300: swtcl_vertex_psc [%i] <- %s\n",
155 vs_output_tab
[i
], util_format_short_name(format
));
157 /* Obtain the type of data in this attribute. */
158 type
= r300_translate_vertex_data_type(format
);
159 if (type
== R300_INVALID_FORMAT
) {
160 fprintf(stderr
, "r300: Bad vertex format %s.\n",
161 util_format_short_name(format
));
166 type
|= vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
168 /* Obtain the swizzle for this attribute. Note that the default
169 * swizzle in the hardware is not XYZW! */
170 swizzle
= r300_translate_vertex_data_swizzle(format
);
172 /* Add the attribute to the PSC table. */
174 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
175 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
177 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
178 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
182 /* Set the last vector in the PSC. */
186 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
187 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
189 vstream
->count
= (i
>> 1) + 1;
190 r300
->vertex_stream_state
.dirty
= TRUE
;
191 r300
->vertex_stream_state
.size
= (1 + vstream
->count
) * 2;
194 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
195 enum r300_rs_swizzle swiz
)
197 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
198 if (swiz
== SWIZ_0001
) {
199 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
201 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
203 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
206 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
208 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
209 R300_RS_INST_COL_ADDR(fp_offset
);
212 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
213 enum r300_rs_swizzle swiz
)
215 if (swiz
== SWIZ_X001
) {
216 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
217 R300_RS_SEL_S(R300_RS_SEL_C0
) |
218 R300_RS_SEL_T(R300_RS_SEL_K0
) |
219 R300_RS_SEL_R(R300_RS_SEL_K0
) |
220 R300_RS_SEL_Q(R300_RS_SEL_K1
);
221 } else if (swiz
== SWIZ_XY01
) {
222 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
223 R300_RS_SEL_S(R300_RS_SEL_C0
) |
224 R300_RS_SEL_T(R300_RS_SEL_C1
) |
225 R300_RS_SEL_R(R300_RS_SEL_K0
) |
226 R300_RS_SEL_Q(R300_RS_SEL_K1
);
228 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
229 R300_RS_SEL_S(R300_RS_SEL_C0
) |
230 R300_RS_SEL_T(R300_RS_SEL_C1
) |
231 R300_RS_SEL_R(R300_RS_SEL_C2
) |
232 R300_RS_SEL_Q(R300_RS_SEL_C3
);
234 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
237 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
239 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
240 R300_RS_INST_TEX_ADDR(fp_offset
);
243 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
244 enum r300_rs_swizzle swiz
)
246 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
247 if (swiz
== SWIZ_0001
) {
248 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
250 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
252 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
255 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
257 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
258 R500_RS_INST_COL_ADDR(fp_offset
);
261 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
262 enum r300_rs_swizzle swiz
)
264 int rs_tex_comp
= ptr
*4;
266 if (swiz
== SWIZ_X001
) {
267 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
268 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
269 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
270 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
271 } else if (swiz
== SWIZ_XY01
) {
272 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
273 R500_RS_SEL_T(rs_tex_comp
+ 1) |
274 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
275 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
277 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
278 R500_RS_SEL_T(rs_tex_comp
+ 1) |
279 R500_RS_SEL_R(rs_tex_comp
+ 2) |
280 R500_RS_SEL_Q(rs_tex_comp
+ 3);
282 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
285 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
287 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
288 R500_RS_INST_TEX_ADDR(fp_offset
);
291 /* Set up the RS block.
293 * This is the part of the chipset that is responsible for linking vertex
294 * and fragment shaders and stuffed texture coordinates.
296 * The rasterizer reads data from VAP, which produces vertex shader outputs,
297 * and GA, which produces stuffed texture coordinates. VAP outputs have
298 * precedence over GA. All outputs must be rasterized otherwise it locks up.
299 * If there are more outputs rasterized than is set in VAP/GA, it locks up
300 * too. The funky part is that this info has been pretty much obtained by trial
302 static void r300_update_rs_block(struct r300_context
*r300
)
304 struct r300_vertex_shader
*vs
= r300
->vs_state
.state
;
305 struct r300_shader_semantics
*vs_outputs
= &vs
->outputs
;
306 struct r300_shader_semantics
*fs_inputs
= &r300_fs(r300
)->shader
->inputs
;
307 struct r300_rs_block rs
= {0};
308 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0, count
, loc
= 0;
309 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
310 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int);
311 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
312 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
313 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
314 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
315 int *stream_loc_notcl
= r300
->stream_loc_notcl
;
317 if (r300
->screen
->caps
.is_r500
) {
318 rX00_rs_col
= r500_rs_col
;
319 rX00_rs_col_write
= r500_rs_col_write
;
320 rX00_rs_tex
= r500_rs_tex
;
321 rX00_rs_tex_write
= r500_rs_tex_write
;
323 rX00_rs_col
= r300_rs_col
;
324 rX00_rs_col_write
= r300_rs_col_write
;
325 rX00_rs_tex
= r300_rs_tex
;
326 rX00_rs_tex_write
= r300_rs_tex_write
;
329 /* The position is always present in VAP. */
330 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_POS
;
331 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
;
332 stream_loc_notcl
[loc
++] = 0;
334 /* Set up the point size in VAP. */
335 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
336 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT
;
337 stream_loc_notcl
[loc
++] = 1;
340 /* Set up and rasterize colors. */
341 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
342 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
343 vs_outputs
->color
[1] != ATTR_UNUSED
) {
344 /* Set up the color in VAP. */
345 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
346 rs
.vap_out_vtx_fmt
[0] |=
347 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< i
;
348 stream_loc_notcl
[loc
++] = 2 + i
;
351 rX00_rs_col(&rs
, col_count
, col_count
, SWIZ_XYZW
);
353 /* Write it to the FS input register if it's needed by the FS. */
354 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
355 rX00_rs_col_write(&rs
, col_count
, fp_offset
);
359 "r300: Rasterized color %i written to FS.\n", i
);
361 DBG(r300
, DBG_RS
, "r300: Rasterized color %i unused.\n", i
);
365 /* Skip the FS input register, leave it uninitialized. */
366 /* If we try to set it to (0,0,0,1), it will lock up. */
367 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
370 DBG(r300
, DBG_RS
, "r300: FS input color %i unassigned%s.\n",
376 /* Set up back-face colors. The rasterizer will do the color selection
378 if (any_bcolor_used
) {
379 if (r300
->two_sided_color
) {
380 /* Rasterize as back-face colors. */
381 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
382 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
383 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< (2+i
);
384 stream_loc_notcl
[loc
++] = 4 + i
;
387 /* Rasterize two fake texcoords to prevent from the two-sided color
389 /* XXX Consider recompiling the vertex shader to save 2 RS units. */
390 for (i
= 0; i
< 2; i
++) {
391 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
392 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
393 stream_loc_notcl
[loc
++] = 6 + tex_count
;
396 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_XYZW
);
402 /* Rasterize texture coordinates. */
403 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& tex_count
< 8; i
++) {
404 bool sprite_coord
= !!(r300
->sprite_coord_enable
& (1 << i
));
406 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
|| sprite_coord
) {
408 /* Set up the texture coordinates in VAP. */
409 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
410 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
411 stream_loc_notcl
[loc
++] = 6 + tex_count
;
415 rX00_rs_tex(&rs
, tex_count
, tex_count
,
416 sprite_coord
? SWIZ_XY01
: SWIZ_XYZW
);
418 /* Write it to the FS input register if it's needed by the FS. */
419 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
420 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
424 "r300: Rasterized generic %i written to FS%s.\n",
425 i
, sprite_coord
? " (sprite coord)" : "");
428 "r300: Rasterized generic %i unused%s.\n",
429 i
, sprite_coord
? " (sprite coord)" : "");
433 /* Skip the FS input register, leave it uninitialized. */
434 /* If we try to set it to (0,0,0,1), it will lock up. */
435 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
438 DBG(r300
, DBG_RS
, "r300: FS input generic %i unassigned%s.\n",
439 i
, sprite_coord
? " (sprite coord)" : "");
444 /* Rasterize fog coordinates. */
445 if (vs_outputs
->fog
!= ATTR_UNUSED
&& tex_count
< 8) {
446 /* Set up the fog coordinates in VAP. */
447 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
448 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
449 stream_loc_notcl
[loc
++] = 6 + tex_count
;
452 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_X001
);
454 /* Write it to the FS input register if it's needed by the FS. */
455 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
456 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
459 DBG(r300
, DBG_RS
, "r300: Rasterized fog written to FS.\n");
461 DBG(r300
, DBG_RS
, "r300: Rasterized fog unused.\n");
465 /* Skip the FS input register, leave it uninitialized. */
466 /* If we try to set it to (0,0,0,1), it will lock up. */
467 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
470 DBG(r300
, DBG_RS
, "r300: FS input fog unassigned.\n");
474 /* Rasterize WPOS. */
475 /* Don't set it in VAP if the FS doesn't need it. */
476 if (fs_inputs
->wpos
!= ATTR_UNUSED
&& tex_count
< 8) {
477 /* Set up the WPOS coordinates in VAP. */
478 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
479 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
480 stream_loc_notcl
[loc
++] = 6 + tex_count
;
483 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_XYZW
);
485 /* Write it to the FS input register. */
486 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
488 DBG(r300
, DBG_RS
, "r300: Rasterized WPOS written to FS.\n");
494 /* Invalidate the rest of the no-TCL (GA) stream locations. */
496 stream_loc_notcl
[loc
++] = -1;
499 /* Rasterize at least one color, or bad things happen. */
500 if (col_count
== 0 && tex_count
== 0) {
501 rX00_rs_col(&rs
, 0, 0, SWIZ_0001
);
504 DBG(r300
, DBG_RS
, "r300: Rasterized color 0 to prevent lockups.\n");
507 DBG(r300
, DBG_RS
, "r300: --- Rasterizer status ---: colors: %i, "
508 "generics: %i.\n", col_count
, tex_count
);
510 rs
.count
= (tex_count
*4) | (col_count
<< R300_IC_COUNT_SHIFT
) |
513 count
= MAX3(col_count
, tex_count
, 1);
514 rs
.inst_count
= count
- 1;
516 /* Now, after all that, see if we actually need to update the state. */
517 if (memcmp(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
))) {
518 memcpy(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
));
519 r300
->rs_block_state
.size
= 11 + count
*2;
523 static void r300_merge_textures_and_samplers(struct r300_context
* r300
)
525 struct r300_textures_state
*state
=
526 (struct r300_textures_state
*)r300
->textures_state
.state
;
527 struct r300_texture_sampler_state
*texstate
;
528 struct r300_sampler_state
*sampler
;
529 struct r300_sampler_view
*view
;
530 struct r300_texture
*tex
;
531 unsigned min_level
, max_level
, i
, size
;
532 unsigned count
= MIN2(state
->sampler_view_count
,
533 state
->sampler_state_count
);
534 unsigned char depth_swizzle
[4] = {
535 UTIL_FORMAT_SWIZZLE_X
,
536 UTIL_FORMAT_SWIZZLE_X
,
537 UTIL_FORMAT_SWIZZLE_X
,
538 UTIL_FORMAT_SWIZZLE_X
541 /* The KIL opcode fix, see below. */
542 if (!count
&& !r300
->screen
->caps
.is_r500
)
545 state
->tx_enable
= 0;
549 for (i
= 0; i
< count
; i
++) {
550 if (state
->sampler_views
[i
] && state
->sampler_states
[i
]) {
551 state
->tx_enable
|= 1 << i
;
553 view
= state
->sampler_views
[i
];
554 tex
= r300_texture(view
->base
.texture
);
555 sampler
= state
->sampler_states
[i
];
557 texstate
= &state
->regs
[i
];
558 texstate
->format
= view
->format
;
559 texstate
->filter0
= sampler
->filter0
;
560 texstate
->filter1
= sampler
->filter1
;
561 texstate
->border_color
= sampler
->border_color
;
563 /* Assign a texture cache region. */
564 texstate
->format
.format1
|= view
->texcache_region
;
566 /* If compare mode is disabled, the sampler view swizzles
567 * are stored in the format.
568 * Otherwise, swizzles must be applied after the compare mode
569 * in the fragment shader. */
570 if (util_format_is_depth_or_stencil(tex
->desc
.b
.b
.format
)) {
571 if (sampler
->state
.compare_mode
== PIPE_TEX_COMPARE_NONE
) {
572 texstate
->format
.format1
|=
573 r300_get_swizzle_combined(depth_swizzle
, view
->swizzle
);
575 texstate
->format
.format1
|=
576 r300_get_swizzle_combined(depth_swizzle
, 0);
580 /* to emulate 1D textures through 2D ones correctly */
581 if (tex
->desc
.b
.b
.target
== PIPE_TEXTURE_1D
) {
582 texstate
->filter0
&= ~R300_TX_WRAP_T_MASK
;
583 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
586 if (tex
->desc
.uses_stride_addressing
) {
587 /* NPOT textures don't support mip filter, unfortunately.
588 * This prevents incorrect rendering. */
589 texstate
->filter0
&= ~R300_TX_MIN_FILTER_MIP_MASK
;
591 /* Mask out the mirrored flag. */
592 if (texstate
->filter0
& R300_TX_WRAP_S(R300_TX_MIRRORED
)) {
593 texstate
->filter0
&= ~R300_TX_WRAP_S(R300_TX_MIRRORED
);
595 if (texstate
->filter0
& R300_TX_WRAP_T(R300_TX_MIRRORED
)) {
596 texstate
->filter0
&= ~R300_TX_WRAP_T(R300_TX_MIRRORED
);
599 /* Change repeat to clamp-to-edge.
600 * (the repeat bit has a value of 0, no masking needed). */
601 if ((texstate
->filter0
& R300_TX_WRAP_S_MASK
) ==
602 R300_TX_WRAP_S(R300_TX_REPEAT
)) {
603 texstate
->filter0
|= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE
);
605 if ((texstate
->filter0
& R300_TX_WRAP_T_MASK
) ==
606 R300_TX_WRAP_T(R300_TX_REPEAT
)) {
607 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
610 /* determine min/max levels */
611 /* the MAX_MIP level is the largest (finest) one */
612 max_level
= MIN3(sampler
->max_lod
+ view
->base
.first_level
,
613 tex
->desc
.b
.b
.last_level
, view
->base
.last_level
);
614 min_level
= MIN2(sampler
->min_lod
+ view
->base
.first_level
,
616 texstate
->format
.format0
|= R300_TX_NUM_LEVELS(max_level
);
617 texstate
->filter0
|= R300_TX_MAX_MIP_LEVEL(min_level
);
620 texstate
->filter0
|= i
<< 28;
625 /* For the KIL opcode to work on r3xx-r4xx, the texture unit
626 * assigned to this opcode (it's always the first one) must be
627 * enabled. Otherwise the opcode doesn't work.
629 * In order to not depend on the fragment shader, we just make
630 * the first unit enabled all the time. */
631 if (i
== 0 && !r300
->screen
->caps
.is_r500
) {
632 pipe_sampler_view_reference(
633 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
634 &r300
->texkill_sampler
->base
);
636 state
->tx_enable
|= 1 << i
;
638 texstate
= &state
->regs
[i
];
640 /* Just set some valid state. */
641 texstate
->format
= r300
->texkill_sampler
->format
;
643 r300_translate_tex_filters(PIPE_TEX_FILTER_NEAREST
,
644 PIPE_TEX_FILTER_NEAREST
,
645 PIPE_TEX_FILTER_NEAREST
,
647 texstate
->filter1
= 0;
648 texstate
->border_color
= 0;
650 texstate
->filter0
|= i
<< 28;
657 r300
->textures_state
.size
= size
;
659 /* Pick a fragment shader based on either the texture compare state
660 * or the uses_pitch flag. */
661 if (r300
->fs
.state
&& count
) {
662 if (r300_pick_fragment_shader(r300
)) {
663 r300_mark_fs_code_dirty(r300
);
668 void r300_update_derived_state(struct r300_context
* r300
)
670 if (r300
->textures_state
.dirty
) {
671 r300_merge_textures_and_samplers(r300
);
674 if (r300
->rs_block_state
.dirty
) {
675 r300_update_rs_block(r300
);
678 memset(&r300
->vertex_info
, 0, sizeof(struct vertex_info
));
679 r300_draw_emit_all_attribs(r300
);
680 draw_compute_vertex_size(&r300
->vertex_info
);
681 r300_swtcl_vertex_psc(r300
);
685 r300_update_hyperz_state(r300
);