2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
29 #include "r300_context.h"
31 #include "r300_screen.h"
32 #include "r300_shader_semantics.h"
33 #include "r300_state_derived.h"
34 #include "r300_state_inlines.h"
37 /* r300_state_derived: Various bits of state which are dependent upon
38 * currently bound CSO data. */
40 static void r300_draw_emit_attrib(struct r300_context
* r300
,
41 enum attrib_emit emit
,
42 enum interp_mode interp
,
45 struct tgsi_shader_info
* info
= &r300
->vs
->info
;
48 output
= draw_find_shader_output(r300
->draw
,
49 info
->output_semantic_name
[index
],
50 info
->output_semantic_index
[index
]);
51 draw_emit_vertex_attr(
52 (struct vertex_info
*)r300
->vertex_format_state
.state
,
53 emit
, interp
, output
);
56 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
58 struct r300_shader_semantics
* vs_outputs
= &r300
->vs
->outputs
;
62 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
63 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
70 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
71 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
76 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
77 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
78 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
79 vs_outputs
->color
[i
]);
83 /* XXX Back-face colors. */
85 /* Texture coordinates. */
87 for (i
= 0; i
< ATTR_GENERIC_COUNT
; i
++) {
88 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
89 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
90 vs_outputs
->generic
[i
]);
95 /* Fog coordinates. */
96 if (vs_outputs
->fog
!= ATTR_UNUSED
) {
97 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
103 assert(gen_count
<= 8);
106 /* Update the PSC tables. */
107 static void r300_vertex_psc(struct r300_context
* r300
)
109 struct r300_vertex_info
*vformat
=
110 (struct r300_vertex_info
*)r300
->vertex_format_state
.state
;
111 uint16_t type
, swizzle
;
112 enum pipe_format format
;
114 int identity
[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
117 /* If TCL is bypassed, map vertex streams to equivalent VS output
119 if (r300
->tcl_bypass
) {
120 stream_tab
= r300
->vs
->stream_loc_notcl
;
122 stream_tab
= identity
;
125 /* Vertex shaders have no semantics on their inputs,
126 * so PSC should just route stuff based on the vertex elements,
127 * and not on attrib information. */
128 DBG(r300
, DBG_DRAW
, "r300: vs expects %d attribs, routing %d elements"
130 r300
->vs
->info
.num_inputs
,
131 r300
->vertex_element_count
);
133 for (i
= 0; i
< r300
->vertex_element_count
; i
++) {
134 format
= r300
->vertex_element
[i
].src_format
;
136 type
= r300_translate_vertex_data_type(format
) |
137 (stream_tab
[i
] << R300_DST_VEC_LOC_SHIFT
);
138 swizzle
= r300_translate_vertex_data_swizzle(format
);
141 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
142 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
144 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
145 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
151 /* Set the last vector in the PSC. */
155 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
156 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
159 /* Update the PSC tables for SW TCL, using Draw. */
160 static void r300_swtcl_vertex_psc(struct r300_context
* r300
)
162 struct r300_vertex_info
*vformat
=
163 (struct r300_vertex_info
*)r300
->vertex_format_state
.state
;
164 struct vertex_info
* vinfo
= &vformat
->vinfo
;
165 uint16_t type
, swizzle
;
166 enum pipe_format format
;
167 unsigned i
, attrib_count
;
168 int* vs_output_tab
= r300
->vs
->stream_loc_notcl
;
170 /* For each Draw attribute, route it to the fragment shader according
171 * to the vs_output_tab. */
172 attrib_count
= vinfo
->num_attribs
;
173 DBG(r300
, DBG_DRAW
, "r300: attrib count: %d\n", attrib_count
);
174 for (i
= 0; i
< attrib_count
; i
++) {
175 DBG(r300
, DBG_DRAW
, "r300: attrib: offset %d, interp %d, size %d,"
176 " vs_output_tab %d\n", vinfo
->attrib
[i
].src_index
,
177 vinfo
->attrib
[i
].interp_mode
, vinfo
->attrib
[i
].emit
,
181 for (i
= 0; i
< attrib_count
; i
++) {
182 /* Make sure we have a proper destination for our attribute. */
183 assert(vs_output_tab
[i
] != -1);
185 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
187 /* Obtain the type of data in this attribute. */
188 type
= r300_translate_vertex_data_type(format
) |
189 vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
191 /* Obtain the swizzle for this attribute. Note that the default
192 * swizzle in the hardware is not XYZW! */
193 swizzle
= r300_translate_vertex_data_swizzle(format
);
195 /* Add the attribute to the PSC table. */
197 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
198 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
200 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
201 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
205 /* Set the last vector in the PSC. */
209 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
210 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
213 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
214 boolean swizzle_0001
)
216 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
218 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
220 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
222 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
225 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
227 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
228 R300_RS_INST_COL_ADDR(fp_offset
);
231 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
232 boolean swizzle_X001
)
235 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
236 R300_RS_SEL_S(R300_RS_SEL_C0
) |
237 R300_RS_SEL_T(R300_RS_SEL_K0
) |
238 R300_RS_SEL_R(R300_RS_SEL_K0
) |
239 R300_RS_SEL_Q(R300_RS_SEL_K1
);
241 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
242 R300_RS_SEL_S(R300_RS_SEL_C0
) |
243 R300_RS_SEL_T(R300_RS_SEL_C1
) |
244 R300_RS_SEL_R(R300_RS_SEL_C2
) |
245 R300_RS_SEL_Q(R300_RS_SEL_C3
);
247 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
250 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
252 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
253 R300_RS_INST_TEX_ADDR(fp_offset
);
256 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
257 boolean swizzle_0001
)
259 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
261 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
263 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
265 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
268 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
270 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
271 R500_RS_INST_COL_ADDR(fp_offset
);
274 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
275 boolean swizzle_X001
)
277 int rs_tex_comp
= ptr
*4;
280 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
281 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
282 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
283 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
285 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
286 R500_RS_SEL_T(rs_tex_comp
+ 1) |
287 R500_RS_SEL_R(rs_tex_comp
+ 2) |
288 R500_RS_SEL_Q(rs_tex_comp
+ 3);
290 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
293 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
295 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
296 R500_RS_INST_TEX_ADDR(fp_offset
);
299 /* Set up the RS block.
301 * This is the part of the chipset that actually does the rasterization
302 * of vertices into fragments. This is also the part of the chipset that
303 * locks up if any part of it is even slightly wrong. */
304 static void r300_update_rs_block(struct r300_context
* r300
,
305 struct r300_shader_semantics
* vs_outputs
,
306 struct r300_shader_semantics
* fs_inputs
)
308 struct r300_rs_block rs
= { { 0 } };
309 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0;
310 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, boolean
);
311 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int);
312 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, boolean
);
313 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
314 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
315 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
317 if (r300_screen(r300
->context
.screen
)->caps
->is_r500
) {
318 rX00_rs_col
= r500_rs_col
;
319 rX00_rs_col_write
= r500_rs_col_write
;
320 rX00_rs_tex
= r500_rs_tex
;
321 rX00_rs_tex_write
= r500_rs_tex_write
;
323 rX00_rs_col
= r300_rs_col
;
324 rX00_rs_col_write
= r300_rs_col_write
;
325 rX00_rs_tex
= r300_rs_tex
;
326 rX00_rs_tex_write
= r300_rs_tex_write
;
329 /* Rasterize colors. */
330 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
331 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
332 vs_outputs
->color
[1] != ATTR_UNUSED
) {
333 /* Always rasterize if it's written by the VS,
334 * otherwise it locks up. */
335 rX00_rs_col(&rs
, col_count
, i
, FALSE
);
337 /* Write it to the FS input register if it's used by the FS. */
338 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
339 rX00_rs_col_write(&rs
, col_count
, fp_offset
);
344 /* Skip the FS input register, leave it uninitialized. */
345 /* If we try to set it to (0,0,0,1), it will lock up. */
346 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
352 /* Rasterize texture coordinates. */
353 for (i
= 0; i
< ATTR_GENERIC_COUNT
; i
++) {
354 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
355 /* Always rasterize if it's written by the VS,
356 * otherwise it locks up. */
357 rX00_rs_tex(&rs
, tex_count
, tex_count
, FALSE
);
359 /* Write it to the FS input register if it's used by the FS. */
360 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
361 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
366 /* Skip the FS input register, leave it uninitialized. */
367 /* If we try to set it to (0,0,0,1), it will lock up. */
368 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
374 /* Rasterize fog coordinates. */
375 if (vs_outputs
->fog
!= ATTR_UNUSED
) {
376 /* Always rasterize if it's written by the VS,
377 * otherwise it locks up. */
378 rX00_rs_tex(&rs
, tex_count
, tex_count
, TRUE
);
380 /* Write it to the FS input register if it's used by the FS. */
381 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
382 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
387 /* Skip the FS input register, leave it uninitialized. */
388 /* If we try to set it to (0,0,0,1), it will lock up. */
389 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
394 /* Rasterize WPOS. */
395 /* If the FS doesn't need it, it's not written by the VS. */
396 if (fs_inputs
->wpos
!= ATTR_UNUSED
) {
397 rX00_rs_tex(&rs
, tex_count
, tex_count
, FALSE
);
398 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
404 /* Rasterize at least one color, or bad things happen. */
405 if (col_count
== 0 && tex_count
== 0) {
406 rX00_rs_col(&rs
, 0, 0, TRUE
);
410 rs
.count
= (tex_count
*4) | (col_count
<< R300_IC_COUNT_SHIFT
) |
413 rs
.inst_count
= MAX3(col_count
- 1, tex_count
- 1, 0);
415 /* Now, after all that, see if we actually need to update the state. */
416 if (memcmp(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
))) {
417 memcpy(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
));
418 r300
->rs_block_state
.dirty
= TRUE
;
422 /* Update the shader-dependant states. */
423 static void r300_update_derived_shader_state(struct r300_context
* r300
)
425 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
426 struct r300_vertex_info
*vformat
=
427 (struct r300_vertex_info
*)r300
->vertex_format_state
.state
;
428 struct vertex_info
* vinfo
= &vformat
->vinfo
;
430 /* Mmm, delicious hax */
431 memset(r300
->vertex_format_state
.state
, 0, sizeof(struct r300_vertex_info
));
432 memcpy(vinfo
->hwfmt
, r300
->vs
->hwfmt
, sizeof(uint
)*4);
434 r300_update_rs_block(r300
, &r300
->vs
->outputs
, &r300
->fs
->inputs
);
436 if (r300screen
->caps
->has_tcl
) {
437 r300_vertex_psc(r300
);
439 r300_draw_emit_all_attribs(r300
);
440 draw_compute_vertex_size(
441 (struct vertex_info
*)r300
->vertex_format_state
.state
);
442 r300_swtcl_vertex_psc(r300
);
446 static boolean
r300_dsa_writes_depth_stencil(struct r300_dsa_state
* dsa
)
448 /* We are interested only in the cases when a new depth or stencil value
449 * can be written and changed. */
451 /* We might optionally check for [Z func: never] and inspect the stencil
452 * state in a similar fashion, but it's not terribly important. */
453 return (dsa
->z_buffer_control
& R300_Z_WRITE_ENABLE
) ||
454 (dsa
->stencil_ref_mask
& R300_STENCILWRITEMASK_MASK
) ||
455 ((dsa
->z_buffer_control
& R500_STENCIL_REFMASK_FRONT_BACK
) &&
456 (dsa
->stencil_ref_bf
& R300_STENCILWRITEMASK_MASK
));
459 static boolean
r300_dsa_alpha_test_enabled(struct r300_dsa_state
* dsa
)
461 /* We are interested only in the cases when alpha testing can kill
463 uint32_t af
= dsa
->alpha_function
;
465 return (af
& R300_FG_ALPHA_FUNC_ENABLE
) &&
466 (af
& R300_FG_ALPHA_FUNC_ALWAYS
) != R300_FG_ALPHA_FUNC_ALWAYS
;
469 static void r300_update_ztop(struct r300_context
* r300
)
471 struct r300_ztop_state
* ztop_state
=
472 (struct r300_ztop_state
*)r300
->ztop_state
.state
;
474 /* This is important enough that I felt it warranted a comment.
476 * According to the docs, these are the conditions where ZTOP must be
478 * 1) Alpha testing enabled
479 * 2) Texture kill instructions in fragment shader
480 * 3) Chroma key culling enabled
481 * 4) W-buffering enabled
483 * The docs claim that for the first three cases, if no ZS writes happen,
484 * then ZTOP can be used.
486 * (3) will never apply since we do not support chroma-keyed operations.
487 * (4) will need to be re-examined (and this comment updated) if/when
488 * Hyper-Z becomes supported.
490 * Additionally, the following conditions require disabled ZTOP:
491 * 5) Depth writes in fragment shader
492 * 6) Outstanding occlusion queries
494 * This register causes stalls all the way from SC to CB when changed,
495 * but it is buffered on-chip so it does not hurt to write it if it has
502 if (r300_dsa_writes_depth_stencil(r300
->dsa_state
.state
) &&
503 (r300_dsa_alpha_test_enabled(r300
->dsa_state
.state
) ||/* (1) */
504 r300
->fs
->info
.uses_kill
)) { /* (2) */
505 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
506 } else if (r300_fragment_shader_writes_depth(r300
->fs
)) { /* (5) */
507 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
508 } else if (r300
->query_current
) { /* (6) */
509 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
511 ztop_state
->z_buffer_top
= R300_ZTOP_ENABLE
;
514 r300
->ztop_state
.dirty
= TRUE
;
517 void r300_update_derived_state(struct r300_context
* r300
)
520 if (r300
->dirty_state
&
521 (R300_NEW_FRAGMENT_SHADER
| R300_NEW_VERTEX_SHADER
) ||
522 r300
->vertex_format_state
.dirty
|| r300
->rs_state
.dirty
) {
523 r300_update_derived_shader_state(r300
);
526 r300_update_ztop(r300
);