2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
29 #include "r300_context.h"
31 #include "r300_hyperz.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state_derived.h"
35 #include "r300_state_inlines.h"
36 #include "r300_texture.h"
39 /* r300_state_derived: Various bits of state which are dependent upon
40 * currently bound CSO data. */
42 enum r300_rs_swizzle
{
49 enum r300_rs_col_write_type
{
54 static void r300_draw_emit_attrib(struct r300_context
* r300
,
55 enum attrib_emit emit
,
56 enum interp_mode interp
,
59 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
60 struct tgsi_shader_info
* info
= &vs
->info
;
63 output
= draw_find_shader_output(r300
->draw
,
64 info
->output_semantic_name
[index
],
65 info
->output_semantic_index
[index
]);
66 draw_emit_vertex_attr(&r300
->vertex_info
, emit
, interp
, output
);
69 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
71 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
72 struct r300_shader_semantics
* vs_outputs
= &vs
->outputs
;
76 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
77 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
84 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
85 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
90 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
91 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
92 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
93 vs_outputs
->color
[i
]);
97 /* Back-face colors. */
98 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
99 if (vs_outputs
->bcolor
[i
] != ATTR_UNUSED
) {
100 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
101 vs_outputs
->bcolor
[i
]);
105 /* Texture coordinates. */
106 /* Only 8 generic vertex attributes can be used. If there are more,
107 * they won't be rasterized. */
109 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& gen_count
< 8; i
++) {
110 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
&&
111 !(r300
->sprite_coord_enable
& (1 << i
))) {
112 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
113 vs_outputs
->generic
[i
]);
118 /* Fog coordinates. */
119 if (gen_count
< 8 && vs_outputs
->fog
!= ATTR_UNUSED
) {
120 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
126 if (r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
&& gen_count
< 8) {
127 DBG(r300
, DBG_SWTCL
, "draw_emit_attrib: WPOS, index: %i\n",
129 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
134 /* Update the PSC tables for SW TCL, using Draw. */
135 static void r300_swtcl_vertex_psc(struct r300_context
*r300
)
137 struct r300_vertex_stream_state
*vstream
= r300
->vertex_stream_state
.state
;
138 struct vertex_info
*vinfo
= &r300
->vertex_info
;
139 uint16_t type
, swizzle
;
140 enum pipe_format format
;
141 unsigned i
, attrib_count
;
142 int* vs_output_tab
= r300
->stream_loc_notcl
;
144 memset(vstream
, 0, sizeof(struct r300_vertex_stream_state
));
146 /* For each Draw attribute, route it to the fragment shader according
147 * to the vs_output_tab. */
148 attrib_count
= vinfo
->num_attribs
;
149 DBG(r300
, DBG_SWTCL
, "r300: attrib count: %d\n", attrib_count
);
150 for (i
= 0; i
< attrib_count
; i
++) {
151 if (vs_output_tab
[i
] == -1) {
156 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
159 "r300: swtcl_vertex_psc [%i] <- %s\n",
160 vs_output_tab
[i
], util_format_short_name(format
));
162 /* Obtain the type of data in this attribute. */
163 type
= r300_translate_vertex_data_type(format
);
164 if (type
== R300_INVALID_FORMAT
) {
165 fprintf(stderr
, "r300: Bad vertex format %s.\n",
166 util_format_short_name(format
));
171 type
|= vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
173 /* Obtain the swizzle for this attribute. Note that the default
174 * swizzle in the hardware is not XYZW! */
175 swizzle
= r300_translate_vertex_data_swizzle(format
);
177 /* Add the attribute to the PSC table. */
179 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
180 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
182 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
183 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
187 /* Set the last vector in the PSC. */
191 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
192 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
194 vstream
->count
= (i
>> 1) + 1;
195 r300
->vertex_stream_state
.dirty
= TRUE
;
196 r300
->vertex_stream_state
.size
= (1 + vstream
->count
) * 2;
199 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
200 enum r300_rs_swizzle swiz
)
202 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
203 if (swiz
== SWIZ_0001
) {
204 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
206 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
208 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
211 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
,
212 enum r300_rs_col_write_type type
)
214 assert(type
== WRITE_COLOR
);
215 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
216 R300_RS_INST_COL_ADDR(fp_offset
);
219 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
220 enum r300_rs_swizzle swiz
)
222 if (swiz
== SWIZ_X001
) {
223 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
) |
224 R300_RS_SEL_S(R300_RS_SEL_C0
) |
225 R300_RS_SEL_T(R300_RS_SEL_K0
) |
226 R300_RS_SEL_R(R300_RS_SEL_K0
) |
227 R300_RS_SEL_Q(R300_RS_SEL_K1
);
228 } else if (swiz
== SWIZ_XY01
) {
229 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
) |
230 R300_RS_SEL_S(R300_RS_SEL_C0
) |
231 R300_RS_SEL_T(R300_RS_SEL_C1
) |
232 R300_RS_SEL_R(R300_RS_SEL_K0
) |
233 R300_RS_SEL_Q(R300_RS_SEL_K1
);
235 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
) |
236 R300_RS_SEL_S(R300_RS_SEL_C0
) |
237 R300_RS_SEL_T(R300_RS_SEL_C1
) |
238 R300_RS_SEL_R(R300_RS_SEL_C2
) |
239 R300_RS_SEL_Q(R300_RS_SEL_C3
);
241 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
244 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
246 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
247 R300_RS_INST_TEX_ADDR(fp_offset
);
250 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
251 enum r300_rs_swizzle swiz
)
253 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
254 if (swiz
== SWIZ_0001
) {
255 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
257 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
259 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
262 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
,
263 enum r300_rs_col_write_type type
)
265 if (type
== WRITE_FACE
)
266 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE_BACKFACE
|
267 R500_RS_INST_COL_ADDR(fp_offset
);
269 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
270 R500_RS_INST_COL_ADDR(fp_offset
);
274 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
275 enum r300_rs_swizzle swiz
)
277 if (swiz
== SWIZ_X001
) {
278 rs
->ip
[id
] |= R500_RS_SEL_S(ptr
) |
279 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
280 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
281 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
282 } else if (swiz
== SWIZ_XY01
) {
283 rs
->ip
[id
] |= R500_RS_SEL_S(ptr
) |
284 R500_RS_SEL_T(ptr
+ 1) |
285 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
286 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
288 rs
->ip
[id
] |= R500_RS_SEL_S(ptr
) |
289 R500_RS_SEL_T(ptr
+ 1) |
290 R500_RS_SEL_R(ptr
+ 2) |
291 R500_RS_SEL_Q(ptr
+ 3);
293 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
296 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
298 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
299 R500_RS_INST_TEX_ADDR(fp_offset
);
302 /* Set up the RS block.
304 * This is the part of the chipset that is responsible for linking vertex
305 * and fragment shaders and stuffed texture coordinates.
307 * The rasterizer reads data from VAP, which produces vertex shader outputs,
308 * and GA, which produces stuffed texture coordinates. VAP outputs have
309 * precedence over GA. All outputs must be rasterized otherwise it locks up.
310 * If there are more outputs rasterized than is set in VAP/GA, it locks up
311 * too. The funky part is that this info has been pretty much obtained by trial
313 static void r300_update_rs_block(struct r300_context
*r300
)
315 struct r300_vertex_shader
*vs
= r300
->vs_state
.state
;
316 struct r300_shader_semantics
*vs_outputs
= &vs
->outputs
;
317 struct r300_shader_semantics
*fs_inputs
= &r300_fs(r300
)->shader
->inputs
;
318 struct r300_rs_block rs
= {0};
319 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0, count
, loc
= 0, tex_ptr
= 0;
320 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
321 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int, enum r300_rs_col_write_type
);
322 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
323 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
324 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
325 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
326 int *stream_loc_notcl
= r300
->stream_loc_notcl
;
328 if (r300
->screen
->caps
.is_r500
) {
329 rX00_rs_col
= r500_rs_col
;
330 rX00_rs_col_write
= r500_rs_col_write
;
331 rX00_rs_tex
= r500_rs_tex
;
332 rX00_rs_tex_write
= r500_rs_tex_write
;
334 rX00_rs_col
= r300_rs_col
;
335 rX00_rs_col_write
= r300_rs_col_write
;
336 rX00_rs_tex
= r300_rs_tex
;
337 rX00_rs_tex_write
= r300_rs_tex_write
;
340 /* 0x5555 copied from classic, which means:
341 * Select user color 0 for COLOR0 up to COLOR7.
342 * What the hell does that mean? */
343 rs
.vap_vtx_state_cntl
= 0x5555;
345 /* The position is always present in VAP. */
346 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_POS
;
347 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
;
348 stream_loc_notcl
[loc
++] = 0;
350 /* Set up the point size in VAP. */
351 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
352 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT
;
353 stream_loc_notcl
[loc
++] = 1;
356 /* Set up and rasterize colors. */
357 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
358 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
359 vs_outputs
->color
[1] != ATTR_UNUSED
) {
360 /* Set up the color in VAP. */
361 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
362 rs
.vap_out_vtx_fmt
[0] |=
363 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< i
;
364 stream_loc_notcl
[loc
++] = 2 + i
;
367 rX00_rs_col(&rs
, col_count
, col_count
, SWIZ_XYZW
);
369 /* Write it to the FS input register if it's needed by the FS. */
370 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
371 rX00_rs_col_write(&rs
, col_count
, fp_offset
, WRITE_COLOR
);
375 "r300: Rasterized color %i written to FS.\n", i
);
377 DBG(r300
, DBG_RS
, "r300: Rasterized color %i unused.\n", i
);
381 /* Skip the FS input register, leave it uninitialized. */
382 /* If we try to set it to (0,0,0,1), it will lock up. */
383 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
386 DBG(r300
, DBG_RS
, "r300: FS input color %i unassigned%s.\n",
392 /* Set up back-face colors. The rasterizer will do the color selection
394 if (any_bcolor_used
) {
395 if (r300
->two_sided_color
) {
396 /* Rasterize as back-face colors. */
397 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
398 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
399 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< (2+i
);
400 stream_loc_notcl
[loc
++] = 4 + i
;
403 /* Rasterize two fake texcoords to prevent from the two-sided color
405 /* XXX Consider recompiling the vertex shader to save 2 RS units. */
406 for (i
= 0; i
< 2; i
++) {
407 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
408 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
409 stream_loc_notcl
[loc
++] = 6 + tex_count
;
412 rX00_rs_tex(&rs
, tex_count
, tex_ptr
, SWIZ_XYZW
);
420 * Note that we can use either the two-sided color selection based on
421 * the front and back vertex shader colors, or gl_FrontFacing,
422 * but not both! It locks up otherwise.
424 * In Direct3D 9, the two-sided color selection can be used
425 * with shaders 2.0 only, while gl_FrontFacing can be used
426 * with shaders 3.0 only. The hardware apparently hasn't been designed
427 * to support both at the same time. */
428 if (r300
->screen
->caps
.is_r500
&& fs_inputs
->face
!= ATTR_UNUSED
&&
429 !(any_bcolor_used
&& r300
->two_sided_color
)) {
430 rX00_rs_col(&rs
, col_count
, col_count
, SWIZ_XYZW
);
431 rX00_rs_col_write(&rs
, col_count
, fp_offset
, WRITE_FACE
);
434 DBG(r300
, DBG_RS
, "r300: Rasterized FACE written to FS.\n");
437 /* Rasterize texture coordinates. */
438 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& tex_count
< 8; i
++) {
439 bool sprite_coord
= !!(r300
->sprite_coord_enable
& (1 << i
));
441 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
|| sprite_coord
) {
443 /* Set up the texture coordinates in VAP. */
444 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
445 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
446 stream_loc_notcl
[loc
++] = 6 + tex_count
;
450 rX00_rs_tex(&rs
, tex_count
, tex_ptr
,
451 sprite_coord
? SWIZ_XY01
: SWIZ_XYZW
);
453 /* Write it to the FS input register if it's needed by the FS. */
454 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
455 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
459 "r300: Rasterized generic %i written to FS%s.\n",
460 i
, sprite_coord
? " (sprite coord)" : "");
463 "r300: Rasterized generic %i unused%s.\n",
464 i
, sprite_coord
? " (sprite coord)" : "");
467 tex_ptr
+= sprite_coord
? 2 : 4;
469 /* Skip the FS input register, leave it uninitialized. */
470 /* If we try to set it to (0,0,0,1), it will lock up. */
471 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
474 DBG(r300
, DBG_RS
, "r300: FS input generic %i unassigned%s.\n",
475 i
, sprite_coord
? " (sprite coord)" : "");
480 if (DBG_ON(r300
, DBG_RS
)) {
481 for (; i
< ATTR_GENERIC_COUNT
; i
++) {
482 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
484 "r300: FS input generic %i unassigned.\n", i
);
489 /* Rasterize fog coordinates. */
490 if (vs_outputs
->fog
!= ATTR_UNUSED
&& tex_count
< 8) {
491 /* Set up the fog coordinates in VAP. */
492 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
493 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
494 stream_loc_notcl
[loc
++] = 6 + tex_count
;
497 rX00_rs_tex(&rs
, tex_count
, tex_ptr
, SWIZ_X001
);
499 /* Write it to the FS input register if it's needed by the FS. */
500 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
501 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
504 DBG(r300
, DBG_RS
, "r300: Rasterized fog written to FS.\n");
506 DBG(r300
, DBG_RS
, "r300: Rasterized fog unused.\n");
511 /* Skip the FS input register, leave it uninitialized. */
512 /* If we try to set it to (0,0,0,1), it will lock up. */
513 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
516 DBG(r300
, DBG_RS
, "r300: FS input fog unassigned.\n");
520 /* Rasterize WPOS. */
521 /* Don't set it in VAP if the FS doesn't need it. */
522 if (fs_inputs
->wpos
!= ATTR_UNUSED
&& tex_count
< 8) {
523 /* Set up the WPOS coordinates in VAP. */
524 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
525 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
526 stream_loc_notcl
[loc
++] = 6 + tex_count
;
529 rX00_rs_tex(&rs
, tex_count
, tex_ptr
, SWIZ_XYZW
);
531 /* Write it to the FS input register. */
532 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
534 DBG(r300
, DBG_RS
, "r300: Rasterized WPOS written to FS.\n");
541 /* Invalidate the rest of the no-TCL (GA) stream locations. */
543 stream_loc_notcl
[loc
++] = -1;
546 /* Rasterize at least one color, or bad things happen. */
547 if (col_count
== 0 && tex_count
== 0) {
548 rX00_rs_col(&rs
, 0, 0, SWIZ_0001
);
551 DBG(r300
, DBG_RS
, "r300: Rasterized color 0 to prevent lockups.\n");
554 DBG(r300
, DBG_RS
, "r300: --- Rasterizer status ---: colors: %i, "
555 "generics: %i.\n", col_count
, tex_count
);
557 rs
.count
= MIN2(tex_ptr
, 32) | (col_count
<< R300_IC_COUNT_SHIFT
) |
560 count
= MAX3(col_count
, tex_count
, 1);
561 rs
.inst_count
= count
- 1;
563 /* Now, after all that, see if we actually need to update the state. */
564 if (memcmp(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
))) {
565 memcpy(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
));
566 r300
->rs_block_state
.size
= 11 + count
*2;
570 static void r300_merge_textures_and_samplers(struct r300_context
* r300
)
572 struct r300_textures_state
*state
=
573 (struct r300_textures_state
*)r300
->textures_state
.state
;
574 struct r300_texture_sampler_state
*texstate
;
575 struct r300_sampler_state
*sampler
;
576 struct r300_sampler_view
*view
;
577 struct r300_texture
*tex
;
578 unsigned min_level
, max_level
, i
, j
, size
;
579 unsigned count
= MIN2(state
->sampler_view_count
,
580 state
->sampler_state_count
);
582 /* The KIL opcode fix, see below. */
583 if (!count
&& !r300
->screen
->caps
.is_r500
)
586 state
->tx_enable
= 0;
590 for (i
= 0; i
< count
; i
++) {
591 if (state
->sampler_views
[i
] && state
->sampler_states
[i
]) {
592 state
->tx_enable
|= 1 << i
;
594 view
= state
->sampler_views
[i
];
595 tex
= r300_texture(view
->base
.texture
);
596 sampler
= state
->sampler_states
[i
];
598 texstate
= &state
->regs
[i
];
599 texstate
->format
= view
->format
;
600 texstate
->filter0
= sampler
->filter0
;
601 texstate
->filter1
= sampler
->filter1
;
602 texstate
->border_color
= sampler
->border_color
;
604 /* determine min/max levels */
605 max_level
= MIN3(sampler
->max_lod
+ view
->base
.first_level
,
606 tex
->desc
.b
.b
.last_level
, view
->base
.last_level
);
607 min_level
= MIN2(sampler
->min_lod
+ view
->base
.first_level
,
610 if (tex
->desc
.is_npot
&& min_level
> 0) {
611 /* Even though we do not implement mipmapping for NPOT
612 * textures, we should at least honor the minimum level
613 * which is allowed to be displayed. We do this by setting up
614 * an i-th mipmap level as the zero level. */
615 r300_texture_setup_format_state(r300
->screen
, &tex
->desc
,
618 texstate
->format
.tile_config
|=
619 tex
->desc
.offset_in_bytes
[min_level
] & 0xffffffe0;
620 assert((tex
->desc
.offset_in_bytes
[min_level
] & 0x1f) == 0);
623 /* Assign a texture cache region. */
624 texstate
->format
.format1
|= view
->texcache_region
;
626 /* Depth textures are kinda special. */
627 if (util_format_is_depth_or_stencil(tex
->desc
.b
.b
.format
)) {
628 unsigned char depth_swizzle
[4];
630 if (!r300
->screen
->caps
.is_r500
&&
631 util_format_get_blocksizebits(tex
->desc
.b
.b
.format
) == 32) {
632 /* X24x8 is sampled as Y16X16 on r3xx-r4xx.
633 * The depth here is at the Y component. */
634 for (j
= 0; j
< 4; j
++)
635 depth_swizzle
[j
] = UTIL_FORMAT_SWIZZLE_Y
;
637 for (j
= 0; j
< 4; j
++)
638 depth_swizzle
[j
] = UTIL_FORMAT_SWIZZLE_X
;
641 /* If compare mode is disabled, sampler view swizzles
642 * are stored in the format.
643 * Otherwise, the swizzles must be applied after the compare
644 * mode in the fragment shader. */
645 if (sampler
->state
.compare_mode
== PIPE_TEX_COMPARE_NONE
) {
646 texstate
->format
.format1
|=
647 r300_get_swizzle_combined(depth_swizzle
,
650 texstate
->format
.format1
|=
651 r300_get_swizzle_combined(depth_swizzle
, 0);
655 /* to emulate 1D textures through 2D ones correctly */
656 if (tex
->desc
.b
.b
.target
== PIPE_TEXTURE_1D
) {
657 texstate
->filter0
&= ~R300_TX_WRAP_T_MASK
;
658 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
661 if (tex
->desc
.is_npot
) {
662 /* NPOT textures don't support mip filter, unfortunately.
663 * This prevents incorrect rendering. */
664 texstate
->filter0
&= ~R300_TX_MIN_FILTER_MIP_MASK
;
666 /* Mask out the mirrored flag. */
667 if (texstate
->filter0
& R300_TX_WRAP_S(R300_TX_MIRRORED
)) {
668 texstate
->filter0
&= ~R300_TX_WRAP_S(R300_TX_MIRRORED
);
670 if (texstate
->filter0
& R300_TX_WRAP_T(R300_TX_MIRRORED
)) {
671 texstate
->filter0
&= ~R300_TX_WRAP_T(R300_TX_MIRRORED
);
674 /* Change repeat to clamp-to-edge.
675 * (the repeat bit has a value of 0, no masking needed). */
676 if ((texstate
->filter0
& R300_TX_WRAP_S_MASK
) ==
677 R300_TX_WRAP_S(R300_TX_REPEAT
)) {
678 texstate
->filter0
|= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE
);
680 if ((texstate
->filter0
& R300_TX_WRAP_T_MASK
) ==
681 R300_TX_WRAP_T(R300_TX_REPEAT
)) {
682 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
685 /* the MAX_MIP level is the largest (finest) one */
686 texstate
->format
.format0
|= R300_TX_NUM_LEVELS(max_level
);
687 texstate
->filter0
|= R300_TX_MAX_MIP_LEVEL(min_level
);
690 texstate
->filter0
|= i
<< 28;
695 /* For the KIL opcode to work on r3xx-r4xx, the texture unit
696 * assigned to this opcode (it's always the first one) must be
697 * enabled. Otherwise the opcode doesn't work.
699 * In order to not depend on the fragment shader, we just make
700 * the first unit enabled all the time. */
701 if (i
== 0 && !r300
->screen
->caps
.is_r500
) {
702 pipe_sampler_view_reference(
703 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
704 &r300
->texkill_sampler
->base
);
706 state
->tx_enable
|= 1 << i
;
708 texstate
= &state
->regs
[i
];
710 /* Just set some valid state. */
711 texstate
->format
= r300
->texkill_sampler
->format
;
713 r300_translate_tex_filters(PIPE_TEX_FILTER_NEAREST
,
714 PIPE_TEX_FILTER_NEAREST
,
715 PIPE_TEX_FILTER_NEAREST
,
717 texstate
->filter1
= 0;
718 texstate
->border_color
= 0;
720 texstate
->filter0
|= i
<< 28;
727 r300
->textures_state
.size
= size
;
729 /* Pick a fragment shader based on either the texture compare state
730 * or the uses_pitch flag. */
731 if (r300
->fs
.state
&& count
) {
732 if (r300_pick_fragment_shader(r300
)) {
733 r300_mark_fs_code_dirty(r300
);
738 /* We can't use compressed zbuffers as samplers. */
739 static void r300_flush_depth_textures(struct r300_context
*r300
)
741 struct r300_textures_state
*state
=
742 (struct r300_textures_state
*)r300
->textures_state
.state
;
744 unsigned count
= MIN2(state
->sampler_view_count
,
745 state
->sampler_state_count
);
747 if (r300
->z_decomp_rd
)
750 for (i
= 0; i
< count
; i
++)
751 if (state
->sampler_views
[i
] && state
->sampler_states
[i
]) {
752 struct pipe_resource
*tex
= state
->sampler_views
[i
]->base
.texture
;
754 if (tex
->target
== PIPE_TEXTURE_3D
||
755 tex
->target
== PIPE_TEXTURE_CUBE
)
758 /* Ignore non-depth textures.
759 * Also ignore reinterpreted depth textures, e.g. resource_copy. */
760 if (!util_format_is_depth_or_stencil(tex
->format
))
763 for (level
= 0; level
<= tex
->last_level
; level
++)
764 if (r300_texture(tex
)->zmask_in_use
[level
]) {
765 /* We don't handle 3D textures and cubemaps yet. */
766 r300_flush_depth_stencil(&r300
->context
, tex
,
767 u_subresource(0, level
), 0);
772 void r300_update_derived_state(struct r300_context
* r300
)
774 r300_flush_depth_textures(r300
);
776 if (r300
->textures_state
.dirty
) {
777 r300_merge_textures_and_samplers(r300
);
780 if (r300
->rs_block_state
.dirty
) {
781 r300_update_rs_block(r300
);
784 memset(&r300
->vertex_info
, 0, sizeof(struct vertex_info
));
785 r300_draw_emit_all_attribs(r300
);
786 draw_compute_vertex_size(&r300
->vertex_info
);
787 r300_swtcl_vertex_psc(r300
);
791 r300_update_hyperz_state(r300
);