2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
30 #include "r300_context.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state_inlines.h"
35 #include "r300_texture.h"
38 /* r300_state_derived: Various bits of state which are dependent upon
39 * currently bound CSO data. */
41 enum r300_rs_swizzle
{
48 enum r300_rs_col_write_type
{
53 static void r300_draw_emit_attrib(struct r300_context
* r300
,
54 enum attrib_emit emit
,
55 enum interp_mode interp
,
58 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
59 struct tgsi_shader_info
* info
= &vs
->info
;
62 output
= draw_find_shader_output(r300
->draw
,
63 info
->output_semantic_name
[index
],
64 info
->output_semantic_index
[index
]);
65 draw_emit_vertex_attr(&r300
->vertex_info
, emit
, interp
, output
);
68 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
70 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
71 struct r300_shader_semantics
* vs_outputs
= &vs
->outputs
;
75 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
76 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
83 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
84 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
89 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
90 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
91 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
92 vs_outputs
->color
[i
]);
96 /* Back-face colors. */
97 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
98 if (vs_outputs
->bcolor
[i
] != ATTR_UNUSED
) {
99 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
100 vs_outputs
->bcolor
[i
]);
104 /* Texture coordinates. */
105 /* Only 8 generic vertex attributes can be used. If there are more,
106 * they won't be rasterized. */
108 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& gen_count
< 8; i
++) {
109 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
&&
110 !(r300
->sprite_coord_enable
& (1 << i
))) {
111 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
112 vs_outputs
->generic
[i
]);
117 /* Fog coordinates. */
118 if (gen_count
< 8 && vs_outputs
->fog
!= ATTR_UNUSED
) {
119 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
125 if (r300_fs(r300
)->shader
->inputs
.wpos
!= ATTR_UNUSED
&& gen_count
< 8) {
126 DBG(r300
, DBG_SWTCL
, "draw_emit_attrib: WPOS, index: %i\n",
128 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
133 /* Update the PSC tables for SW TCL, using Draw. */
134 static void r300_swtcl_vertex_psc(struct r300_context
*r300
)
136 struct r300_vertex_stream_state
*vstream
= r300
->vertex_stream_state
.state
;
137 struct vertex_info
*vinfo
= &r300
->vertex_info
;
138 uint16_t type
, swizzle
;
139 enum pipe_format format
;
140 unsigned i
, attrib_count
;
141 int* vs_output_tab
= r300
->stream_loc_notcl
;
143 memset(vstream
, 0, sizeof(struct r300_vertex_stream_state
));
145 /* For each Draw attribute, route it to the fragment shader according
146 * to the vs_output_tab. */
147 attrib_count
= vinfo
->num_attribs
;
148 DBG(r300
, DBG_SWTCL
, "r300: attrib count: %d\n", attrib_count
);
149 for (i
= 0; i
< attrib_count
; i
++) {
150 if (vs_output_tab
[i
] == -1) {
155 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
158 "r300: swtcl_vertex_psc [%i] <- %s\n",
159 vs_output_tab
[i
], util_format_short_name(format
));
161 /* Obtain the type of data in this attribute. */
162 type
= r300_translate_vertex_data_type(format
);
163 if (type
== R300_INVALID_FORMAT
) {
164 fprintf(stderr
, "r300: Bad vertex format %s.\n",
165 util_format_short_name(format
));
170 type
|= vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
172 /* Obtain the swizzle for this attribute. Note that the default
173 * swizzle in the hardware is not XYZW! */
174 swizzle
= r300_translate_vertex_data_swizzle(format
);
176 /* Add the attribute to the PSC table. */
178 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
179 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
181 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
182 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
186 /* Set the last vector in the PSC. */
190 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
191 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
193 vstream
->count
= (i
>> 1) + 1;
194 r300_mark_atom_dirty(r300
, &r300
->vertex_stream_state
);
195 r300
->vertex_stream_state
.size
= (1 + vstream
->count
) * 2;
198 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
199 enum r300_rs_swizzle swiz
)
201 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
202 if (swiz
== SWIZ_0001
) {
203 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
205 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
207 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
210 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
,
211 enum r300_rs_col_write_type type
)
213 assert(type
== WRITE_COLOR
);
214 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
215 R300_RS_INST_COL_ADDR(fp_offset
);
218 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
219 enum r300_rs_swizzle swiz
)
221 if (swiz
== SWIZ_X001
) {
222 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
) |
223 R300_RS_SEL_S(R300_RS_SEL_C0
) |
224 R300_RS_SEL_T(R300_RS_SEL_K0
) |
225 R300_RS_SEL_R(R300_RS_SEL_K0
) |
226 R300_RS_SEL_Q(R300_RS_SEL_K1
);
227 } else if (swiz
== SWIZ_XY01
) {
228 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
) |
229 R300_RS_SEL_S(R300_RS_SEL_C0
) |
230 R300_RS_SEL_T(R300_RS_SEL_C1
) |
231 R300_RS_SEL_R(R300_RS_SEL_K0
) |
232 R300_RS_SEL_Q(R300_RS_SEL_K1
);
234 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
) |
235 R300_RS_SEL_S(R300_RS_SEL_C0
) |
236 R300_RS_SEL_T(R300_RS_SEL_C1
) |
237 R300_RS_SEL_R(R300_RS_SEL_C2
) |
238 R300_RS_SEL_Q(R300_RS_SEL_C3
);
240 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
243 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
245 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
246 R300_RS_INST_TEX_ADDR(fp_offset
);
249 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
250 enum r300_rs_swizzle swiz
)
252 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
253 if (swiz
== SWIZ_0001
) {
254 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
256 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
258 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
261 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
,
262 enum r300_rs_col_write_type type
)
264 if (type
== WRITE_FACE
)
265 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE_BACKFACE
|
266 R500_RS_INST_COL_ADDR(fp_offset
);
268 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
269 R500_RS_INST_COL_ADDR(fp_offset
);
273 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
274 enum r300_rs_swizzle swiz
)
276 if (swiz
== SWIZ_X001
) {
277 rs
->ip
[id
] |= R500_RS_SEL_S(ptr
) |
278 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
279 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
280 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
281 } else if (swiz
== SWIZ_XY01
) {
282 rs
->ip
[id
] |= R500_RS_SEL_S(ptr
) |
283 R500_RS_SEL_T(ptr
+ 1) |
284 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
285 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
287 rs
->ip
[id
] |= R500_RS_SEL_S(ptr
) |
288 R500_RS_SEL_T(ptr
+ 1) |
289 R500_RS_SEL_R(ptr
+ 2) |
290 R500_RS_SEL_Q(ptr
+ 3);
292 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
295 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
297 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
298 R500_RS_INST_TEX_ADDR(fp_offset
);
301 /* Set up the RS block.
303 * This is the part of the chipset that is responsible for linking vertex
304 * and fragment shaders and stuffed texture coordinates.
306 * The rasterizer reads data from VAP, which produces vertex shader outputs,
307 * and GA, which produces stuffed texture coordinates. VAP outputs have
308 * precedence over GA. All outputs must be rasterized otherwise it locks up.
309 * If there are more outputs rasterized than is set in VAP/GA, it locks up
310 * too. The funky part is that this info has been pretty much obtained by trial
312 static void r300_update_rs_block(struct r300_context
*r300
)
314 struct r300_vertex_shader
*vs
= r300
->vs_state
.state
;
315 struct r300_shader_semantics
*vs_outputs
= &vs
->outputs
;
316 struct r300_shader_semantics
*fs_inputs
= &r300_fs(r300
)->shader
->inputs
;
317 struct r300_rs_block rs
= {0};
318 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0, count
, loc
= 0, tex_ptr
= 0;
319 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
320 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int, enum r300_rs_col_write_type
);
321 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
322 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
323 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
324 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
325 int *stream_loc_notcl
= r300
->stream_loc_notcl
;
326 uint32_t stuffing_enable
= 0;
328 if (r300
->screen
->caps
.is_r500
) {
329 rX00_rs_col
= r500_rs_col
;
330 rX00_rs_col_write
= r500_rs_col_write
;
331 rX00_rs_tex
= r500_rs_tex
;
332 rX00_rs_tex_write
= r500_rs_tex_write
;
334 rX00_rs_col
= r300_rs_col
;
335 rX00_rs_col_write
= r300_rs_col_write
;
336 rX00_rs_tex
= r300_rs_tex
;
337 rX00_rs_tex_write
= r300_rs_tex_write
;
340 /* 0x5555 copied from classic, which means:
341 * Select user color 0 for COLOR0 up to COLOR7.
342 * What the hell does that mean? */
343 rs
.vap_vtx_state_cntl
= 0x5555;
345 /* The position is always present in VAP. */
346 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_POS
;
347 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
;
348 stream_loc_notcl
[loc
++] = 0;
350 /* Set up the point size in VAP. */
351 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
352 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT
;
353 stream_loc_notcl
[loc
++] = 1;
356 /* Set up and rasterize colors. */
357 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
358 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
359 vs_outputs
->color
[1] != ATTR_UNUSED
) {
360 /* Set up the color in VAP. */
361 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
362 rs
.vap_out_vtx_fmt
[0] |=
363 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< i
;
364 stream_loc_notcl
[loc
++] = 2 + i
;
367 rX00_rs_col(&rs
, col_count
, col_count
, SWIZ_XYZW
);
369 /* Write it to the FS input register if it's needed by the FS. */
370 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
371 rX00_rs_col_write(&rs
, col_count
, fp_offset
, WRITE_COLOR
);
375 "r300: Rasterized color %i written to FS.\n", i
);
377 DBG(r300
, DBG_RS
, "r300: Rasterized color %i unused.\n", i
);
381 /* Skip the FS input register, leave it uninitialized. */
382 /* If we try to set it to (0,0,0,1), it will lock up. */
383 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
386 DBG(r300
, DBG_RS
, "r300: FS input color %i unassigned%s.\n",
392 /* Set up back-face colors. The rasterizer will do the color selection
394 if (any_bcolor_used
) {
395 if (r300
->two_sided_color
) {
396 /* Rasterize as back-face colors. */
397 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
398 rs
.vap_vsm_vtx_assm
|= R300_INPUT_CNTL_COLOR
;
399 rs
.vap_out_vtx_fmt
[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT
<< (2+i
);
400 stream_loc_notcl
[loc
++] = 4 + i
;
403 /* Rasterize two fake texcoords to prevent from the two-sided color
405 /* XXX Consider recompiling the vertex shader to save 2 RS units. */
406 for (i
= 0; i
< 2; i
++) {
407 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
408 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
409 stream_loc_notcl
[loc
++] = 6 + tex_count
;
412 rX00_rs_tex(&rs
, tex_count
, tex_ptr
, SWIZ_XYZW
);
420 * Note that we can use either the two-sided color selection based on
421 * the front and back vertex shader colors, or gl_FrontFacing,
422 * but not both! It locks up otherwise.
424 * In Direct3D 9, the two-sided color selection can be used
425 * with shaders 2.0 only, while gl_FrontFacing can be used
426 * with shaders 3.0 only. The hardware apparently hasn't been designed
427 * to support both at the same time. */
428 if (r300
->screen
->caps
.is_r500
&& fs_inputs
->face
!= ATTR_UNUSED
&&
429 !(any_bcolor_used
&& r300
->two_sided_color
)) {
430 rX00_rs_col(&rs
, col_count
, col_count
, SWIZ_XYZW
);
431 rX00_rs_col_write(&rs
, col_count
, fp_offset
, WRITE_FACE
);
434 DBG(r300
, DBG_RS
, "r300: Rasterized FACE written to FS.\n");
435 } else if (fs_inputs
->face
!= ATTR_UNUSED
) {
436 fprintf(stderr
, "r300: ERROR: FS input FACE unassigned.\n");
439 /* Rasterize texture coordinates. */
440 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& tex_count
< 8; i
++) {
441 bool sprite_coord
= false;
443 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
444 sprite_coord
= !!(r300
->sprite_coord_enable
& (1 << i
));
447 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
|| sprite_coord
) {
449 /* Set up the texture coordinates in VAP. */
450 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
451 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
452 stream_loc_notcl
[loc
++] = 6 + tex_count
;
455 R300_GB_TEX_ST
<< (R300_GB_TEX0_SOURCE_SHIFT
+ (tex_count
*2));
458 rX00_rs_tex(&rs
, tex_count
, tex_ptr
,
459 sprite_coord
? SWIZ_XY01
: SWIZ_XYZW
);
461 /* Write it to the FS input register if it's needed by the FS. */
462 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
463 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
467 "r300: Rasterized generic %i written to FS%s in texcoord %d.\n",
468 i
, sprite_coord
? " (sprite coord)" : "", tex_count
);
471 "r300: Rasterized generic %i unused%s.\n",
472 i
, sprite_coord
? " (sprite coord)" : "");
475 tex_ptr
+= sprite_coord
? 2 : 4;
477 /* Skip the FS input register, leave it uninitialized. */
478 /* If we try to set it to (0,0,0,1), it will lock up. */
479 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
482 DBG(r300
, DBG_RS
, "r300: FS input generic %i unassigned%s.\n",
483 i
, sprite_coord
? " (sprite coord)" : "");
488 for (; i
< ATTR_GENERIC_COUNT
; i
++) {
489 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
490 fprintf(stderr
, "r300: ERROR: FS input generic %i unassigned, "
491 "not enough hardware slots (it's not a bug, do not "
496 /* Rasterize fog coordinates. */
497 if (vs_outputs
->fog
!= ATTR_UNUSED
&& tex_count
< 8) {
498 /* Set up the fog coordinates in VAP. */
499 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
500 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
501 stream_loc_notcl
[loc
++] = 6 + tex_count
;
504 rX00_rs_tex(&rs
, tex_count
, tex_ptr
, SWIZ_X001
);
506 /* Write it to the FS input register if it's needed by the FS. */
507 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
508 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
511 DBG(r300
, DBG_RS
, "r300: Rasterized fog written to FS.\n");
513 DBG(r300
, DBG_RS
, "r300: Rasterized fog unused.\n");
518 /* Skip the FS input register, leave it uninitialized. */
519 /* If we try to set it to (0,0,0,1), it will lock up. */
520 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
524 DBG(r300
, DBG_RS
, "r300: FS input fog unassigned.\n");
526 fprintf(stderr
, "r300: ERROR: FS input fog unassigned, "
527 "not enough hardware slots. (it's not a bug, "
528 "do not report it)\n");
533 /* Rasterize WPOS. */
534 /* Don't set it in VAP if the FS doesn't need it. */
535 if (fs_inputs
->wpos
!= ATTR_UNUSED
&& tex_count
< 8) {
536 /* Set up the WPOS coordinates in VAP. */
537 rs
.vap_vsm_vtx_assm
|= (R300_INPUT_CNTL_TC0
<< tex_count
);
538 rs
.vap_out_vtx_fmt
[1] |= (4 << (3 * tex_count
));
539 stream_loc_notcl
[loc
++] = 6 + tex_count
;
542 rX00_rs_tex(&rs
, tex_count
, tex_ptr
, SWIZ_XYZW
);
544 /* Write it to the FS input register. */
545 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
547 DBG(r300
, DBG_RS
, "r300: Rasterized WPOS written to FS.\n");
553 if (fs_inputs
->wpos
!= ATTR_UNUSED
&& tex_count
>= 8) {
554 fprintf(stderr
, "r300: ERROR: FS input WPOS unassigned, "
555 "not enough hardware slots. (it's not a bug, do not "
560 /* Invalidate the rest of the no-TCL (GA) stream locations. */
562 stream_loc_notcl
[loc
++] = -1;
565 /* Rasterize at least one color, or bad things happen. */
566 if (col_count
== 0 && tex_count
== 0) {
567 rX00_rs_col(&rs
, 0, 0, SWIZ_0001
);
570 DBG(r300
, DBG_RS
, "r300: Rasterized color 0 to prevent lockups.\n");
573 DBG(r300
, DBG_RS
, "r300: --- Rasterizer status ---: colors: %i, "
574 "generics: %i.\n", col_count
, tex_count
);
576 rs
.count
= MIN2(tex_ptr
, 32) | (col_count
<< R300_IC_COUNT_SHIFT
) |
579 count
= MAX3(col_count
, tex_count
, 1);
580 rs
.inst_count
= count
- 1;
582 /* set the GB enable flags */
583 if (r300
->sprite_coord_enable
)
584 stuffing_enable
|= R300_GB_POINT_STUFF_ENABLE
;
586 rs
.gb_enable
= stuffing_enable
;
588 /* Now, after all that, see if we actually need to update the state. */
589 if (memcmp(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
))) {
590 memcpy(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
));
591 r300
->rs_block_state
.size
= 13 + count
*2;
595 static uint32_t r300_get_border_color(enum pipe_format format
,
596 const float border
[4],
599 const struct util_format_description
*desc
;
600 float border_swizzled
[4] = {0};
602 union util_color uc
= {0};
604 desc
= util_format_description(format
);
606 /* Do depth formats first. */
607 if (util_format_is_depth_or_stencil(format
)) {
609 case PIPE_FORMAT_Z16_UNORM
:
610 return util_pack_z(PIPE_FORMAT_Z16_UNORM
, border
[0]);
611 case PIPE_FORMAT_X8Z24_UNORM
:
612 case PIPE_FORMAT_S8_USCALED_Z24_UNORM
:
614 return util_pack_z(PIPE_FORMAT_X8Z24_UNORM
, border
[0]);
616 return util_pack_z(PIPE_FORMAT_Z16_UNORM
, border
[0]) << 16;
624 /* Apply inverse swizzle of the format. */
625 for (i
= 0; i
< 4; i
++) {
626 switch (desc
->swizzle
[i
]) {
627 case UTIL_FORMAT_SWIZZLE_X
:
628 border_swizzled
[2] = border
[i
];
630 case UTIL_FORMAT_SWIZZLE_Y
:
631 border_swizzled
[1] = border
[i
];
633 case UTIL_FORMAT_SWIZZLE_Z
:
634 border_swizzled
[0] = border
[i
];
636 case UTIL_FORMAT_SWIZZLE_W
:
637 border_swizzled
[3] = border
[i
];
642 /* Compressed formats. */
643 if (util_format_is_compressed(format
)) {
645 case PIPE_FORMAT_RGTC1_SNORM
:
646 case PIPE_FORMAT_RGTC1_UNORM
:
647 case PIPE_FORMAT_LATC1_SNORM
:
648 case PIPE_FORMAT_LATC1_UNORM
:
649 /* Add 1/32 to round the border color instead of truncating. */
650 /* The Y component is used for the border color. */
651 border_swizzled
[1] = border_swizzled
[2] + 1.0f
/32;
652 util_pack_color(border_swizzled
, PIPE_FORMAT_B4G4R4A4_UNORM
, &uc
);
654 case PIPE_FORMAT_RGTC2_SNORM
:
655 case PIPE_FORMAT_LATC2_SNORM
:
656 border_swizzled
[0] = border_swizzled
[2];
657 util_pack_color(border_swizzled
, PIPE_FORMAT_R8G8B8A8_SNORM
, &uc
);
659 case PIPE_FORMAT_RGTC2_UNORM
:
660 case PIPE_FORMAT_LATC2_UNORM
:
661 util_pack_color(border_swizzled
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
664 util_pack_color(border_swizzled
, PIPE_FORMAT_R8G8B8A8_UNORM
, &uc
);
669 switch (desc
->channel
[0].size
) {
671 util_pack_color(border_swizzled
, PIPE_FORMAT_B2G3R3_UNORM
, &uc
);
675 util_pack_color(border_swizzled
, PIPE_FORMAT_B4G4R4A4_UNORM
, &uc
);
679 if (desc
->channel
[1].size
== 5) {
680 util_pack_color(border_swizzled
, PIPE_FORMAT_B5G5R5A1_UNORM
, &uc
);
681 } else if (desc
->channel
[1].size
== 6) {
682 util_pack_color(border_swizzled
, PIPE_FORMAT_B5G6R5_UNORM
, &uc
);
690 util_pack_color(border_swizzled
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
694 util_pack_color(border_swizzled
, PIPE_FORMAT_B10G10R10A2_UNORM
, &uc
);
698 if (desc
->nr_channels
<= 2) {
699 border_swizzled
[0] = border_swizzled
[2];
700 if (desc
->channel
[0].type
== UTIL_FORMAT_TYPE_FLOAT
) {
701 util_pack_color(border_swizzled
, PIPE_FORMAT_R16G16_FLOAT
, &uc
);
703 util_pack_color(border_swizzled
, PIPE_FORMAT_R16G16_UNORM
, &uc
);
706 util_pack_color(border_swizzled
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
711 if (desc
->nr_channels
== 1) {
712 border_swizzled
[0] = border_swizzled
[2];
713 util_pack_color(border_swizzled
, PIPE_FORMAT_R32_FLOAT
, &uc
);
715 util_pack_color(border_swizzled
, PIPE_FORMAT_B8G8R8A8_UNORM
, &uc
);
723 static boolean
util_format_is_float(enum pipe_format format
)
725 const struct util_format_description
*desc
= util_format_description(format
);
731 /* Find the first non-void channel. */
732 for (i
= 0; i
< 4; i
++)
733 if (desc
->channel
[i
].type
!= UTIL_FORMAT_TYPE_VOID
)
739 return desc
->channel
[i
].type
== UTIL_FORMAT_TYPE_FLOAT
? TRUE
: FALSE
;
742 static void r300_merge_textures_and_samplers(struct r300_context
* r300
)
744 struct r300_textures_state
*state
=
745 (struct r300_textures_state
*)r300
->textures_state
.state
;
746 struct r300_texture_sampler_state
*texstate
;
747 struct r300_sampler_state
*sampler
;
748 struct r300_sampler_view
*view
;
749 struct r300_resource
*tex
;
750 unsigned min_level
, max_level
, i
, j
, size
;
751 unsigned count
= MIN2(state
->sampler_view_count
,
752 state
->sampler_state_count
);
754 /* The KIL opcode fix, see below. */
755 if (!count
&& !r300
->screen
->caps
.is_r500
)
758 state
->tx_enable
= 0;
762 for (i
= 0; i
< count
; i
++) {
763 if (state
->sampler_views
[i
] && state
->sampler_states
[i
]) {
764 state
->tx_enable
|= 1 << i
;
766 view
= state
->sampler_views
[i
];
767 tex
= r300_resource(view
->base
.texture
);
768 sampler
= state
->sampler_states
[i
];
770 texstate
= &state
->regs
[i
];
771 texstate
->format
= view
->format
;
772 texstate
->filter0
= sampler
->filter0
;
773 texstate
->filter1
= sampler
->filter1
;
775 /* Set the border color. */
776 texstate
->border_color
=
777 r300_get_border_color(view
->base
.format
,
778 sampler
->state
.border_color
,
779 r300
->screen
->caps
.is_r500
);
781 /* determine min/max levels */
782 max_level
= MIN3(sampler
->max_lod
+ view
->base
.u
.tex
.first_level
,
783 tex
->b
.b
.b
.last_level
, view
->base
.u
.tex
.last_level
);
784 min_level
= MIN2(sampler
->min_lod
+ view
->base
.u
.tex
.first_level
,
787 if (tex
->tex
.is_npot
&& min_level
> 0) {
788 /* Even though we do not implement mipmapping for NPOT
789 * textures, we should at least honor the minimum level
790 * which is allowed to be displayed. We do this by setting up
791 * the i-th mipmap level as the zero level. */
792 unsigned offset
= tex
->tex_offset
+
793 tex
->tex
.offset_in_bytes
[min_level
];
795 r300_texture_setup_format_state(r300
->screen
, tex
,
798 texstate
->format
.tile_config
|= offset
& 0xffffffe0;
799 assert((offset
& 0x1f) == 0);
801 texstate
->format
.tile_config
|= tex
->tex_offset
& 0xffffffe0;
802 assert((tex
->tex_offset
& 0x1f) == 0);
805 /* Assign a texture cache region. */
806 texstate
->format
.format1
|= view
->texcache_region
;
808 /* Depth textures are kinda special. */
809 if (util_format_is_depth_or_stencil(tex
->b
.b
.b
.format
)) {
810 unsigned char depth_swizzle
[4];
812 if (!r300
->screen
->caps
.is_r500
&&
813 util_format_get_blocksizebits(tex
->b
.b
.b
.format
) == 32) {
814 /* X24x8 is sampled as Y16X16 on r3xx-r4xx.
815 * The depth here is at the Y component. */
816 for (j
= 0; j
< 4; j
++)
817 depth_swizzle
[j
] = UTIL_FORMAT_SWIZZLE_Y
;
819 for (j
= 0; j
< 4; j
++)
820 depth_swizzle
[j
] = UTIL_FORMAT_SWIZZLE_X
;
823 /* If compare mode is disabled, sampler view swizzles
824 * are stored in the format.
825 * Otherwise, the swizzles must be applied after the compare
826 * mode in the fragment shader. */
827 if (sampler
->state
.compare_mode
== PIPE_TEX_COMPARE_NONE
) {
828 texstate
->format
.format1
|=
829 r300_get_swizzle_combined(depth_swizzle
,
830 view
->swizzle
, FALSE
);
832 texstate
->format
.format1
|=
833 r300_get_swizzle_combined(depth_swizzle
, 0, FALSE
);
837 if (r300
->screen
->caps
.dxtc_swizzle
&&
838 util_format_is_compressed(tex
->b
.b
.b
.format
)) {
839 texstate
->filter1
|= R400_DXTC_SWIZZLE_ENABLE
;
842 /* to emulate 1D textures through 2D ones correctly */
843 if (tex
->b
.b
.b
.target
== PIPE_TEXTURE_1D
) {
844 texstate
->filter0
&= ~R300_TX_WRAP_T_MASK
;
845 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
848 if (tex
->tex
.is_npot
) {
849 /* NPOT textures don't support mip filter, unfortunately.
850 * This prevents incorrect rendering. */
851 texstate
->filter0
&= ~R300_TX_MIN_FILTER_MIP_MASK
;
853 /* Mask out the mirrored flag. */
854 if (texstate
->filter0
& R300_TX_WRAP_S(R300_TX_MIRRORED
)) {
855 texstate
->filter0
&= ~R300_TX_WRAP_S(R300_TX_MIRRORED
);
857 if (texstate
->filter0
& R300_TX_WRAP_T(R300_TX_MIRRORED
)) {
858 texstate
->filter0
&= ~R300_TX_WRAP_T(R300_TX_MIRRORED
);
861 /* Change repeat to clamp-to-edge.
862 * (the repeat bit has a value of 0, no masking needed). */
863 if ((texstate
->filter0
& R300_TX_WRAP_S_MASK
) ==
864 R300_TX_WRAP_S(R300_TX_REPEAT
)) {
865 texstate
->filter0
|= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE
);
867 if ((texstate
->filter0
& R300_TX_WRAP_T_MASK
) ==
868 R300_TX_WRAP_T(R300_TX_REPEAT
)) {
869 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
872 /* the MAX_MIP level is the largest (finest) one */
873 texstate
->format
.format0
|= R300_TX_NUM_LEVELS(max_level
);
874 texstate
->filter0
|= R300_TX_MAX_MIP_LEVEL(min_level
);
877 /* Float textures only support nearest and mip-nearest filtering. */
878 if (util_format_is_float(tex
->b
.b
.b
.format
)) {
879 /* No MAG linear filtering. */
880 if ((texstate
->filter0
& R300_TX_MAG_FILTER_MASK
) ==
881 R300_TX_MAG_FILTER_LINEAR
) {
882 texstate
->filter0
&= ~R300_TX_MAG_FILTER_MASK
;
883 texstate
->filter0
|= R300_TX_MAG_FILTER_NEAREST
;
885 /* No MIN linear filtering. */
886 if ((texstate
->filter0
& R300_TX_MIN_FILTER_MASK
) ==
887 R300_TX_MIN_FILTER_LINEAR
) {
888 texstate
->filter0
&= ~R300_TX_MIN_FILTER_MASK
;
889 texstate
->filter0
|= R300_TX_MIN_FILTER_NEAREST
;
891 /* No mipmap linear filtering. */
892 if ((texstate
->filter0
& R300_TX_MIN_FILTER_MIP_MASK
) ==
893 R300_TX_MIN_FILTER_MIP_LINEAR
) {
894 texstate
->filter0
&= ~R300_TX_MIN_FILTER_MIP_MASK
;
895 texstate
->filter0
|= R300_TX_MIN_FILTER_MIP_NEAREST
;
897 /* No anisotropic filtering. */
898 texstate
->filter0
&= ~R300_TX_MAX_ANISO_MASK
;
899 texstate
->filter1
&= ~R500_TX_MAX_ANISO_MASK
;
900 texstate
->filter1
&= ~R500_TX_ANISO_HIGH_QUALITY
;
903 texstate
->filter0
|= i
<< 28;
908 /* For the KIL opcode to work on r3xx-r4xx, the texture unit
909 * assigned to this opcode (it's always the first one) must be
910 * enabled. Otherwise the opcode doesn't work.
912 * In order to not depend on the fragment shader, we just make
913 * the first unit enabled all the time. */
914 if (i
== 0 && !r300
->screen
->caps
.is_r500
) {
915 pipe_sampler_view_reference(
916 (struct pipe_sampler_view
**)&state
->sampler_views
[i
],
917 &r300
->texkill_sampler
->base
);
919 state
->tx_enable
|= 1 << i
;
921 texstate
= &state
->regs
[i
];
923 /* Just set some valid state. */
924 texstate
->format
= r300
->texkill_sampler
->format
;
926 r300_translate_tex_filters(PIPE_TEX_FILTER_NEAREST
,
927 PIPE_TEX_FILTER_NEAREST
,
928 PIPE_TEX_FILTER_NEAREST
,
930 texstate
->filter1
= 0;
931 texstate
->border_color
= 0;
933 texstate
->filter0
|= i
<< 28;
940 r300
->textures_state
.size
= size
;
942 /* Pick a fragment shader based on either the texture compare state
943 * or the uses_pitch flag. */
944 if (r300
->fs
.state
&& count
) {
945 if (r300_pick_fragment_shader(r300
)) {
946 r300_mark_fs_code_dirty(r300
);
951 static void r300_decompress_depth_textures(struct r300_context
*r300
)
953 struct r300_textures_state
*state
=
954 (struct r300_textures_state
*)r300
->textures_state
.state
;
955 struct pipe_resource
*tex
;
956 unsigned count
= MIN2(state
->sampler_view_count
,
957 state
->sampler_state_count
);
960 if (!r300
->hyperz_locked
|| !r300
->locked_zbuffer
) {
964 for (i
= 0; i
< count
; i
++) {
965 if (state
->sampler_views
[i
] && state
->sampler_states
[i
]) {
966 tex
= state
->sampler_views
[i
]->base
.texture
;
968 if (tex
== r300
->locked_zbuffer
->texture
) {
969 r300_decompress_zmask_locked(r300
);
976 void r300_update_derived_state(struct r300_context
* r300
)
978 if (r300
->textures_state
.dirty
) {
979 r300_decompress_depth_textures(r300
);
980 r300_merge_textures_and_samplers(r300
);
983 if (r300
->rs_block_state
.dirty
) {
984 r300_update_rs_block(r300
);
987 memset(&r300
->vertex_info
, 0, sizeof(struct vertex_info
));
988 r300_draw_emit_all_attribs(r300
);
989 draw_compute_vertex_size(&r300
->vertex_info
);
990 r300_swtcl_vertex_psc(r300
);
994 r300_update_hyperz_state(r300
);