Merge branch 'mesa_7_6_branch'
[mesa.git] / src / gallium / drivers / r300 / r300_state_derived.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "r300_state_derived.h"
24
25 #include "r300_fs.h"
26 #include "r300_state_inlines.h"
27 #include "r300_vs.h"
28
29 /* r300_state_derived: Various bits of state which are dependent upon
30 * currently bound CSO data. */
31
32 /* Set up the vs_tab and routes. */
33 static void r300_vs_tab_routes(struct r300_context* r300,
34 struct r300_vertex_format* vformat)
35 {
36 struct r300_screen* r300screen = r300_screen(r300->context.screen);
37 struct vertex_info* vinfo = &vformat->vinfo;
38 int* tab = vformat->vs_tab;
39 boolean pos = FALSE, psize = FALSE, fog = FALSE;
40 int i, texs = 0, cols = 0;
41 struct tgsi_shader_info* info;
42
43 if (r300screen->caps->has_tcl) {
44 /* Use vertex shader to determine required routes. */
45 info = &r300->vs->info;
46 } else {
47 /* Use fragment shader to determine required routes. */
48 info = &r300->fs->info;
49 }
50
51 assert(info->num_inputs <= 16);
52
53 if (!r300screen->caps->has_tcl || !r300->rs_state->enable_vte)
54 {
55 for (i = 0; i < info->num_inputs; i++) {
56 switch (info->input_semantic_name[i]) {
57 case TGSI_SEMANTIC_POSITION:
58 pos = TRUE;
59 tab[i] = 0;
60 break;
61 case TGSI_SEMANTIC_COLOR:
62 tab[i] = 2 + cols;
63 cols++;
64 break;
65 case TGSI_SEMANTIC_PSIZE:
66 psize = TRUE;
67 tab[i] = 15;
68 break;
69 case TGSI_SEMANTIC_FOG:
70 fog = TRUE;
71 /* Fall through */
72 case TGSI_SEMANTIC_GENERIC:
73 tab[i] = 6 + texs;
74 texs++;
75 break;
76 default:
77 debug_printf("r300: Unknown vertex input %d\n",
78 info->input_semantic_name[i]);
79 break;
80 }
81 }
82 }
83 else
84 {
85 /* Just copy vert attribs over as-is. */
86 for (i = 0; i < info->num_inputs; i++) {
87 tab[i] = i;
88 }
89
90 for (i = 0; i < info->num_outputs; i++) {
91 switch (info->output_semantic_name[i]) {
92 case TGSI_SEMANTIC_POSITION:
93 pos = TRUE;
94 break;
95 case TGSI_SEMANTIC_COLOR:
96 cols++;
97 break;
98 case TGSI_SEMANTIC_PSIZE:
99 psize = TRUE;
100 break;
101 case TGSI_SEMANTIC_FOG:
102 fog = TRUE;
103 /* Fall through */
104 case TGSI_SEMANTIC_GENERIC:
105 texs++;
106 break;
107 default:
108 debug_printf("r300: Unknown vertex output %d\n",
109 info->output_semantic_name[i]);
110 break;
111 }
112 }
113 }
114
115 /* XXX magic */
116 assert(texs <= 8);
117
118 /* Do the actual vertex_info setup.
119 *
120 * vertex_info has four uints of hardware-specific data in it.
121 * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL
122 * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM
123 * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0
124 * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */
125
126 vinfo->hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */
127
128 if (!pos) {
129 debug_printf("r300: Forcing vertex position attribute emit...\n");
130 /* Make room for the position attribute
131 * at the beginning of the tab. */
132 for (i = 15; i > 0; i--) {
133 tab[i] = tab[i-1];
134 }
135 tab[0] = 0;
136 }
137 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
138 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0));
139 vinfo->hwfmt[1] |= R300_INPUT_CNTL_POS;
140 vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
141
142 if (psize) {
143 draw_emit_vertex_attr(vinfo, EMIT_1F_PSIZE, INTERP_POS,
144 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_PSIZE, 0));
145 vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
146 }
147
148 for (i = 0; i < cols; i++) {
149 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_LINEAR,
150 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_COLOR, i));
151 vinfo->hwfmt[1] |= R300_INPUT_CNTL_COLOR;
152 vinfo->hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i);
153 }
154
155 /* Init i right here, increment it if fog is enabled.
156 * This gets around a double-increment problem. */
157 i = 0;
158
159 if (fog) {
160 i++;
161 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
162 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0));
163 vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i);
164 vinfo->hwfmt[3] |= (4 << (3 * i));
165 }
166
167 for (i; i < texs; i++) {
168 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
169 draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i));
170 vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i);
171 vinfo->hwfmt[3] |= (4 << (3 * i));
172 }
173
174 /* Handle the case where the vertex shader will be generating some of
175 * the attribs based on its inputs. */
176 if (r300screen->caps->has_tcl &&
177 info->num_inputs < info->num_outputs) {
178 vinfo->num_attribs = info->num_inputs;
179 }
180
181 draw_compute_vertex_size(vinfo);
182 }
183
184 /* Update the PSC tables. */
185 static void r300_vertex_psc(struct r300_context* r300,
186 struct r300_vertex_format* vformat)
187 {
188 struct r300_screen* r300screen = r300_screen(r300->context.screen);
189 struct vertex_info* vinfo = &vformat->vinfo;
190 int* tab = vformat->vs_tab;
191 uint32_t temp;
192 int i, attrib_count;
193
194 /* Vertex shaders have no semantics on their inputs,
195 * so PSC should just route stuff based on their info,
196 * and not on attrib information. */
197 if (r300screen->caps->has_tcl) {
198 attrib_count = r300->vs->info.num_inputs;
199 DBG(r300, DBG_DRAW, "r300: routing %d attribs in psc for vs\n",
200 attrib_count);
201 } else {
202 attrib_count = vinfo->num_attribs;
203 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
204 for (i = 0; i < attrib_count; i++) {
205 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
206 " tab %d\n", vinfo->attrib[i].src_index,
207 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
208 tab[i]);
209 }
210 }
211
212 for (i = 0; i < attrib_count; i++) {
213 /* Make sure we have a proper destination for our attribute */
214 assert(tab[i] != -1);
215
216 /* Add the attribute to the PSC table. */
217 temp = r300screen->caps->has_tcl ?
218 R300_DATA_TYPE_FLOAT_4 :
219 translate_vertex_data_type(vinfo->attrib[i].emit);
220 temp |= tab[i] << R300_DST_VEC_LOC_SHIFT;
221
222 if (i & 1) {
223 vformat->vap_prog_stream_cntl[i >> 1] &= 0x0000ffff;
224 vformat->vap_prog_stream_cntl[i >> 1] |= temp << 16;
225
226 vformat->vap_prog_stream_cntl_ext[i >> 1] |=
227 (R300_VAP_SWIZZLE_XYZW << 16);
228 } else {
229 vformat->vap_prog_stream_cntl[i >> 1] &= 0xffff0000;
230 vformat->vap_prog_stream_cntl[i >> 1] |= temp << 0;
231
232 vformat->vap_prog_stream_cntl_ext[i >> 1] |=
233 (R300_VAP_SWIZZLE_XYZW << 0);
234 }
235 }
236
237 /* Set the last vector in the PSC. */
238 i--;
239 vformat->vap_prog_stream_cntl[i >> 1] |=
240 (R300_LAST_VEC << (i & 1 ? 16 : 0));
241 }
242
243 /* Update the vertex format. */
244 static void r300_update_vertex_format(struct r300_context* r300)
245 {
246 struct r300_vertex_format vformat;
247 int i;
248
249 memset(&vformat, 0, sizeof(struct r300_vertex_format));
250 for (i = 0; i < 16; i++) {
251 vformat.vs_tab[i] = -1;
252 vformat.fs_tab[i] = -1;
253 }
254
255 r300_vs_tab_routes(r300, &vformat);
256
257 r300_vertex_psc(r300, &vformat);
258
259 if (memcmp(&r300->vertex_info, &vformat,
260 sizeof(struct r300_vertex_format))) {
261 memcpy(&r300->vertex_info, &vformat,
262 sizeof(struct r300_vertex_format));
263 r300->dirty_state |= R300_NEW_VERTEX_FORMAT;
264 }
265 }
266
267 /* Set up the mappings from GB to US, for RS block. */
268 static void r300_update_fs_tab(struct r300_context* r300)
269 {
270 struct r300_vertex_format* vformat = &r300->vertex_info;
271 struct tgsi_shader_info* info = &r300->fs->info;
272 int i, cols = 0, texs = 0, cols_emitted = 0;
273 int* tab = vformat->fs_tab;
274
275 for (i = 0; i < 16; i++) {
276 tab[i] = -1;
277 }
278
279 assert(info->num_inputs <= 16);
280 for (i = 0; i < info->num_inputs; i++) {
281 switch (info->input_semantic_name[i]) {
282 case TGSI_SEMANTIC_COLOR:
283 tab[i] = INTERP_LINEAR;
284 cols++;
285 break;
286 case TGSI_SEMANTIC_POSITION:
287 case TGSI_SEMANTIC_PSIZE:
288 debug_printf("r300: Implementation error: Can't use "
289 "pos attribs in fragshader yet!\n");
290 /* Pass through for now */
291 case TGSI_SEMANTIC_FOG:
292 case TGSI_SEMANTIC_GENERIC:
293 tab[i] = INTERP_PERSPECTIVE;
294 break;
295 default:
296 debug_printf("r300: Unknown vertex input %d\n",
297 info->input_semantic_name[i]);
298 break;
299 }
300 }
301
302 /* Now that we know where everything is... */
303 DBG(r300, DBG_DRAW, "r300: fp input count: %d\n", info->num_inputs);
304 for (i = 0; i < info->num_inputs; i++) {
305 switch (tab[i]) {
306 case INTERP_LINEAR:
307 DBG(r300, DBG_DRAW, "r300: attrib: "
308 "stack offset %d, color, tab %d\n",
309 i, cols_emitted);
310 tab[i] = cols_emitted;
311 cols_emitted++;
312 break;
313 case INTERP_PERSPECTIVE:
314 DBG(r300, DBG_DRAW, "r300: attrib: "
315 "stack offset %d, texcoord, tab %d\n",
316 i, cols + texs);
317 tab[i] = cols + texs;
318 texs++;
319 break;
320 case -1:
321 debug_printf("r300: Implementation error: Bad fp interp!\n");
322 default:
323 break;
324 }
325 }
326
327 }
328
329 /* Set up the RS block. This is the part of the chipset that actually does
330 * the rasterization of vertices into fragments. This is also the part of the
331 * chipset that locks up if any part of it is even slightly wrong. */
332 static void r300_update_rs_block(struct r300_context* r300)
333 {
334 struct r300_rs_block* rs = r300->rs_block;
335 struct tgsi_shader_info* info = &r300->fs->info;
336 int* tab = r300->vertex_info.fs_tab;
337 int col_count = 0, fp_offset = 0, i, memory_pos, tex_count = 0;
338
339 memset(rs, 0, sizeof(struct r300_rs_block));
340
341 if (r300_screen(r300->context.screen)->caps->is_r500) {
342 for (i = 0; i < info->num_inputs; i++) {
343 assert(tab[i] != -1);
344 memory_pos = tab[i] * 4;
345 switch (info->input_semantic_name[i]) {
346 case TGSI_SEMANTIC_COLOR:
347 rs->ip[col_count] |=
348 R500_RS_COL_PTR(memory_pos) |
349 R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
350 col_count++;
351 break;
352 case TGSI_SEMANTIC_GENERIC:
353 rs->ip[tex_count] |=
354 R500_RS_SEL_S(memory_pos) |
355 R500_RS_SEL_T(memory_pos + 1) |
356 R500_RS_SEL_R(memory_pos + 2) |
357 R500_RS_SEL_Q(memory_pos + 3);
358 tex_count++;
359 break;
360 default:
361 break;
362 }
363 }
364
365 if (col_count == 0) {
366 rs->ip[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
367 }
368
369 if (tex_count == 0) {
370 rs->ip[0] |=
371 R500_RS_SEL_S(R500_RS_IP_PTR_K0) |
372 R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
373 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
374 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
375 }
376
377 /* Rasterize at least one color, or bad things happen. */
378 if ((col_count == 0) && (tex_count == 0)) {
379 col_count++;
380 }
381
382 for (i = 0; i < tex_count; i++) {
383 rs->inst[i] |= R500_RS_INST_TEX_ID(i) |
384 R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_offset);
385 fp_offset++;
386 }
387
388 for (i = 0; i < col_count; i++) {
389 rs->inst[i] |= R500_RS_INST_COL_ID(i) |
390 R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_offset);
391 fp_offset++;
392 }
393 } else {
394 for (i = 0; i < info->num_inputs; i++) {
395 assert(tab[i] != -1);
396 memory_pos = tab[i] * 4;
397 switch (info->input_semantic_name[i]) {
398 case TGSI_SEMANTIC_COLOR:
399 rs->ip[col_count] |=
400 R300_RS_COL_PTR(memory_pos) |
401 R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
402 col_count++;
403 break;
404 case TGSI_SEMANTIC_GENERIC:
405 rs->ip[tex_count] |=
406 R300_RS_TEX_PTR(memory_pos) |
407 R300_RS_SEL_S(R300_RS_SEL_C0) |
408 R300_RS_SEL_T(R300_RS_SEL_C1) |
409 R300_RS_SEL_R(R300_RS_SEL_C2) |
410 R300_RS_SEL_Q(R300_RS_SEL_C3);
411 tex_count++;
412 break;
413 default:
414 break;
415 }
416 }
417
418 if (col_count == 0) {
419 rs->ip[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
420 }
421
422 if (tex_count == 0) {
423 rs->ip[0] |=
424 R300_RS_SEL_S(R300_RS_SEL_K0) |
425 R300_RS_SEL_T(R300_RS_SEL_K0) |
426 R300_RS_SEL_R(R300_RS_SEL_K0) |
427 R300_RS_SEL_Q(R300_RS_SEL_K1);
428 }
429
430 /* Rasterize at least one color, or bad things happen. */
431 if ((col_count == 0) && (tex_count == 0)) {
432 col_count++;
433 }
434
435 for (i = 0; i < tex_count; i++) {
436 rs->inst[i] |= R300_RS_INST_TEX_ID(i) |
437 R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_offset);
438 fp_offset++;
439 }
440
441 for (i = 0; i < col_count; i++) {
442 rs->inst[i] |= R300_RS_INST_COL_ID(i) |
443 R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_offset);
444 fp_offset++;
445 }
446 }
447
448 rs->count = (tex_count * 4) | (col_count << R300_IC_COUNT_SHIFT) |
449 R300_HIRES_EN;
450
451 rs->inst_count = MAX2(MAX2(col_count - 1, tex_count - 1), 0);
452 }
453
454 void r300_update_derived_state(struct r300_context* r300)
455 {
456 if (r300->dirty_state &
457 (R300_NEW_FRAGMENT_SHADER | R300_NEW_VERTEX_SHADER)) {
458 r300_update_vertex_format(r300);
459 }
460
461 if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) {
462 r300_update_fs_tab(r300);
463 r300_update_rs_block(r300);
464 }
465 }