Merge branch 'master' into glsl-pp-rework-2
[mesa.git] / src / gallium / drivers / r300 / r300_state_derived.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28
29 #include "r300_context.h"
30 #include "r300_fs.h"
31 #include "r300_screen.h"
32 #include "r300_shader_semantics.h"
33 #include "r300_state_derived.h"
34 #include "r300_state_inlines.h"
35 #include "r300_vs.h"
36
37 /* r300_state_derived: Various bits of state which are dependent upon
38 * currently bound CSO data. */
39
40 struct r300_shader_key {
41 struct r300_vertex_shader* vs;
42 struct r300_fragment_shader* fs;
43 };
44
45 struct r300_shader_derived_value {
46 struct r300_vertex_format* vformat;
47 struct r300_rs_block* rs_block;
48 };
49
50 unsigned r300_shader_key_hash(void* key) {
51 struct r300_shader_key* shader_key = (struct r300_shader_key*)key;
52 unsigned vs = (intptr_t)shader_key->vs;
53 unsigned fs = (intptr_t)shader_key->fs;
54
55 return (vs << 16) | (fs & 0xffff);
56 }
57
58 int r300_shader_key_compare(void* key1, void* key2) {
59 struct r300_shader_key* shader_key1 = (struct r300_shader_key*)key1;
60 struct r300_shader_key* shader_key2 = (struct r300_shader_key*)key2;
61
62 return (shader_key1->vs == shader_key2->vs) &&
63 (shader_key1->fs == shader_key2->fs);
64 }
65
66 static void r300_draw_emit_attrib(struct r300_context* r300,
67 enum attrib_emit emit,
68 enum interp_mode interp,
69 int index)
70 {
71 struct tgsi_shader_info* info = &r300->vs->info;
72 int output;
73
74 output = draw_find_vs_output(r300->draw,
75 info->output_semantic_name[index],
76 info->output_semantic_index[index]);
77 draw_emit_vertex_attr(&r300->vertex_info->vinfo, emit, interp, output);
78 }
79
80 static void r300_draw_emit_all_attribs(struct r300_context* r300)
81 {
82 struct r300_shader_semantics* vs_outputs = &r300->vs->outputs;
83 int i, gen_count;
84
85 /* Position. */
86 if (vs_outputs->pos != ATTR_UNUSED) {
87 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
88 vs_outputs->pos);
89 } else {
90 assert(0);
91 }
92
93 /* Point size. */
94 if (vs_outputs->psize != ATTR_UNUSED) {
95 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
96 vs_outputs->psize);
97 }
98
99 /* Colors. */
100 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
101 if (vs_outputs->color[i] != ATTR_UNUSED) {
102 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
103 vs_outputs->color[i]);
104 }
105 }
106
107 /* XXX Back-face colors. */
108
109 /* Texture coordinates. */
110 gen_count = 0;
111 for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
112 if (vs_outputs->generic[i] != ATTR_UNUSED) {
113 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
114 vs_outputs->generic[i]);
115 gen_count++;
116 }
117 }
118
119 /* Fog coordinates. */
120 if (vs_outputs->fog != ATTR_UNUSED) {
121 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
122 vs_outputs->fog);
123 gen_count++;
124 }
125
126 /* XXX magic */
127 assert(gen_count <= 8);
128 }
129
130 /* Update the PSC tables. */
131 static void r300_vertex_psc(struct r300_context* r300)
132 {
133 struct r300_vertex_info *vformat = r300->vertex_info;
134 uint16_t type, swizzle;
135 enum pipe_format format;
136 unsigned i;
137 int identity[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
138 int* stream_tab;
139
140 /* If TCL is bypassed, map vertex streams to equivalent VS output
141 * locations. */
142 if (r300->rs_state->enable_vte) {
143 stream_tab = identity;
144 } else {
145 stream_tab = r300->vs->stream_loc_notcl;
146 }
147
148 /* Vertex shaders have no semantics on their inputs,
149 * so PSC should just route stuff based on the vertex elements,
150 * and not on attrib information. */
151 DBG(r300, DBG_DRAW, "r300: vs expects %d attribs, routing %d elements"
152 " in psc\n",
153 r300->vs->info.num_inputs,
154 r300->vertex_element_count);
155
156 for (i = 0; i < r300->vertex_element_count; i++) {
157 format = r300->vertex_element[i].src_format;
158
159 type = r300_translate_vertex_data_type(format) |
160 (stream_tab[i] << R300_DST_VEC_LOC_SHIFT);
161 swizzle = r300_translate_vertex_data_swizzle(format);
162
163 if (i & 1) {
164 vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
165 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
166 } else {
167 vformat->vap_prog_stream_cntl[i >> 1] |= type;
168 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
169 }
170 }
171
172 assert(i <= 15);
173
174 /* Set the last vector in the PSC. */
175 if (i) {
176 i -= 1;
177 }
178 vformat->vap_prog_stream_cntl[i >> 1] |=
179 (R300_LAST_VEC << (i & 1 ? 16 : 0));
180 }
181
182 /* Update the PSC tables for SW TCL, using Draw. */
183 static void r300_swtcl_vertex_psc(struct r300_context* r300)
184 {
185 struct r300_vertex_info *vformat = r300->vertex_info;
186 struct vertex_info* vinfo = &vformat->vinfo;
187 uint16_t type, swizzle;
188 enum pipe_format format;
189 unsigned i, attrib_count;
190 int* vs_output_tab = r300->vs->stream_loc_notcl;
191
192 /* For each Draw attribute, route it to the fragment shader according
193 * to the vs_output_tab. */
194 attrib_count = vinfo->num_attribs;
195 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
196 for (i = 0; i < attrib_count; i++) {
197 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
198 " vs_output_tab %d\n", vinfo->attrib[i].src_index,
199 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
200 vs_output_tab[i]);
201 }
202
203 for (i = 0; i < attrib_count; i++) {
204 /* Make sure we have a proper destination for our attribute. */
205 assert(vs_output_tab[i] != -1);
206
207 format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
208
209 /* Obtain the type of data in this attribute. */
210 type = r300_translate_vertex_data_type(format) |
211 vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
212
213 /* Obtain the swizzle for this attribute. Note that the default
214 * swizzle in the hardware is not XYZW! */
215 swizzle = r300_translate_vertex_data_swizzle(format);
216
217 /* Add the attribute to the PSC table. */
218 if (i & 1) {
219 vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
220 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
221 } else {
222 vformat->vap_prog_stream_cntl[i >> 1] |= type;
223 vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
224 }
225 }
226
227 /* Set the last vector in the PSC. */
228 if (i) {
229 i -= 1;
230 }
231 vformat->vap_prog_stream_cntl[i >> 1] |=
232 (R300_LAST_VEC << (i & 1 ? 16 : 0));
233 }
234
235 static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
236 boolean swizzle_0001)
237 {
238 rs->ip[id] |= R300_RS_COL_PTR(ptr);
239 if (swizzle_0001) {
240 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
241 } else {
242 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
243 }
244 rs->inst[id] |= R300_RS_INST_COL_ID(id);
245 }
246
247 static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
248 {
249 rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
250 R300_RS_INST_COL_ADDR(fp_offset);
251 }
252
253 static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
254 boolean swizzle_X001)
255 {
256 if (swizzle_X001) {
257 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
258 R300_RS_SEL_S(R300_RS_SEL_C0) |
259 R300_RS_SEL_T(R300_RS_SEL_K0) |
260 R300_RS_SEL_R(R300_RS_SEL_K0) |
261 R300_RS_SEL_Q(R300_RS_SEL_K1);
262 } else {
263 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
264 R300_RS_SEL_S(R300_RS_SEL_C0) |
265 R300_RS_SEL_T(R300_RS_SEL_C1) |
266 R300_RS_SEL_R(R300_RS_SEL_C2) |
267 R300_RS_SEL_Q(R300_RS_SEL_C3);
268 }
269 rs->inst[id] |= R300_RS_INST_TEX_ID(id);
270 }
271
272 static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
273 {
274 rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
275 R300_RS_INST_TEX_ADDR(fp_offset);
276 }
277
278 static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
279 boolean swizzle_0001)
280 {
281 rs->ip[id] |= R500_RS_COL_PTR(ptr);
282 if (swizzle_0001) {
283 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
284 } else {
285 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
286 }
287 rs->inst[id] |= R500_RS_INST_COL_ID(id);
288 }
289
290 static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
291 {
292 rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
293 R500_RS_INST_COL_ADDR(fp_offset);
294 }
295
296 static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
297 boolean swizzle_X001)
298 {
299 int rs_tex_comp = ptr*4;
300
301 if (swizzle_X001) {
302 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
303 R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
304 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
305 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
306 } else {
307 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
308 R500_RS_SEL_T(rs_tex_comp + 1) |
309 R500_RS_SEL_R(rs_tex_comp + 2) |
310 R500_RS_SEL_Q(rs_tex_comp + 3);
311 }
312 rs->inst[id] |= R500_RS_INST_TEX_ID(id);
313 }
314
315 static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
316 {
317 rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
318 R500_RS_INST_TEX_ADDR(fp_offset);
319 }
320
321 /* Set up the RS block.
322 *
323 * This is the part of the chipset that actually does the rasterization
324 * of vertices into fragments. This is also the part of the chipset that
325 * locks up if any part of it is even slightly wrong. */
326 static void r300_update_rs_block(struct r300_context* r300,
327 struct r300_shader_semantics* vs_outputs,
328 struct r300_shader_semantics* fs_inputs)
329 {
330 struct r300_rs_block* rs = r300->rs_block;
331 int i, col_count = 0, tex_count = 0, fp_offset = 0;
332 void (*rX00_rs_col)(struct r300_rs_block*, int, int, boolean);
333 void (*rX00_rs_col_write)(struct r300_rs_block*, int, int);
334 void (*rX00_rs_tex)(struct r300_rs_block*, int, int, boolean);
335 void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
336
337 if (r300_screen(r300->context.screen)->caps->is_r500) {
338 rX00_rs_col = r500_rs_col;
339 rX00_rs_col_write = r500_rs_col_write;
340 rX00_rs_tex = r500_rs_tex;
341 rX00_rs_tex_write = r500_rs_tex_write;
342 } else {
343 rX00_rs_col = r300_rs_col;
344 rX00_rs_col_write = r300_rs_col_write;
345 rX00_rs_tex = r300_rs_tex;
346 rX00_rs_tex_write = r300_rs_tex_write;
347 }
348
349 /* Rasterize colors. */
350 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
351 if (vs_outputs->color[i] != ATTR_UNUSED) {
352 /* Always rasterize if it's written by the VS,
353 * otherwise it locks up. */
354 rX00_rs_col(rs, col_count, i, FALSE);
355
356 /* Write it to the FS input register if it's used by the FS. */
357 if (fs_inputs->color[i] != ATTR_UNUSED) {
358 rX00_rs_col_write(rs, col_count, fp_offset);
359 fp_offset++;
360 }
361 col_count++;
362 } else {
363 /* Skip the FS input register, leave it uninitialized. */
364 /* If we try to set it to (0,0,0,1), it will lock up. */
365 if (fs_inputs->color[i] != ATTR_UNUSED) {
366 fp_offset++;
367 }
368 }
369 }
370
371 /* Rasterize texture coordinates. */
372 for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
373 if (vs_outputs->generic[i] != ATTR_UNUSED) {
374 /* Always rasterize if it's written by the VS,
375 * otherwise it locks up. */
376 rX00_rs_tex(rs, tex_count, tex_count, FALSE);
377
378 /* Write it to the FS input register if it's used by the FS. */
379 if (fs_inputs->generic[i] != ATTR_UNUSED) {
380 rX00_rs_tex_write(rs, tex_count, fp_offset);
381 fp_offset++;
382 }
383 tex_count++;
384 } else {
385 /* Skip the FS input register, leave it uninitialized. */
386 /* If we try to set it to (0,0,0,1), it will lock up. */
387 if (fs_inputs->generic[i] != ATTR_UNUSED) {
388 fp_offset++;
389 }
390 }
391 }
392
393 /* Rasterize fog coordinates. */
394 if (vs_outputs->fog != ATTR_UNUSED) {
395 /* Always rasterize if it's written by the VS,
396 * otherwise it locks up. */
397 rX00_rs_tex(rs, tex_count, tex_count, TRUE);
398
399 /* Write it to the FS input register if it's used by the FS. */
400 if (fs_inputs->fog != ATTR_UNUSED) {
401 rX00_rs_tex_write(rs, tex_count, fp_offset);
402 fp_offset++;
403 }
404 tex_count++;
405 } else {
406 /* Skip the FS input register, leave it uninitialized. */
407 /* If we try to set it to (0,0,0,1), it will lock up. */
408 if (fs_inputs->fog != ATTR_UNUSED) {
409 fp_offset++;
410 }
411 }
412
413 /* Rasterize at least one color, or bad things happen. */
414 if (col_count == 0 && tex_count == 0) {
415 rX00_rs_col(rs, 0, 0, TRUE);
416 col_count++;
417 }
418
419 rs->count = (tex_count*4) | (col_count << R300_IC_COUNT_SHIFT) |
420 R300_HIRES_EN;
421
422 rs->inst_count = MAX3(col_count - 1, tex_count - 1, 0);
423 }
424
425 /* Update the vertex format. */
426 static void r300_update_derived_shader_state(struct r300_context* r300)
427 {
428 struct r300_screen* r300screen = r300_screen(r300->context.screen);
429
430 /*
431 struct r300_shader_key* key;
432 struct r300_shader_derived_value* value;
433 key = CALLOC_STRUCT(r300_shader_key);
434 key->vs = r300->vs;
435 key->fs = r300->fs;
436
437 value = (struct r300_shader_derived_value*)
438 util_hash_table_get(r300->shader_hash_table, (void*)key);
439 if (value) {
440 //vformat = value->vformat;
441 rs_block = value->rs_block;
442
443 FREE(key);
444 } else {
445 rs_block = CALLOC_STRUCT(r300_rs_block);
446 value = CALLOC_STRUCT(r300_shader_derived_value);
447
448 r300_update_rs_block(r300, rs_block);
449
450 //value->vformat = vformat;
451 value->rs_block = rs_block;
452 util_hash_table_set(r300->shader_hash_table,
453 (void*)key, (void*)value);
454 } */
455
456 /* Reset structures */
457 memset(r300->rs_block, 0, sizeof(struct r300_rs_block));
458 memset(r300->vertex_info, 0, sizeof(struct r300_vertex_info));
459 memcpy(r300->vertex_info->vinfo.hwfmt, r300->vs->hwfmt, sizeof(uint)*4);
460
461 r300_update_rs_block(r300, &r300->vs->outputs, &r300->fs->inputs);
462
463 if (r300screen->caps->has_tcl) {
464 r300_vertex_psc(r300);
465 } else {
466 r300_draw_emit_all_attribs(r300);
467 draw_compute_vertex_size(&r300->vertex_info->vinfo);
468 r300_swtcl_vertex_psc(r300);
469 }
470
471 r300->dirty_state |= R300_NEW_RS_BLOCK;
472 }
473
474 static boolean r300_dsa_writes_depth_stencil(struct r300_dsa_state* dsa)
475 {
476 /* We are interested only in the cases when a new depth or stencil value
477 * can be written and changed. */
478
479 /* We might optionally check for [Z func: never] and inspect the stencil
480 * state in a similar fashion, but it's not terribly important. */
481 return (dsa->z_buffer_control & R300_Z_WRITE_ENABLE) ||
482 (dsa->stencil_ref_mask & R300_STENCILWRITEMASK_MASK) ||
483 ((dsa->z_buffer_control & R500_STENCIL_REFMASK_FRONT_BACK) &&
484 (dsa->stencil_ref_bf & R300_STENCILWRITEMASK_MASK));
485 }
486
487 static boolean r300_dsa_alpha_test_enabled(struct r300_dsa_state* dsa)
488 {
489 /* We are interested only in the cases when alpha testing can kill
490 * a fragment. */
491 uint32_t af = dsa->alpha_function;
492
493 return (af & R300_FG_ALPHA_FUNC_ENABLE) &&
494 (af & R300_FG_ALPHA_FUNC_ALWAYS) != R300_FG_ALPHA_FUNC_ALWAYS;
495 }
496
497 static void r300_update_ztop(struct r300_context* r300)
498 {
499 r300->ztop_state.z_buffer_top = R300_ZTOP_ENABLE;
500
501 /* This is important enough that I felt it warranted a comment.
502 *
503 * According to the docs, these are the conditions where ZTOP must be
504 * disabled:
505 * 1) Alpha testing enabled
506 * 2) Texture kill instructions in fragment shader
507 * 3) Chroma key culling enabled
508 * 4) W-buffering enabled
509 *
510 * The docs claim that for the first three cases, if no ZS writes happen,
511 * then ZTOP can be used.
512 *
513 * (3) will never apply since we do not support chroma-keyed operations.
514 * (4) will need to be re-examined (and this comment updated) if/when
515 * Hyper-Z becomes supported.
516 *
517 * Additionally, the following conditions require disabled ZTOP:
518 * 5) Depth writes in fragment shader
519 * 6) Outstanding occlusion queries
520 *
521 * ~C.
522 */
523
524 /* ZS writes */
525 if (r300_dsa_writes_depth_stencil(r300->dsa_state) &&
526 (r300_dsa_alpha_test_enabled(r300->dsa_state) || /* (1) */
527 r300->fs->info.uses_kill)) { /* (2) */
528 r300->ztop_state.z_buffer_top = R300_ZTOP_DISABLE;
529 } else if (r300_fragment_shader_writes_depth(r300->fs)) { /* (5) */
530 r300->ztop_state.z_buffer_top = R300_ZTOP_DISABLE;
531 } else if (r300->query_current) { /* (6) */
532 r300->ztop_state.z_buffer_top = R300_ZTOP_DISABLE;
533 }
534 }
535
536 void r300_update_derived_state(struct r300_context* r300)
537 {
538 if (r300->dirty_state &
539 (R300_NEW_FRAGMENT_SHADER | R300_NEW_VERTEX_SHADER |
540 R300_NEW_VERTEX_FORMAT)) {
541 r300_update_derived_shader_state(r300);
542 }
543
544 if (r300->dirty_state &
545 (R300_NEW_DSA | R300_NEW_FRAGMENT_SHADER | R300_NEW_QUERY)) {
546 r300_update_ztop(r300);
547 }
548 }