2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
29 #include "r300_context.h"
31 #include "r300_screen.h"
32 #include "r300_shader_semantics.h"
33 #include "r300_state_derived.h"
34 #include "r300_state_inlines.h"
37 /* r300_state_derived: Various bits of state which are dependent upon
38 * currently bound CSO data. */
40 static void r300_draw_emit_attrib(struct r300_context
* r300
,
41 enum attrib_emit emit
,
42 enum interp_mode interp
,
45 struct tgsi_shader_info
* info
= &r300
->vs
->info
;
48 output
= draw_find_shader_output(r300
->draw
,
49 info
->output_semantic_name
[index
],
50 info
->output_semantic_index
[index
]);
51 draw_emit_vertex_attr(&r300
->vertex_info
->vinfo
, emit
, interp
, output
);
54 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
56 struct r300_shader_semantics
* vs_outputs
= &r300
->vs
->outputs
;
60 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
61 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
68 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
69 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
74 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
75 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
76 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
77 vs_outputs
->color
[i
]);
81 /* XXX Back-face colors. */
83 /* Texture coordinates. */
85 for (i
= 0; i
< ATTR_GENERIC_COUNT
; i
++) {
86 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
87 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
88 vs_outputs
->generic
[i
]);
93 /* Fog coordinates. */
94 if (vs_outputs
->fog
!= ATTR_UNUSED
) {
95 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
101 assert(gen_count
<= 8);
104 /* Update the PSC tables. */
105 static void r300_vertex_psc(struct r300_context
* r300
)
107 struct r300_vertex_info
*vformat
= r300
->vertex_info
;
108 uint16_t type
, swizzle
;
109 enum pipe_format format
;
111 int identity
[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
114 /* If TCL is bypassed, map vertex streams to equivalent VS output
116 if (r300
->tcl_bypass
) {
117 stream_tab
= r300
->vs
->stream_loc_notcl
;
119 stream_tab
= identity
;
122 /* Vertex shaders have no semantics on their inputs,
123 * so PSC should just route stuff based on the vertex elements,
124 * and not on attrib information. */
125 DBG(r300
, DBG_DRAW
, "r300: vs expects %d attribs, routing %d elements"
127 r300
->vs
->info
.num_inputs
,
128 r300
->vertex_element_count
);
130 for (i
= 0; i
< r300
->vertex_element_count
; i
++) {
131 format
= r300
->vertex_element
[i
].src_format
;
133 type
= r300_translate_vertex_data_type(format
) |
134 (stream_tab
[i
] << R300_DST_VEC_LOC_SHIFT
);
135 swizzle
= r300_translate_vertex_data_swizzle(format
);
138 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
139 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
141 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
142 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
148 /* Set the last vector in the PSC. */
152 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
153 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
156 /* Update the PSC tables for SW TCL, using Draw. */
157 static void r300_swtcl_vertex_psc(struct r300_context
* r300
)
159 struct r300_vertex_info
*vformat
= r300
->vertex_info
;
160 struct vertex_info
* vinfo
= &vformat
->vinfo
;
161 uint16_t type
, swizzle
;
162 enum pipe_format format
;
163 unsigned i
, attrib_count
;
164 int* vs_output_tab
= r300
->vs
->stream_loc_notcl
;
166 /* For each Draw attribute, route it to the fragment shader according
167 * to the vs_output_tab. */
168 attrib_count
= vinfo
->num_attribs
;
169 DBG(r300
, DBG_DRAW
, "r300: attrib count: %d\n", attrib_count
);
170 for (i
= 0; i
< attrib_count
; i
++) {
171 DBG(r300
, DBG_DRAW
, "r300: attrib: offset %d, interp %d, size %d,"
172 " vs_output_tab %d\n", vinfo
->attrib
[i
].src_index
,
173 vinfo
->attrib
[i
].interp_mode
, vinfo
->attrib
[i
].emit
,
177 for (i
= 0; i
< attrib_count
; i
++) {
178 /* Make sure we have a proper destination for our attribute. */
179 assert(vs_output_tab
[i
] != -1);
181 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
183 /* Obtain the type of data in this attribute. */
184 type
= r300_translate_vertex_data_type(format
) |
185 vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
187 /* Obtain the swizzle for this attribute. Note that the default
188 * swizzle in the hardware is not XYZW! */
189 swizzle
= r300_translate_vertex_data_swizzle(format
);
191 /* Add the attribute to the PSC table. */
193 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
194 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
196 vformat
->vap_prog_stream_cntl
[i
>> 1] |= type
;
197 vformat
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
201 /* Set the last vector in the PSC. */
205 vformat
->vap_prog_stream_cntl
[i
>> 1] |=
206 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
209 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
210 boolean swizzle_0001
)
212 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
214 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
216 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
218 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
221 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
223 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
224 R300_RS_INST_COL_ADDR(fp_offset
);
227 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
228 boolean swizzle_X001
)
231 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
232 R300_RS_SEL_S(R300_RS_SEL_C0
) |
233 R300_RS_SEL_T(R300_RS_SEL_K0
) |
234 R300_RS_SEL_R(R300_RS_SEL_K0
) |
235 R300_RS_SEL_Q(R300_RS_SEL_K1
);
237 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
238 R300_RS_SEL_S(R300_RS_SEL_C0
) |
239 R300_RS_SEL_T(R300_RS_SEL_C1
) |
240 R300_RS_SEL_R(R300_RS_SEL_C2
) |
241 R300_RS_SEL_Q(R300_RS_SEL_C3
);
243 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
246 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
248 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
249 R300_RS_INST_TEX_ADDR(fp_offset
);
252 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
253 boolean swizzle_0001
)
255 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
257 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
259 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
261 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
264 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
266 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
267 R500_RS_INST_COL_ADDR(fp_offset
);
270 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
271 boolean swizzle_X001
)
273 int rs_tex_comp
= ptr
*4;
276 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
277 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
278 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
279 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
281 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
282 R500_RS_SEL_T(rs_tex_comp
+ 1) |
283 R500_RS_SEL_R(rs_tex_comp
+ 2) |
284 R500_RS_SEL_Q(rs_tex_comp
+ 3);
286 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
289 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
291 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
292 R500_RS_INST_TEX_ADDR(fp_offset
);
295 /* Set up the RS block.
297 * This is the part of the chipset that actually does the rasterization
298 * of vertices into fragments. This is also the part of the chipset that
299 * locks up if any part of it is even slightly wrong. */
300 static void r300_update_rs_block(struct r300_context
* r300
,
301 struct r300_shader_semantics
* vs_outputs
,
302 struct r300_shader_semantics
* fs_inputs
)
304 struct r300_rs_block
* rs
= r300
->rs_block
;
305 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0;
306 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, boolean
);
307 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int);
308 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, boolean
);
309 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
310 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
311 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
313 if (r300_screen(r300
->context
.screen
)->caps
->is_r500
) {
314 rX00_rs_col
= r500_rs_col
;
315 rX00_rs_col_write
= r500_rs_col_write
;
316 rX00_rs_tex
= r500_rs_tex
;
317 rX00_rs_tex_write
= r500_rs_tex_write
;
319 rX00_rs_col
= r300_rs_col
;
320 rX00_rs_col_write
= r300_rs_col_write
;
321 rX00_rs_tex
= r300_rs_tex
;
322 rX00_rs_tex_write
= r300_rs_tex_write
;
325 /* Rasterize colors. */
326 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
327 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
328 vs_outputs
->color
[1] != ATTR_UNUSED
) {
329 /* Always rasterize if it's written by the VS,
330 * otherwise it locks up. */
331 rX00_rs_col(rs
, col_count
, i
, FALSE
);
333 /* Write it to the FS input register if it's used by the FS. */
334 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
335 rX00_rs_col_write(rs
, col_count
, fp_offset
);
340 /* Skip the FS input register, leave it uninitialized. */
341 /* If we try to set it to (0,0,0,1), it will lock up. */
342 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
348 /* Rasterize texture coordinates. */
349 for (i
= 0; i
< ATTR_GENERIC_COUNT
; i
++) {
350 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
351 /* Always rasterize if it's written by the VS,
352 * otherwise it locks up. */
353 rX00_rs_tex(rs
, tex_count
, tex_count
, FALSE
);
355 /* Write it to the FS input register if it's used by the FS. */
356 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
357 rX00_rs_tex_write(rs
, tex_count
, fp_offset
);
362 /* Skip the FS input register, leave it uninitialized. */
363 /* If we try to set it to (0,0,0,1), it will lock up. */
364 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
370 /* Rasterize fog coordinates. */
371 if (vs_outputs
->fog
!= ATTR_UNUSED
) {
372 /* Always rasterize if it's written by the VS,
373 * otherwise it locks up. */
374 rX00_rs_tex(rs
, tex_count
, tex_count
, TRUE
);
376 /* Write it to the FS input register if it's used by the FS. */
377 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
378 rX00_rs_tex_write(rs
, tex_count
, fp_offset
);
383 /* Skip the FS input register, leave it uninitialized. */
384 /* If we try to set it to (0,0,0,1), it will lock up. */
385 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
390 /* Rasterize WPOS. */
391 /* If the FS doesn't need it, it's not written by the VS. */
392 if (fs_inputs
->wpos
!= ATTR_UNUSED
) {
393 rX00_rs_tex(rs
, tex_count
, tex_count
, FALSE
);
394 rX00_rs_tex_write(rs
, tex_count
, fp_offset
);
400 /* Rasterize at least one color, or bad things happen. */
401 if (col_count
== 0 && tex_count
== 0) {
402 rX00_rs_col(rs
, 0, 0, TRUE
);
406 rs
->count
= (tex_count
*4) | (col_count
<< R300_IC_COUNT_SHIFT
) |
409 rs
->inst_count
= MAX3(col_count
- 1, tex_count
- 1, 0);
412 /* Update the vertex format. */
413 static void r300_update_derived_shader_state(struct r300_context
* r300
)
415 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
417 /* Reset structures */
418 memset(r300
->rs_block
, 0, sizeof(struct r300_rs_block
));
419 memset(r300
->vertex_info
, 0, sizeof(struct r300_vertex_info
));
420 memcpy(r300
->vertex_info
->vinfo
.hwfmt
, r300
->vs
->hwfmt
, sizeof(uint
)*4);
422 r300_update_rs_block(r300
, &r300
->vs
->outputs
, &r300
->fs
->inputs
);
424 if (r300screen
->caps
->has_tcl
) {
425 r300_vertex_psc(r300
);
427 r300_draw_emit_all_attribs(r300
);
428 draw_compute_vertex_size(&r300
->vertex_info
->vinfo
);
429 r300_swtcl_vertex_psc(r300
);
432 r300
->dirty_state
|= R300_NEW_RS_BLOCK
;
435 static boolean
r300_dsa_writes_depth_stencil(struct r300_dsa_state
* dsa
)
437 /* We are interested only in the cases when a new depth or stencil value
438 * can be written and changed. */
440 /* We might optionally check for [Z func: never] and inspect the stencil
441 * state in a similar fashion, but it's not terribly important. */
442 return (dsa
->z_buffer_control
& R300_Z_WRITE_ENABLE
) ||
443 (dsa
->stencil_ref_mask
& R300_STENCILWRITEMASK_MASK
) ||
444 ((dsa
->z_buffer_control
& R500_STENCIL_REFMASK_FRONT_BACK
) &&
445 (dsa
->stencil_ref_bf
& R300_STENCILWRITEMASK_MASK
));
448 static boolean
r300_dsa_alpha_test_enabled(struct r300_dsa_state
* dsa
)
450 /* We are interested only in the cases when alpha testing can kill
452 uint32_t af
= dsa
->alpha_function
;
454 return (af
& R300_FG_ALPHA_FUNC_ENABLE
) &&
455 (af
& R300_FG_ALPHA_FUNC_ALWAYS
) != R300_FG_ALPHA_FUNC_ALWAYS
;
458 static void r300_update_ztop(struct r300_context
* r300
)
460 struct r300_ztop_state
* ztop_state
=
461 (struct r300_ztop_state
*)r300
->ztop_state
.state
;
463 /* This is important enough that I felt it warranted a comment.
465 * According to the docs, these are the conditions where ZTOP must be
467 * 1) Alpha testing enabled
468 * 2) Texture kill instructions in fragment shader
469 * 3) Chroma key culling enabled
470 * 4) W-buffering enabled
472 * The docs claim that for the first three cases, if no ZS writes happen,
473 * then ZTOP can be used.
475 * (3) will never apply since we do not support chroma-keyed operations.
476 * (4) will need to be re-examined (and this comment updated) if/when
477 * Hyper-Z becomes supported.
479 * Additionally, the following conditions require disabled ZTOP:
480 * 5) Depth writes in fragment shader
481 * 6) Outstanding occlusion queries
483 * This register causes stalls all the way from SC to CB when changed,
484 * but it is buffered on-chip so it does not hurt to write it if it has
491 if (r300_dsa_writes_depth_stencil(r300
->dsa_state
.state
) &&
492 (r300_dsa_alpha_test_enabled(r300
->dsa_state
.state
) ||/* (1) */
493 r300
->fs
->info
.uses_kill
)) { /* (2) */
494 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
495 } else if (r300_fragment_shader_writes_depth(r300
->fs
)) { /* (5) */
496 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
497 } else if (r300
->query_current
) { /* (6) */
498 ztop_state
->z_buffer_top
= R300_ZTOP_DISABLE
;
500 ztop_state
->z_buffer_top
= R300_ZTOP_ENABLE
;
503 r300
->ztop_state
.dirty
= TRUE
;
506 void r300_update_derived_state(struct r300_context
* r300
)
509 if (r300
->dirty_state
&
510 (R300_NEW_FRAGMENT_SHADER
| R300_NEW_VERTEX_SHADER
|
511 R300_NEW_VERTEX_FORMAT
) || r300
->rs_state
.dirty
) {
512 r300_update_derived_shader_state(r300
);
515 r300_update_ztop(r300
);