r300g: manually assign texture cache regions
[mesa.git] / src / gallium / drivers / r300 / r300_state_derived.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28
29 #include "r300_context.h"
30 #include "r300_fs.h"
31 #include "r300_hyperz.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state_derived.h"
35 #include "r300_state_inlines.h"
36 #include "r300_texture.h"
37 #include "r300_vs.h"
38
39 /* r300_state_derived: Various bits of state which are dependent upon
40 * currently bound CSO data. */
41
42 enum r300_rs_swizzle {
43 SWIZ_XYZW = 0,
44 SWIZ_X001,
45 SWIZ_XY01,
46 SWIZ_0001,
47 };
48
49 static void r300_draw_emit_attrib(struct r300_context* r300,
50 enum attrib_emit emit,
51 enum interp_mode interp,
52 int index)
53 {
54 struct r300_vertex_shader* vs = r300->vs_state.state;
55 struct tgsi_shader_info* info = &vs->info;
56 int output;
57
58 output = draw_find_shader_output(r300->draw,
59 info->output_semantic_name[index],
60 info->output_semantic_index[index]);
61 draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output);
62 }
63
64 static void r300_draw_emit_all_attribs(struct r300_context* r300)
65 {
66 struct r300_vertex_shader* vs = r300->vs_state.state;
67 struct r300_shader_semantics* vs_outputs = &vs->outputs;
68 int i, gen_count;
69
70 /* Position. */
71 if (vs_outputs->pos != ATTR_UNUSED) {
72 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
73 vs_outputs->pos);
74 } else {
75 assert(0);
76 }
77
78 /* Point size. */
79 if (vs_outputs->psize != ATTR_UNUSED) {
80 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
81 vs_outputs->psize);
82 }
83
84 /* Colors. */
85 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
86 if (vs_outputs->color[i] != ATTR_UNUSED) {
87 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
88 vs_outputs->color[i]);
89 }
90 }
91
92 /* Back-face colors. */
93 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
94 if (vs_outputs->bcolor[i] != ATTR_UNUSED) {
95 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
96 vs_outputs->bcolor[i]);
97 }
98 }
99
100 /* Texture coordinates. */
101 /* Only 8 generic vertex attributes can be used. If there are more,
102 * they won't be rasterized. */
103 gen_count = 0;
104 for (i = 0; i < ATTR_GENERIC_COUNT && gen_count < 8; i++) {
105 if (vs_outputs->generic[i] != ATTR_UNUSED) {
106 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
107 vs_outputs->generic[i]);
108 gen_count++;
109 }
110 }
111
112 /* Fog coordinates. */
113 if (gen_count < 8 && vs_outputs->fog != ATTR_UNUSED) {
114 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
115 vs_outputs->fog);
116 gen_count++;
117 }
118
119 /* WPOS. */
120 if (r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED && gen_count < 8) {
121 DBG(r300, DBG_DRAW, "draw_emit_attrib: WPOS, index: %i\n",
122 vs_outputs->wpos);
123 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
124 vs_outputs->wpos);
125 }
126 }
127
128 /* Update the PSC tables for SW TCL, using Draw. */
129 static void r300_swtcl_vertex_psc(struct r300_context *r300)
130 {
131 struct r300_vertex_stream_state *vstream = r300->vertex_stream_state.state;
132 struct vertex_info *vinfo = &r300->vertex_info;
133 uint16_t type, swizzle;
134 enum pipe_format format;
135 unsigned i, attrib_count;
136 int* vs_output_tab = r300->stream_loc_notcl;
137
138 memset(vstream, 0, sizeof(struct r300_vertex_stream_state));
139
140 /* For each Draw attribute, route it to the fragment shader according
141 * to the vs_output_tab. */
142 attrib_count = vinfo->num_attribs;
143 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
144 for (i = 0; i < attrib_count; i++) {
145 DBG(r300, DBG_DRAW, "r300: attrib: index %d, interp %d, emit %d,"
146 " vs_output_tab %d\n", vinfo->attrib[i].src_index,
147 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
148 vs_output_tab[i]);
149
150 /* Make sure we have a proper destination for our attribute. */
151 assert(vs_output_tab[i] != -1);
152
153 format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
154
155 /* Obtain the type of data in this attribute. */
156 type = r300_translate_vertex_data_type(format);
157 if (type == R300_INVALID_FORMAT) {
158 fprintf(stderr, "r300: Bad vertex format %s.\n",
159 util_format_short_name(format));
160 assert(0);
161 abort();
162 }
163
164 type |= vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
165
166 /* Obtain the swizzle for this attribute. Note that the default
167 * swizzle in the hardware is not XYZW! */
168 swizzle = r300_translate_vertex_data_swizzle(format);
169
170 /* Add the attribute to the PSC table. */
171 if (i & 1) {
172 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
173 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
174 } else {
175 vstream->vap_prog_stream_cntl[i >> 1] |= type;
176 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
177 }
178 }
179
180 /* Set the last vector in the PSC. */
181 if (i) {
182 i -= 1;
183 }
184 vstream->vap_prog_stream_cntl[i >> 1] |=
185 (R300_LAST_VEC << (i & 1 ? 16 : 0));
186
187 vstream->count = (i >> 1) + 1;
188 r300->vertex_stream_state.dirty = TRUE;
189 r300->vertex_stream_state.size = (1 + vstream->count) * 2;
190 }
191
192 static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
193 enum r300_rs_swizzle swiz)
194 {
195 rs->ip[id] |= R300_RS_COL_PTR(ptr);
196 if (swiz == SWIZ_0001) {
197 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
198 } else {
199 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
200 }
201 rs->inst[id] |= R300_RS_INST_COL_ID(id);
202 }
203
204 static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
205 {
206 rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
207 R300_RS_INST_COL_ADDR(fp_offset);
208 }
209
210 static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
211 enum r300_rs_swizzle swiz)
212 {
213 if (swiz == SWIZ_X001) {
214 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
215 R300_RS_SEL_S(R300_RS_SEL_C0) |
216 R300_RS_SEL_T(R300_RS_SEL_K0) |
217 R300_RS_SEL_R(R300_RS_SEL_K0) |
218 R300_RS_SEL_Q(R300_RS_SEL_K1);
219 } else if (swiz == SWIZ_XY01) {
220 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
221 R300_RS_SEL_S(R300_RS_SEL_C0) |
222 R300_RS_SEL_T(R300_RS_SEL_C1) |
223 R300_RS_SEL_R(R300_RS_SEL_K0) |
224 R300_RS_SEL_Q(R300_RS_SEL_K1);
225 } else {
226 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
227 R300_RS_SEL_S(R300_RS_SEL_C0) |
228 R300_RS_SEL_T(R300_RS_SEL_C1) |
229 R300_RS_SEL_R(R300_RS_SEL_C2) |
230 R300_RS_SEL_Q(R300_RS_SEL_C3);
231 }
232 rs->inst[id] |= R300_RS_INST_TEX_ID(id);
233 }
234
235 static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
236 {
237 rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
238 R300_RS_INST_TEX_ADDR(fp_offset);
239 }
240
241 static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
242 enum r300_rs_swizzle swiz)
243 {
244 rs->ip[id] |= R500_RS_COL_PTR(ptr);
245 if (swiz == SWIZ_0001) {
246 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
247 } else {
248 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
249 }
250 rs->inst[id] |= R500_RS_INST_COL_ID(id);
251 }
252
253 static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
254 {
255 rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
256 R500_RS_INST_COL_ADDR(fp_offset);
257 }
258
259 static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
260 enum r300_rs_swizzle swiz)
261 {
262 int rs_tex_comp = ptr*4;
263
264 if (swiz == SWIZ_X001) {
265 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
266 R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
267 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
268 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
269 } else if (swiz == SWIZ_XY01) {
270 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
271 R500_RS_SEL_T(rs_tex_comp + 1) |
272 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
273 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
274 } else {
275 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
276 R500_RS_SEL_T(rs_tex_comp + 1) |
277 R500_RS_SEL_R(rs_tex_comp + 2) |
278 R500_RS_SEL_Q(rs_tex_comp + 3);
279 }
280 rs->inst[id] |= R500_RS_INST_TEX_ID(id);
281 }
282
283 static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
284 {
285 rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
286 R500_RS_INST_TEX_ADDR(fp_offset);
287 }
288
289 /* Set up the RS block.
290 *
291 * This is the part of the chipset that is responsible for linking vertex
292 * and fragment shaders and stuffed texture coordinates.
293 *
294 * The rasterizer reads data from VAP, which produces vertex shader outputs,
295 * and GA, which produces stuffed texture coordinates. VAP outputs have
296 * precedence over GA. All outputs must be rasterized otherwise it locks up.
297 * If there are more outputs rasterized than is set in VAP/GA, it locks up
298 * too. The funky part is that this info has been pretty much obtained by trial
299 * and error. */
300 static void r300_update_rs_block(struct r300_context *r300)
301 {
302 struct r300_vertex_shader *vs = r300->vs_state.state;
303 struct r300_shader_semantics *vs_outputs = &vs->outputs;
304 struct r300_shader_semantics *fs_inputs = &r300_fs(r300)->shader->inputs;
305 struct r300_rs_block rs = {0};
306 int i, col_count = 0, tex_count = 0, fp_offset = 0, count, loc = 0;
307 void (*rX00_rs_col)(struct r300_rs_block*, int, int, enum r300_rs_swizzle);
308 void (*rX00_rs_col_write)(struct r300_rs_block*, int, int);
309 void (*rX00_rs_tex)(struct r300_rs_block*, int, int, enum r300_rs_swizzle);
310 void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
311 boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED ||
312 vs_outputs->bcolor[1] != ATTR_UNUSED;
313 int *stream_loc_notcl = r300->stream_loc_notcl;
314
315 if (r300->screen->caps.is_r500) {
316 rX00_rs_col = r500_rs_col;
317 rX00_rs_col_write = r500_rs_col_write;
318 rX00_rs_tex = r500_rs_tex;
319 rX00_rs_tex_write = r500_rs_tex_write;
320 } else {
321 rX00_rs_col = r300_rs_col;
322 rX00_rs_col_write = r300_rs_col_write;
323 rX00_rs_tex = r300_rs_tex;
324 rX00_rs_tex_write = r300_rs_tex_write;
325 }
326
327 /* The position is always present in VAP. */
328 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_POS;
329 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
330 stream_loc_notcl[loc++] = 0;
331
332 /* Set up the point size in VAP. */
333 if (vs_outputs->psize != ATTR_UNUSED) {
334 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
335 stream_loc_notcl[loc++] = 1;
336 }
337
338 /* Set up and rasterize colors. */
339 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
340 if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used ||
341 vs_outputs->color[1] != ATTR_UNUSED) {
342 /* Set up the color in VAP. */
343 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
344 rs.vap_out_vtx_fmt[0] |=
345 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i;
346 stream_loc_notcl[loc++] = 2 + i;
347
348 /* Rasterize it. */
349 rX00_rs_col(&rs, col_count, col_count, SWIZ_XYZW);
350
351 /* Write it to the FS input register if it's needed by the FS. */
352 if (fs_inputs->color[i] != ATTR_UNUSED) {
353 rX00_rs_col_write(&rs, col_count, fp_offset);
354 fp_offset++;
355
356 DBG(r300, DBG_RS,
357 "r300: Rasterized color %i written to FS.\n", i);
358 } else {
359 DBG(r300, DBG_RS, "r300: Rasterized color %i unused.\n", i);
360 }
361 col_count++;
362 } else {
363 /* Skip the FS input register, leave it uninitialized. */
364 /* If we try to set it to (0,0,0,1), it will lock up. */
365 if (fs_inputs->color[i] != ATTR_UNUSED) {
366 fp_offset++;
367
368 DBG(r300, DBG_RS, "r300: FS input color %i unassigned%s.\n",
369 i);
370 }
371 }
372 }
373
374 /* Set up back-face colors. The rasterizer will do the color selection
375 * automatically. */
376 if (any_bcolor_used) {
377 if (r300->two_sided_color) {
378 /* Rasterize as back-face colors. */
379 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
380 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
381 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i);
382 stream_loc_notcl[loc++] = 4 + i;
383 }
384 } else {
385 /* Rasterize two fake texcoords to prevent from the two-sided color
386 * selection. */
387 /* XXX Consider recompiling the vertex shader to save 2 RS units. */
388 for (i = 0; i < 2; i++) {
389 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
390 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
391 stream_loc_notcl[loc++] = 6 + tex_count;
392
393 /* Rasterize it. */
394 rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_XYZW);
395 tex_count++;
396 }
397 }
398 }
399
400 /* Rasterize texture coordinates. */
401 for (i = 0; i < ATTR_GENERIC_COUNT && tex_count < 8; i++) {
402 bool sprite_coord = !!(r300->sprite_coord_enable & (1 << i));
403
404 if (vs_outputs->generic[i] != ATTR_UNUSED || sprite_coord) {
405 if (!sprite_coord) {
406 /* Set up the texture coordinates in VAP. */
407 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
408 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
409 stream_loc_notcl[loc++] = 6 + tex_count;
410 }
411
412 /* Rasterize it. */
413 rX00_rs_tex(&rs, tex_count, tex_count,
414 sprite_coord ? SWIZ_XY01 : SWIZ_XYZW);
415
416 /* Write it to the FS input register if it's needed by the FS. */
417 if (fs_inputs->generic[i] != ATTR_UNUSED) {
418 rX00_rs_tex_write(&rs, tex_count, fp_offset);
419 fp_offset++;
420
421 DBG(r300, DBG_RS,
422 "r300: Rasterized generic %i written to FS%s.\n",
423 i, sprite_coord ? " (sprite coord)" : "");
424 } else {
425 DBG(r300, DBG_RS,
426 "r300: Rasterized generic %i unused%s.\n",
427 i, sprite_coord ? " (sprite coord)" : "");
428 }
429 tex_count++;
430 } else {
431 /* Skip the FS input register, leave it uninitialized. */
432 /* If we try to set it to (0,0,0,1), it will lock up. */
433 if (fs_inputs->generic[i] != ATTR_UNUSED) {
434 fp_offset++;
435
436 DBG(r300, DBG_RS, "r300: FS input generic %i unassigned%s.\n",
437 i, sprite_coord ? " (sprite coord)" : "");
438 }
439 }
440 }
441
442 /* Rasterize fog coordinates. */
443 if (vs_outputs->fog != ATTR_UNUSED && tex_count < 8) {
444 /* Set up the fog coordinates in VAP. */
445 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
446 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
447 stream_loc_notcl[loc++] = 6 + tex_count;
448
449 /* Rasterize it. */
450 rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_X001);
451
452 /* Write it to the FS input register if it's needed by the FS. */
453 if (fs_inputs->fog != ATTR_UNUSED) {
454 rX00_rs_tex_write(&rs, tex_count, fp_offset);
455 fp_offset++;
456
457 DBG(r300, DBG_RS, "r300: Rasterized fog written to FS.\n");
458 } else {
459 DBG(r300, DBG_RS, "r300: Rasterized fog unused.\n");
460 }
461 tex_count++;
462 } else {
463 /* Skip the FS input register, leave it uninitialized. */
464 /* If we try to set it to (0,0,0,1), it will lock up. */
465 if (fs_inputs->fog != ATTR_UNUSED) {
466 fp_offset++;
467
468 DBG(r300, DBG_RS, "r300: FS input fog unassigned.\n");
469 }
470 }
471
472 /* Rasterize WPOS. */
473 /* Don't set it in VAP if the FS doesn't need it. */
474 if (fs_inputs->wpos != ATTR_UNUSED && tex_count < 8) {
475 /* Set up the WPOS coordinates in VAP. */
476 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
477 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
478 stream_loc_notcl[loc++] = 6 + tex_count;
479
480 /* Rasterize it. */
481 rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_XYZW);
482
483 /* Write it to the FS input register. */
484 rX00_rs_tex_write(&rs, tex_count, fp_offset);
485
486 DBG(r300, DBG_RS, "r300: Rasterized WPOS written to FS.\n");
487
488 fp_offset++;
489 tex_count++;
490 }
491
492 /* Invalidate the rest of the no-TCL (GA) stream locations. */
493 for (; loc < 16;) {
494 stream_loc_notcl[loc++] = -1;
495 }
496
497 /* Rasterize at least one color, or bad things happen. */
498 if (col_count == 0 && tex_count == 0) {
499 rX00_rs_col(&rs, 0, 0, SWIZ_0001);
500 col_count++;
501
502 DBG(r300, DBG_RS, "r300: Rasterized color 0 to prevent lockups.\n");
503 }
504
505 DBG(r300, DBG_RS, "r300: --- Rasterizer status ---: colors: %i, "
506 "generics: %i.\n", col_count, tex_count);
507
508 rs.count = (tex_count*4) | (col_count << R300_IC_COUNT_SHIFT) |
509 R300_HIRES_EN;
510
511 count = MAX3(col_count, tex_count, 1);
512 rs.inst_count = count - 1;
513
514 /* Now, after all that, see if we actually need to update the state. */
515 if (memcmp(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block))) {
516 memcpy(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block));
517 r300->rs_block_state.size = 11 + count*2;
518 }
519 }
520
521 static void r300_merge_textures_and_samplers(struct r300_context* r300)
522 {
523 struct r300_textures_state *state =
524 (struct r300_textures_state*)r300->textures_state.state;
525 struct r300_texture_sampler_state *texstate;
526 struct r300_sampler_state *sampler;
527 struct r300_sampler_view *view;
528 struct r300_texture *tex;
529 unsigned min_level, max_level, i, size;
530 unsigned count = MIN2(state->sampler_view_count,
531 state->sampler_state_count);
532 unsigned char depth_swizzle[4] = {
533 UTIL_FORMAT_SWIZZLE_X,
534 UTIL_FORMAT_SWIZZLE_X,
535 UTIL_FORMAT_SWIZZLE_X,
536 UTIL_FORMAT_SWIZZLE_X
537 };
538
539 state->tx_enable = 0;
540 state->count = 0;
541 size = 2;
542
543 for (i = 0; i < count; i++) {
544 if (state->sampler_views[i] && state->sampler_states[i]) {
545 state->tx_enable |= 1 << i;
546
547 view = state->sampler_views[i];
548 tex = r300_texture(view->base.texture);
549 sampler = state->sampler_states[i];
550
551 texstate = &state->regs[i];
552 texstate->format = view->format;
553 texstate->filter0 = sampler->filter0;
554 texstate->filter1 = sampler->filter1;
555 texstate->border_color = sampler->border_color;
556
557 /* Assign a texture cache region. */
558 texstate->format.format1 |= view->texcache_region;
559
560 /* If compare mode is disabled, the sampler view swizzles
561 * are stored in the format.
562 * Otherwise, swizzles must be applied after the compare mode
563 * in the fragment shader. */
564 if (util_format_is_depth_or_stencil(tex->b.b.format)) {
565 if (sampler->state.compare_mode == PIPE_TEX_COMPARE_NONE) {
566 texstate->format.format1 |=
567 r300_get_swizzle_combined(depth_swizzle, view->swizzle);
568 } else {
569 texstate->format.format1 |=
570 r300_get_swizzle_combined(depth_swizzle, 0);
571 }
572 }
573
574 /* to emulate 1D textures through 2D ones correctly */
575 if (tex->b.b.target == PIPE_TEXTURE_1D) {
576 texstate->filter0 &= ~R300_TX_WRAP_T_MASK;
577 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
578 }
579
580 if (tex->uses_pitch) {
581 /* NPOT textures don't support mip filter, unfortunately.
582 * This prevents incorrect rendering. */
583 texstate->filter0 &= ~R300_TX_MIN_FILTER_MIP_MASK;
584
585 /* Mask out the mirrored flag. */
586 if (texstate->filter0 & R300_TX_WRAP_S(R300_TX_MIRRORED)) {
587 texstate->filter0 &= ~R300_TX_WRAP_S(R300_TX_MIRRORED);
588 }
589 if (texstate->filter0 & R300_TX_WRAP_T(R300_TX_MIRRORED)) {
590 texstate->filter0 &= ~R300_TX_WRAP_T(R300_TX_MIRRORED);
591 }
592
593 /* Change repeat to clamp-to-edge.
594 * (the repeat bit has a value of 0, no masking needed). */
595 if ((texstate->filter0 & R300_TX_WRAP_S_MASK) ==
596 R300_TX_WRAP_S(R300_TX_REPEAT)) {
597 texstate->filter0 |= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE);
598 }
599 if ((texstate->filter0 & R300_TX_WRAP_T_MASK) ==
600 R300_TX_WRAP_T(R300_TX_REPEAT)) {
601 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
602 }
603 } else {
604 /* determine min/max levels */
605 /* the MAX_MIP level is the largest (finest) one */
606 max_level = MIN3(sampler->max_lod + view->base.first_level,
607 tex->b.b.last_level, view->base.last_level);
608 min_level = MIN2(sampler->min_lod + view->base.first_level,
609 max_level);
610 texstate->format.format0 |= R300_TX_NUM_LEVELS(max_level);
611 texstate->filter0 |= R300_TX_MAX_MIP_LEVEL(min_level);
612 }
613
614 texstate->filter0 |= i << 28;
615
616 size += 16;
617 state->count = i+1;
618 }
619 }
620
621 r300->textures_state.size = size;
622
623 /* Pick a fragment shader based on either the texture compare state
624 * or the uses_pitch flag. */
625 if (r300->fs.state && count) {
626 if (r300_pick_fragment_shader(r300)) {
627 r300_mark_fs_code_dirty(r300);
628 }
629 }
630 }
631
632 void r300_update_derived_state(struct r300_context* r300)
633 {
634 if (r300->textures_state.dirty) {
635 r300_merge_textures_and_samplers(r300);
636 }
637
638 if (r300->rs_block_state.dirty) {
639 r300_update_rs_block(r300);
640
641 if (r300->draw) {
642 memset(&r300->vertex_info, 0, sizeof(struct vertex_info));
643 r300_draw_emit_all_attribs(r300);
644 draw_compute_vertex_size(&r300->vertex_info);
645 r300_swtcl_vertex_psc(r300);
646 }
647 }
648
649 r300_update_hyperz_state(r300);
650 }