src/gallium/drivers/r300/r300_state_invariant.c

   1 /*
   2  * Copyright 2009 Joakim Sindholt <opensource@zhasha.com>
   3  *                Corbin Simpson <MostAwesomeDude@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "r300_state_invariant.h"
  25
  26 /* Calculate and emit invariant state. This is data that the 3D engine
  27  * will probably want at the beginning of every CS, but it's not currently
  28  * handled by any CSO setup, and in addition it doesn't really change much.
  29  *
  30  * Note that eventually this should be empty, but it's useful for development
  31  * and general unduplication of code. */
  32 void r300_emit_invariant_state(struct r300_context* r300)
  33 {
  34     struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps;
  35     CS_LOCALS(r300);
  36
  37     BEGIN_CS(26 + (caps->has_tcl ? 2: 0));
  38
  39     /*** Graphics Backend (GB) ***/
  40     /* Various GB enables */
  41     OUT_CS_REG(R300_GB_ENABLE, 0x0);
  42     /* Subpixel multisampling for AA */
  43     OUT_CS_REG(R300_GB_MSPOS0, 0x66666666);
  44     OUT_CS_REG(R300_GB_MSPOS1, 0x6666666);
  45     /* Source of fog depth */
  46     OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W);
  47     /* AA enable */
  48     OUT_CS_REG(R300_GB_AA_CONFIG, 0x0);
  49
  50     /*** Fog (FG) ***/
  51     OUT_CS_REG(R300_FG_FOG_BLEND, 0x0);
  52     OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x0);
  53     OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x0);
  54     OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x0);
  55     OUT_CS_REG(R300_FG_DEPTH_SRC, 0x0);
  56
  57     /*** VAP ***/
  58     /* Max and min vertex index clamp. */
  59     OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0);
  60     OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xffffff);
  61     /* Sign/normalize control */
  62     OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO);
  63     /* TCL-only stuff */
  64     if (caps->has_tcl) {
  65         /* Amount of time to wait for vertex fetches in PVS */
  66         OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
  67     }
  68
  69     END_CS;
  70
  71     /* XXX unsorted stuff from surface_fill */
  72     BEGIN_CS(77 + (caps->has_tcl ? 7 : 0));
  73     /* Flush PVS. */
  74     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
  75
  76     OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA |
  77         R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA |
  78         R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA |
  79         R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT);
  80     /* XXX endian */
  81     if (caps->has_tcl) {
  82         OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP);
  83         OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE |
  84             R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
  85         OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
  86         OUT_CS_32F(1.0);
  87         OUT_CS_32F(1.0);
  88         OUT_CS_32F(1.0);
  89         OUT_CS_32F(1.0);
  90     } else {
  91         OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP |
  92                 R300_VAP_TCL_BYPASS);
  93     }
  94     /* XXX point tex stuffing */
  95     OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1);
  96     OUT_CS_32F(0.0);
  97     OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1);
  98     OUT_CS_32F(1.0);
  99     /* XXX line tex stuffing */
 100     OUT_CS_REG_SEQ(R300_GA_LINE_S0, 1);
 101     OUT_CS_32F(0.0);
 102     OUT_CS_REG_SEQ(R300_GA_LINE_S1, 1);
 103     OUT_CS_32F(1.0);
 104     OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 |
 105         (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT));
 106     /* XXX this big chunk should be refactored into rs_state */
 107     OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000);
 108     OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000);
 109     OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000);
 110     OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001);
 111     OUT_CS_REG(R300_GA_OFFSET, 0x00000000);
 112     OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412);
 113     OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000);
 114     OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000);
 115     OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
 116     OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000);
 117     OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C);
 118     OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525);
 119     OUT_CS_REG(R300_RB3D_CCTL, 0x00000000);
 120     OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
 121     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000);
 122     OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
 123     OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
 124     OUT_CS_REG(R300_ZB_FORMAT, 0x00000002);
 125     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003);
 126     OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000);
 127     OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000);
 128     OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000);
 129     OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000);
 130     OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1);
 131     OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405);
 132     OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F);
 133
 134     /* XXX */
 135     OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa);
 136
 137     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 138     OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A);
 139     OUT_CS(R300_US_OUT_FMT_UNUSED);
 140     OUT_CS(R300_US_OUT_FMT_UNUSED);
 141     OUT_CS(R300_US_OUT_FMT_UNUSED);
 142     OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0);
 143     END_CS;
 144 }