r300-gallium: Die on bad texture formats.
[mesa.git] / src / gallium / drivers / r300 / r300_surface.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Joakim Sindholt <opensource@zhasha.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "r300_surface.h"
25
26 static void r300_surface_setup(struct r300_context* r300,
27 struct r300_texture* dest,
28 unsigned x, unsigned y,
29 unsigned w, unsigned h)
30 {
31 struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps;
32 unsigned pixpitch = dest->stride / dest->tex.block.size;
33 CS_LOCALS(r300);
34
35 /* Make sure our target BO is okay. */
36 r300->winsys->add_buffer(r300->winsys, dest->buffer,
37 0, RADEON_GEM_DOMAIN_VRAM);
38 if (r300->winsys->validate(r300->winsys)) {
39 r300->context.flush(&r300->context, 0, NULL);
40 }
41
42 r300_emit_blend_state(r300, &blend_clear_state);
43 r300_emit_blend_color_state(r300, &blend_color_clear_state);
44 r300_emit_dsa_state(r300, &dsa_clear_state);
45 r300_emit_rs_state(r300, &rs_clear_state);
46
47 BEGIN_CS(24);
48
49 /* Viewport setup */
50 OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
51 OUT_CS_32F((float)w);
52 OUT_CS_32F((float)x);
53 OUT_CS_32F((float)h);
54 OUT_CS_32F((float)y);
55 OUT_CS_32F(1.0);
56 OUT_CS_32F(0.0);
57
58 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VPORT_X_SCALE_ENA |
59 R300_VPORT_X_OFFSET_ENA |
60 R300_VPORT_Y_SCALE_ENA |
61 R300_VPORT_Y_OFFSET_ENA |
62 R300_VTX_XY_FMT | R300_VTX_Z_FMT);
63
64 /* Pixel scissors. */
65 OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
66 if (caps->is_r500) {
67 OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT));
68 OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT));
69 } else {
70 /* Non-R500 chipsets have an offset of 1440 in their scissors. */
71 OUT_CS(((x + 1440) << R300_SCISSORS_X_SHIFT) |
72 ((y + 1440) << R300_SCISSORS_Y_SHIFT));
73 OUT_CS(((w + 1440) << R300_SCISSORS_X_SHIFT) |
74 ((h + 1440) << R300_SCISSORS_Y_SHIFT));
75 }
76
77 /* Flush colorbuffer and blend caches. */
78 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
79 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D |
80 R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL);
81 OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
82 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
83 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
84
85 /* Setup colorbuffer. */
86 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1);
87 OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
88 OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch |
89 r300_translate_colorformat(dest->tex.format));
90 OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0xf);
91
92 END_CS;
93 }
94
95 /* Provides pipe_context's "surface_fill". Commonly used for clearing
96 * buffers. */
97 static void r300_surface_fill(struct pipe_context* pipe,
98 struct pipe_surface* dest,
99 unsigned x, unsigned y,
100 unsigned w, unsigned h,
101 unsigned color)
102 {
103 int i;
104 float r, g, b, a, depth;
105 struct r300_context* r300 = r300_context(pipe);
106 struct r300_capabilities* caps = r300_screen(pipe->screen)->caps;
107 struct r300_texture* tex = (struct r300_texture*)dest->texture;
108 unsigned pixpitch = tex->stride / tex->tex.block.size;
109 CS_LOCALS(r300);
110
111 a = (float)((color >> 24) & 0xff) / 255.0f;
112 r = (float)((color >> 16) & 0xff) / 255.0f;
113 g = (float)((color >> 8) & 0xff) / 255.0f;
114 b = (float)((color >> 0) & 0xff) / 255.0f;
115 debug_printf("r300: Filling surface %p at (%d,%d),"
116 " dimensions %dx%d (pixel pitch %d), color 0x%x\n",
117 dest, x, y, w, h, pixpitch, color);
118
119 /* Fallback? */
120 if (FALSE) {
121 debug_printf("r300: Falling back on surface clear...");
122 util_surface_fill(pipe, dest, x, y, w, h, color);
123 return;
124 }
125
126 r300_surface_setup(r300, tex, x, y, w, h);
127
128 /* Vertex shader setup */
129 if (caps->has_tcl) {
130 r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader);
131 } else {
132 BEGIN_CS(4);
133 OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS);
134 OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
135 R300_PVS_NUM_CNTLRS(5) |
136 R300_PVS_NUM_FPUS(caps->num_vert_fpus) |
137 R300_PVS_VF_MAX_VTX_NUM(12));
138 END_CS;
139 }
140
141 /* Fragment shader setup */
142 if (caps->is_r500) {
143 r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader);
144 r300_emit_rs_block_state(r300, &r500_rs_block_clear_state);
145 } else {
146 r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader);
147 r300_emit_rs_block_state(r300, &r300_rs_block_clear_state);
148 }
149
150 BEGIN_CS(24);
151
152 /* VAP stream control, mapping from input memory to PVS/RS memory */
153 if (caps->has_tcl) {
154 OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0,
155 (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) |
156 ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) |
157 R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT));
158 } else {
159 OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0,
160 (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) |
161 ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) |
162 R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT));
163 }
164 OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0,
165 (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) |
166 (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT));
167
168 /* VAP format controls */
169 OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0,
170 R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT |
171 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT);
172 OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x0);
173
174 /* Disable textures */
175 OUT_CS_REG(R300_TX_ENABLE, 0x0);
176
177 /* The size of the point we're about to draw, in sixths of pixels */
178 OUT_CS_REG(R300_GA_POINT_SIZE,
179 ((h * 6) & R300_POINTSIZE_Y_MASK) |
180 ((w * 6) << R300_POINTSIZE_X_SHIFT));
181
182 /* Packet3 with our point vertex */
183 OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8);
184 OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING |
185 (1 << R300_PRIM_NUM_VERTICES_SHIFT));
186 /* Position */
187 OUT_CS_32F(0.5);
188 OUT_CS_32F(0.5);
189 OUT_CS_32F(1.0);
190 OUT_CS_32F(1.0);
191 /* Color */
192 OUT_CS_32F(r);
193 OUT_CS_32F(g);
194 OUT_CS_32F(b);
195 OUT_CS_32F(a);
196
197 /* XXX figure out why this is 0xA and not 0x2 */
198 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
199 /* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
200 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
201 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */
202
203 END_CS;
204
205 r300->dirty_hw++;
206 }
207
208 static void r300_surface_copy(struct pipe_context* pipe,
209 struct pipe_surface* dest,
210 unsigned destx, unsigned desty,
211 struct pipe_surface* src,
212 unsigned srcx, unsigned srcy,
213 unsigned w, unsigned h)
214 {
215 struct r300_context* r300 = r300_context(pipe);
216 struct r300_capabilities* caps = r300_screen(pipe->screen)->caps;
217 struct r300_texture* srctex = (struct r300_texture*)src->texture;
218 struct r300_texture* desttex = (struct r300_texture*)dest->texture;
219 unsigned pixpitch = srctex->stride / srctex->tex.block.size;
220 CS_LOCALS(r300);
221
222 debug_printf("r300: Copying surface %p at (%d,%d) to %p at (%d, %d),"
223 " dimensions %dx%d (pixel pitch %d)\n",
224 src, srcx, srcy, dest, destx, desty, w, h, pixpitch);
225
226 if ((srctex == desttex) &&
227 ((destx < srcx + w) || (srcx < destx + w)) &&
228 ((desty < srcy + h) || (srcy < desty + h))) {
229 debug_printf("r300: Falling back on surface_copy\n");
230 util_surface_copy(pipe, FALSE, dest, destx, desty, src,
231 srcx, srcy, w, h);
232 }
233
234 /* Add our source texture to the BO list before emitting anything.
235 * r300_surface_setup will flush if needed for us. */
236 r300->winsys->add_buffer(r300->winsys, srctex->buffer,
237 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
238
239 r300_surface_setup(r300, desttex, destx, desty, w, h);
240
241 r300_emit_sampler(r300, &r300_sampler_copy_state, 0);
242 r300_emit_texture(r300, srctex, 0);
243 r300_flush_textures(r300);
244
245 /* Vertex shader setup */
246 if (caps->has_tcl) {
247 r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader);
248 } else {
249 BEGIN_CS(4);
250 OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS);
251 OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
252 R300_PVS_NUM_CNTLRS(5) |
253 R300_PVS_NUM_FPUS(caps->num_vert_fpus) |
254 R300_PVS_VF_MAX_VTX_NUM(12));
255 END_CS;
256 }
257
258 /* Fragment shader setup */
259 if (caps->is_r500) {
260 r500_emit_fragment_shader(r300, &r500_texture_fragment_shader);
261 r300_emit_rs_block_state(r300, &r500_rs_block_copy_state);
262 } else {
263 r300_emit_fragment_shader(r300, &r300_texture_fragment_shader);
264 r300_emit_rs_block_state(r300, &r300_rs_block_copy_state);
265 }
266
267 BEGIN_CS(28);
268 /* VAP stream control, mapping from input memory to PVS/RS memory */
269 if (caps->has_tcl) {
270 OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0,
271 (R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) |
272 ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) |
273 R300_DATA_TYPE_FLOAT_2) << R300_DATA_TYPE_1_SHIFT));
274 } else {
275 OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0,
276 (R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) |
277 ((R300_LAST_VEC | (6 << R300_DST_VEC_LOC_SHIFT) |
278 R300_DATA_TYPE_FLOAT_2) << R300_DATA_TYPE_1_SHIFT));
279 }
280 OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0,
281 (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) |
282 (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT));
283
284 /* VAP format controls */
285 OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0,
286 R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT);
287 /* Two components of texture 0 */
288 OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x2);
289
290 /* Packet3 with our texcoords */
291 OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 16);
292 OUT_CS(R300_PRIM_TYPE_QUADS | R300_PRIM_WALK_RING |
293 (4 << R300_PRIM_NUM_VERTICES_SHIFT));
294 /* (x , y ) */
295 OUT_CS_32F((float)(destx / dest->width));
296 OUT_CS_32F((float)(desty / dest->height));
297 OUT_CS_32F((float)(srcx / dest->width));
298 OUT_CS_32F((float)(srcy / dest->height));
299 /* (x , y + h) */
300 OUT_CS_32F((float)(destx / dest->width));
301 OUT_CS_32F((float)((desty + h) / dest->height));
302 OUT_CS_32F((float)(srcx / dest->width));
303 OUT_CS_32F((float)((srcy + h) / dest->height));
304 /* (x + w, y + h) */
305 OUT_CS_32F((float)((destx + w) / dest->width));
306 OUT_CS_32F((float)((desty + h) / dest->height));
307 OUT_CS_32F((float)((srcx + w) / dest->width));
308 OUT_CS_32F((float)((srcy + h) / dest->height));
309 /* (x + w, y ) */
310 OUT_CS_32F((float)((destx + w) / dest->width));
311 OUT_CS_32F((float)(desty / dest->height));
312 OUT_CS_32F((float)((srcx + w) / dest->width));
313 OUT_CS_32F((float)(srcy / dest->height));
314
315 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
316
317 END_CS;
318
319 r300->dirty_hw++;
320 }
321
322 void r300_init_surface_functions(struct r300_context* r300)
323 {
324 r300->context.surface_fill = r300_surface_fill;
325 r300->context.surface_copy = r300_surface_copy;
326 }