src/gallium/drivers/r300/r300_video_context.c

   1 /*
   2  * Copyright (C) 2009-2010  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   CooperYuan <cooper.yuan@amd.com>, <cooperyuan@gmail.com>
  25  */
  26
  27 #include <X11/Xlib.h>
  28 #include <X11/Xutil.h>
  29 #include <pipe/p_defines.h>
  30 #include <pipe/p_context.h>
  31 #include <pipe/p_screen.h>
  32 #include <pipe/p_inlines.h>
  33 #include <util/u_memory.h>
  34 #include <X11/Xlib.h>
  35
  36 #include <fcntl.h>
  37
  38 #include "radeon_buffer.h"
  39 #include "radeon_r300.h"
  40 #include "r300_screen.h"
  41 #include "r300_texture.h"
  42 #include "p_video_context.h"
  43 #include "radeon_vl.h"
  44 #include "softpipe/sp_winsys.h"
  45 #include "softpipe/sp_texture.h"
  46
  47 #include "r300_video_context.h"
  48 #include <softpipe/sp_video_context.h>
  49
  50 static void r300_mpeg12_destroy(struct pipe_video_context *vpipe)
  51 {
  52     struct radeon_mpeg12_context *ctx = (struct radeon_mpeg12_context*)vpipe;
  53
  54     assert(vpipe);
  55
  56     ctx->pipe->bind_vs_state(ctx->pipe, NULL);
  57     ctx->pipe->bind_fs_state(ctx->pipe, NULL);
  58
  59     ctx->pipe->delete_blend_state(ctx->pipe, ctx->blend);
  60     ctx->pipe->delete_rasterizer_state(ctx->pipe, ctx->rast);
  61     ctx->pipe->delete_depth_stencil_alpha_state(ctx->pipe, ctx->dsa);
  62
  63     pipe_video_surface_reference(&ctx->decode_target, NULL);
  64     vl_compositor_cleanup(&ctx->compositor);
  65     vl_mpeg12_mc_renderer_cleanup(&ctx->mc_renderer);
  66     ctx->pipe->destroy(ctx->pipe);
  67
  68     FREE(ctx);
  69 }
  70
  71 static void
  72 r300_mpeg12_decode_macroblocks(struct pipe_video_context *vpipe,
  73                                struct pipe_video_surface *past,
  74                                struct pipe_video_surface *future,
  75                                unsigned num_macroblocks,
  76                                struct pipe_macroblock *macroblocks,
  77                                struct pipe_fence_handle **fence)
  78 {
  79     struct radeon_mpeg12_context *ctx = (struct radeon_mpeg12_context*)vpipe;
  80     struct pipe_mpeg12_macroblock *mpeg12_macroblocks =
  81                          (struct pipe_mpeg12_macroblock*)macroblocks;
  82
  83     assert(vpipe);
  84     assert(num_macroblocks);
  85     assert(macroblocks);
  86     assert(macroblocks->codec == PIPE_VIDEO_CODEC_MPEG12);
  87     assert(ctx->decode_target);
  88
  89     vl_mpeg12_mc_renderer_render_macroblocks(
  90                             &ctx->mc_renderer,
  91                             r300_video_surface(ctx->decode_target)->tex,
  92                             past ? r300_video_surface(past)->tex : NULL,
  93                             future ? r300_video_surface(future)->tex : NULL,
  94                             num_macroblocks, mpeg12_macroblocks, fence);
  95 }
  96
  97 static void r300_mpeg12_clear_surface(struct pipe_video_context *vpipe,
  98                                       unsigned x, unsigned y,
  99                                       unsigned width, unsigned height,
 100                                       unsigned value,
 101                                       struct pipe_surface *surface)
 102 {
 103     struct radeon_mpeg12_context *ctx = (struct radeon_mpeg12_context*)vpipe;
 104
 105     assert(vpipe);
 106     assert(surface);
 107
 108     if (ctx->pipe->surface_fill)
 109         ctx->pipe->surface_fill(ctx->pipe, surface, x, y, width, height, value);
 110     else
 111         util_surface_fill(ctx->pipe, surface, x, y, width, height, value);
 112 }
 113
 114 static void
 115 r300_mpeg12_render_picture(struct pipe_video_context     *vpipe,
 116                            struct pipe_video_surface     *src_surface,
 117                            enum pipe_mpeg12_picture_type picture_type,
 118                            struct pipe_video_rect        *src_area,
 119                            struct pipe_surface           *dst_surface,
 120                            struct pipe_video_rect        *dst_area,
 121                            struct pipe_fence_handle      **fence)
 122 {
 123     struct radeon_mpeg12_context *ctx = (struct radeon_mpeg12_context*)vpipe;
 124
 125     assert(vpipe);
 126     assert(src_surface);
 127     assert(src_area);
 128     assert(dst_surface);
 129     assert(dst_area);
 130
 131     vl_compositor_render(&ctx->compositor,
 132                          r300_video_surface(src_surface)->tex,
 133                          picture_type, src_area, dst_surface->texture,
 134                          dst_area, fence);
 135 }
 136
 137 static void r300_mpeg12_set_decode_target(struct pipe_video_context *vpipe,
 138                                           struct pipe_video_surface *dt)
 139 {
 140     struct radeon_mpeg12_context *ctx = (struct radeon_mpeg12_context*)vpipe;
 141
 142     assert(vpipe);
 143     assert(dt);
 144
 145     pipe_video_surface_reference(&ctx->decode_target, dt);
 146 }
 147
 148 static void r300_mpeg12_set_csc_matrix(struct pipe_video_context *vpipe,
 149                                        const float *mat)
 150 {
 151     struct radeon_mpeg12_context *ctx = (struct radeon_mpeg12_context*)vpipe;
 152
 153     assert(vpipe);
 154
 155     vl_compositor_set_csc_matrix(&ctx->compositor, mat);
 156 }
 157
 158 static bool r300_mpeg12_init_pipe_state(struct radeon_mpeg12_context *ctx)
 159 {
 160     struct pipe_rasterizer_state rast;
 161     struct pipe_blend_state blend;
 162     struct pipe_depth_stencil_alpha_state dsa;
 163     unsigned i;
 164
 165     assert(ctx);
 166
 167     rast.flatshade = 1;
 168     rast.flatshade_first = 0;
 169     rast.light_twoside = 0;
 170     rast.front_winding = PIPE_WINDING_CCW;
 171     rast.cull_mode = PIPE_WINDING_CW;
 172     rast.fill_cw = PIPE_POLYGON_MODE_FILL;
 173     rast.fill_ccw = PIPE_POLYGON_MODE_FILL;
 174     rast.offset_cw = 0;
 175     rast.offset_ccw = 0;
 176     rast.scissor = 0;
 177     rast.poly_smooth = 0;
 178     rast.poly_stipple_enable = 0;
 179     rast.point_sprite = 0;
 180     rast.point_size_per_vertex = 0;
 181     rast.multisample = 0;
 182     rast.line_smooth = 0;
 183     rast.line_stipple_enable = 0;
 184     rast.line_stipple_factor = 0;
 185     rast.line_stipple_pattern = 0;
 186     rast.line_last_pixel = 0;
 187     rast.bypass_vs_clip_and_viewport = 0;
 188     rast.line_width = 1;
 189     rast.point_smooth = 0;
 190     rast.point_size = 1;
 191     rast.offset_units = 1;
 192     rast.offset_scale = 1;
 193     /*rast.sprite_coord_mode[i] = ;*/
 194     ctx->rast = ctx->pipe->create_rasterizer_state(ctx->pipe, &rast);
 195     ctx->pipe->bind_rasterizer_state(ctx->pipe, ctx->rast);
 196
 197     blend.blend_enable = 0;
 198     blend.rgb_func = PIPE_BLEND_ADD;
 199     blend.rgb_src_factor = PIPE_BLENDFACTOR_ONE;
 200     blend.rgb_dst_factor = PIPE_BLENDFACTOR_ONE;
 201     blend.alpha_func = PIPE_BLEND_ADD;
 202     blend.alpha_src_factor = PIPE_BLENDFACTOR_ONE;
 203     blend.alpha_dst_factor = PIPE_BLENDFACTOR_ONE;
 204     blend.logicop_enable = 0;
 205     blend.logicop_func = PIPE_LOGICOP_CLEAR;
 206     /* Needed to allow color writes to FB, even if blending disabled */
 207     blend.colormask = PIPE_MASK_RGBA;
 208     blend.dither = 0;
 209     ctx->blend = ctx->pipe->create_blend_state(ctx->pipe, &blend);
 210     ctx->pipe->bind_blend_state(ctx->pipe, ctx->blend);
 211
 212     dsa.depth.enabled = 0;
 213     dsa.depth.writemask = 0;
 214     dsa.depth.func = PIPE_FUNC_ALWAYS;
 215     for (i = 0; i < 2; ++i)
 216     {
 217         dsa.stencil[i].enabled = 0;
 218         dsa.stencil[i].func = PIPE_FUNC_ALWAYS;
 219         dsa.stencil[i].fail_op = PIPE_STENCIL_OP_KEEP;
 220         dsa.stencil[i].zpass_op = PIPE_STENCIL_OP_KEEP;
 221         dsa.stencil[i].zfail_op = PIPE_STENCIL_OP_KEEP;
 222         dsa.stencil[i].ref_value = 0;
 223         dsa.stencil[i].valuemask = 0;
 224         dsa.stencil[i].writemask = 0;
 225     }
 226     dsa.alpha.enabled = 0;
 227     dsa.alpha.func = PIPE_FUNC_ALWAYS;
 228     dsa.alpha.ref_value = 0;
 229     ctx->dsa = ctx->pipe->create_depth_stencil_alpha_state(ctx->pipe, &dsa);
 230     ctx->pipe->bind_depth_stencil_alpha_state(ctx->pipe, ctx->dsa);
 231
 232     return true;
 233 }
 234
 235 static struct pipe_video_context *
 236 r300_mpeg12_context_create(struct pipe_screen *screen,
 237                            enum pipe_video_profile profile,
 238                            enum pipe_video_chroma_format chroma_format,
 239                            unsigned int width,
 240                            unsigned int height)
 241 {
 242     struct radeon_mpeg12_context *ctx;
 243     ctx = CALLOC_STRUCT(radeon_mpeg12_context);
 244     if (!ctx)
 245         return NULL;
 246
 247     ctx->base.profile       = profile;
 248     ctx->base.chroma_format = chroma_format;
 249     ctx->base.width         = width;
 250     ctx->base.height        = height;
 251     ctx->base.screen        = screen;
 252
 253     ctx->base.destroy               = radeon_mpeg12_destroy;
 254     ctx->base.decode_macroblocks    = radeon_mpeg12_decode_macroblocks;
 255     ctx->base.clear_surface         = radeon_mpeg12_clear_surface;
 256     ctx->base.render_picture        = radeon_mpeg12_render_picture;
 257     ctx->base.set_decode_target     = radeon_mpeg12_set_decode_target;
 258     ctx->base.set_csc_matrix        = radeon_mpeg12_set_csc_matrix;
 259
 260     ctx->pipe = r300_create_context(screen,(struct r300_winsys*)screen->winsys);
 261     if (!ctx->pipe)
 262     {
 263         FREE(ctx);
 264         return NULL;
 265     }
 266
 267     if (!vl_mpeg12_mc_renderer_init(&ctx->mc_renderer, ctx->pipe,
 268                                    width, height, chroma_format,
 269                                    VL_MPEG12_MC_RENDERER_BUFFER_PICTURE,
 270                                    VL_MPEG12_MC_RENDERER_EMPTY_BLOCK_XFER_ONE,
 271                                    true))
 272     {
 273         ctx->pipe->destroy(ctx->pipe);
 274         FREE(ctx);
 275         return NULL;
 276     }
 277
 278     if (!vl_compositor_init(&ctx->compositor, ctx->pipe))
 279     {
 280         vl_mpeg12_mc_renderer_cleanup(&ctx->mc_renderer);
 281         ctx->pipe->destroy(ctx->pipe);
 282         FREE(ctx);
 283         return NULL;
 284     }
 285
 286     if (!radeon_mpeg12_init_pipe_state(ctx))
 287     {
 288         vl_compositor_cleanup(&ctx->compositor);
 289         vl_mpeg12_mc_renderer_cleanup(&ctx->mc_renderer);
 290         ctx->pipe->destroy(ctx->pipe);
 291         FREE(ctx);
 292         return NULL;
 293     }
 294
 295     return &ctx->base;
 296 }
 297
 298 struct pipe_video_context *
 299 r300_video_create(struct pipe_context *pipe, enum pipe_video_profile profile,
 300                   enum pipe_video_chroma_format chroma_format,
 301                   unsigned width, unsigned height,
 302                   unsigned pvctx_id)
 303 {
 304     struct pipe_video_context *vpipe;
 305     struct radeon_vl_context *rvl_ctx;
 306
 307     assert(p_screen);
 308     assert(width && height);
 309
 310     /* create radeon pipe_context */
 311     switch(u_reduce_video_profile(profile))
 312     {
 313         case PIPE_VIDEO_CODEC_MPEG12:
 314             vpipe = radeon_mpeg12_context_create(p_screen, profile, chr_f,
 315                                                  width, height);
 316             break;
 317         default:
 318             return NULL;
 319     }
 320
 321     /* create radeon_vl_context */
 322     rvl_ctx = calloc(1, sizeof(struct radeon_vl_context));
 323     rvl_ctx->display = display;
 324     rvl_ctx->screen = screen;
 325
 326     vpipe->priv = rvl_ctx;
 327
 328     return vpipe;
 329 }