2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "r600_pipe.h"
29 #include "r600_opcodes.h"
30 #include "evergreend.h"
32 int eg_bc_cf_build(struct r600_bc
*bc
, struct r600_bc_cf
*cf
)
37 case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU
<< 3):
38 case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE
<< 3):
39 bc
->bytecode
[id
++] = S_SQ_CF_ALU_WORD0_ADDR(cf
->addr
>> 1) |
40 S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf
->kcache0_mode
) |
41 S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf
->kcache0_bank
) |
42 S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf
->kcache1_bank
);
43 bc
->bytecode
[id
++] = S_SQ_CF_ALU_WORD1_CF_INST(cf
->inst
>> 3) |
44 S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf
->kcache1_mode
) |
45 S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf
->kcache0_addr
) |
46 S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf
->kcache1_addr
) |
47 S_SQ_CF_ALU_WORD1_BARRIER(1) |
48 S_SQ_CF_ALU_WORD1_COUNT((cf
->ndw
/ 2) - 1);
50 case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX
:
51 case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX
:
52 bc
->bytecode
[id
++] = S_SQ_CF_WORD0_ADDR(cf
->addr
>> 1);
53 bc
->bytecode
[id
++] = S_SQ_CF_WORD1_CF_INST(cf
->inst
) |
54 S_SQ_CF_WORD1_BARRIER(1) |
55 S_SQ_CF_WORD1_COUNT((cf
->ndw
/ 4) - 1);
57 case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT
:
58 case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE
:
59 bc
->bytecode
[id
++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf
->output
.gpr
) |
60 S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf
->output
.elem_size
) |
61 S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf
->output
.array_base
) |
62 S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf
->output
.type
);
63 bc
->bytecode
[id
++] = S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf
->output
.swizzle_x
) |
64 S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf
->output
.swizzle_y
) |
65 S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf
->output
.swizzle_z
) |
66 S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf
->output
.swizzle_w
) |
67 S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf
->output
.barrier
) |
68 S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf
->output
.inst
) |
69 S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf
->output
.end_of_program
);
71 case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP
:
72 case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE
:
73 case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP
:
74 case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL
:
75 case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END
:
76 case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE
:
77 case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK
:
78 case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS
:
79 case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN
:
80 bc
->bytecode
[id
++] = S_SQ_CF_WORD0_ADDR(cf
->cf_addr
>> 1);
81 bc
->bytecode
[id
++] = S_SQ_CF_WORD1_CF_INST(cf
->inst
) |
82 S_SQ_CF_WORD1_BARRIER(1) |
83 S_SQ_CF_WORD1_COND(cf
->cond
) |
84 S_SQ_CF_WORD1_POP_COUNT(cf
->pop_count
);
88 R600_ERR("unsupported CF instruction (0x%X)\n", cf
->inst
);
94 void eg_cf_vtx(struct r600_vertex_element
*ve
, u32
*bytecode
, unsigned count
)
96 struct r600_pipe_state
*rstate
;
100 bytecode
[i
++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
101 bytecode
[i
++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX
) |
102 S_SQ_CF_WORD1_BARRIER(1) |
103 S_SQ_CF_WORD1_COUNT(8 - 1);
104 bytecode
[i
++] = S_SQ_CF_WORD0_ADDR(40 >> 1);
105 bytecode
[i
++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX
) |
106 S_SQ_CF_WORD1_BARRIER(1) |
107 S_SQ_CF_WORD1_COUNT(count
- 8 - 1);
109 bytecode
[i
++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
110 bytecode
[i
++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX
) |
111 S_SQ_CF_WORD1_BARRIER(1) |
112 S_SQ_CF_WORD1_COUNT(count
- 1);
114 bytecode
[i
++] = S_SQ_CF_WORD0_ADDR(0);
115 bytecode
[i
++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN
) |
116 S_SQ_CF_WORD1_BARRIER(1);
118 rstate
= &ve
->rstate
;
119 rstate
->id
= R600_PIPE_STATE_FETCH_SHADER
;
121 r600_pipe_state_add_reg(rstate
, R_0288A8_SQ_PGM_RESOURCES_FS
,
122 0x00000000, 0xFFFFFFFF, NULL
);
123 r600_pipe_state_add_reg(rstate
, R_0288A4_SQ_PGM_START_FS
,
124 (r600_bo_offset(ve
->fetch_shader
)) >> 8,
125 0xFFFFFFFF, ve
->fetch_shader
);