r600g: make F2U trans-only on r600-r700
[mesa.git] / src / gallium / drivers / r600 / r600_asm.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #ifndef R600_ASM_H
24 #define R600_ASM_H
25
26 #include "r600.h"
27
28 struct r600_vertex_element;
29 struct r600_context;
30
31 struct r600_bytecode_alu_src {
32 unsigned sel;
33 unsigned chan;
34 unsigned neg;
35 unsigned abs;
36 unsigned rel;
37 unsigned kc_bank;
38 uint32_t value;
39 };
40
41 struct r600_bytecode_alu_dst {
42 unsigned sel;
43 unsigned chan;
44 unsigned clamp;
45 unsigned write;
46 unsigned rel;
47 };
48
49 struct r600_bytecode_alu {
50 struct list_head list;
51 struct r600_bytecode_alu_src src[3];
52 struct r600_bytecode_alu_dst dst;
53 unsigned inst;
54 unsigned last;
55 unsigned is_op3;
56 unsigned execute_mask;
57 unsigned update_pred;
58 unsigned pred_sel;
59 unsigned bank_swizzle;
60 unsigned bank_swizzle_force;
61 unsigned omod;
62 unsigned index_mode;
63 };
64
65 struct r600_bytecode_tex {
66 struct list_head list;
67 unsigned inst;
68 unsigned resource_id;
69 unsigned src_gpr;
70 unsigned src_rel;
71 unsigned dst_gpr;
72 unsigned dst_rel;
73 unsigned dst_sel_x;
74 unsigned dst_sel_y;
75 unsigned dst_sel_z;
76 unsigned dst_sel_w;
77 unsigned lod_bias;
78 unsigned coord_type_x;
79 unsigned coord_type_y;
80 unsigned coord_type_z;
81 unsigned coord_type_w;
82 unsigned offset_x;
83 unsigned offset_y;
84 unsigned offset_z;
85 unsigned sampler_id;
86 unsigned src_sel_x;
87 unsigned src_sel_y;
88 unsigned src_sel_z;
89 unsigned src_sel_w;
90 };
91
92 struct r600_bytecode_vtx {
93 struct list_head list;
94 unsigned inst;
95 unsigned fetch_type;
96 unsigned buffer_id;
97 unsigned src_gpr;
98 unsigned src_sel_x;
99 unsigned mega_fetch_count;
100 unsigned dst_gpr;
101 unsigned dst_sel_x;
102 unsigned dst_sel_y;
103 unsigned dst_sel_z;
104 unsigned dst_sel_w;
105 unsigned use_const_fields;
106 unsigned data_format;
107 unsigned num_format_all;
108 unsigned format_comp_all;
109 unsigned srf_mode_all;
110 unsigned offset;
111 unsigned endian;
112 };
113
114 struct r600_bytecode_output {
115 unsigned array_base;
116 unsigned array_size;
117 unsigned comp_mask;
118 unsigned type;
119 unsigned end_of_program;
120
121 /* CF_INST. This is already bit-shifted and only needs to be or'd for bytecode. */
122 unsigned inst;
123
124 unsigned elem_size;
125 unsigned gpr;
126 unsigned swizzle_x;
127 unsigned swizzle_y;
128 unsigned swizzle_z;
129 unsigned swizzle_w;
130 unsigned burst_count;
131 unsigned barrier;
132 };
133
134 struct r600_bytecode_kcache {
135 unsigned bank;
136 unsigned mode;
137 unsigned addr;
138 };
139
140 /* A value of CF_NATIVE in r600_bytecode_cf::inst means that this instruction
141 * has already been encoded, and the encoding has been stored in
142 * r600_bytecode::isa. This is used by the LLVM backend to emit CF instructions
143 * e.g. RAT_WRITE_* that can't be properly represented by struct
144 * r600_bytecode_cf.
145 */
146 #define CF_NATIVE ~0
147
148 struct r600_bytecode_cf {
149 struct list_head list;
150
151 /* CF_INST. This is already bit-shifted and only needs to be or'd for bytecode. */
152 unsigned inst;
153
154 unsigned addr;
155 unsigned ndw;
156 unsigned id;
157 unsigned cond;
158 unsigned pop_count;
159 unsigned cf_addr; /* control flow addr */
160 struct r600_bytecode_kcache kcache[4];
161 unsigned r6xx_uses_waterfall;
162 unsigned eg_alu_extended;
163 struct list_head alu;
164 struct list_head tex;
165 struct list_head vtx;
166 struct r600_bytecode_output output;
167 struct r600_bytecode_alu *curr_bs_head;
168 struct r600_bytecode_alu *prev_bs_head;
169 struct r600_bytecode_alu *prev2_bs_head;
170 unsigned isa[2];
171 };
172
173 #define FC_NONE 0
174 #define FC_IF 1
175 #define FC_LOOP 2
176 #define FC_REP 3
177 #define FC_PUSH_VPM 4
178 #define FC_PUSH_WQM 5
179
180 struct r600_cf_stack_entry {
181 int type;
182 struct r600_bytecode_cf *start;
183 struct r600_bytecode_cf **mid; /* used to store the else point */
184 int num_mid;
185 };
186
187 #define SQ_MAX_CALL_DEPTH 0x00000020
188 struct r600_cf_callstack {
189 unsigned fc_sp_before_entry;
190 int sub_desc_index;
191 int current;
192 int max;
193 };
194
195 #define AR_HANDLE_NORMAL 0
196 #define AR_HANDLE_RV6XX 1 /* except RV670 */
197
198
199 struct r600_bytecode {
200 enum chip_class chip_class;
201 int type;
202 struct list_head cf;
203 struct r600_bytecode_cf *cf_last;
204 unsigned ndw;
205 unsigned ncf;
206 unsigned ngpr;
207 unsigned nstack;
208 unsigned nresource;
209 unsigned force_add_cf;
210 uint32_t *bytecode;
211 uint32_t fc_sp;
212 struct r600_cf_stack_entry fc_stack[32];
213 unsigned call_sp;
214 struct r600_cf_callstack callstack[SQ_MAX_CALL_DEPTH];
215 unsigned ar_loaded;
216 unsigned ar_reg;
217 unsigned ar_handling;
218 unsigned r6xx_nop_after_rel_dst;
219 };
220
221 /* eg_asm.c */
222 int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
223
224 /* r600_asm.c */
225 void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family);
226 void r600_bytecode_clear(struct r600_bytecode *bc);
227 int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu);
228 int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx);
229 int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_tex *tex);
230 int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecode_output *output);
231 int r600_bytecode_build(struct r600_bytecode *bc);
232 int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst);
233 int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type);
234 void r600_bytecode_special_constants(uint32_t value, unsigned *sel, unsigned *neg);
235 void r600_bytecode_dump(struct r600_bytecode *bc);
236
237 int cm_bytecode_add_cf_end(struct r600_bytecode *bc);
238
239 int r600_vertex_elements_build_fetch_shader(struct r600_context *rctx, struct r600_vertex_element *ve);
240
241 /* r700_asm.c */
242 void r700_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_bytecode_cf *cf);
243 int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id);
244
245 #endif