f786bab3d59ee90274e2f3cad4a8037b7d821e5b
[mesa.git] / src / gallium / drivers / r600 / r600_asm.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #ifndef R600_ASM_H
24 #define R600_ASM_H
25
26 #include "r600_pipe.h"
27 #include "r600_isa.h"
28
29 struct r600_bytecode_alu_src {
30 unsigned sel;
31 unsigned chan;
32 unsigned neg;
33 unsigned abs;
34 unsigned rel;
35 unsigned kc_bank;
36 unsigned kc_rel;
37 uint32_t value;
38 };
39
40 struct r600_bytecode_alu_dst {
41 unsigned sel;
42 unsigned chan;
43 unsigned clamp;
44 unsigned write;
45 unsigned rel;
46 };
47
48 struct r600_bytecode_alu {
49 struct list_head list;
50 struct r600_bytecode_alu_src src[3];
51 struct r600_bytecode_alu_dst dst;
52 unsigned op;
53 unsigned last;
54 unsigned is_op3;
55 unsigned execute_mask;
56 unsigned update_pred;
57 unsigned pred_sel;
58 unsigned bank_swizzle;
59 unsigned bank_swizzle_force;
60 unsigned omod;
61 unsigned index_mode;
62 };
63
64 struct r600_bytecode_tex {
65 struct list_head list;
66 unsigned op;
67 unsigned inst_mod;
68 unsigned resource_id;
69 unsigned src_gpr;
70 unsigned src_rel;
71 unsigned dst_gpr;
72 unsigned dst_rel;
73 unsigned dst_sel_x;
74 unsigned dst_sel_y;
75 unsigned dst_sel_z;
76 unsigned dst_sel_w;
77 unsigned lod_bias;
78 unsigned coord_type_x;
79 unsigned coord_type_y;
80 unsigned coord_type_z;
81 unsigned coord_type_w;
82 int offset_x;
83 int offset_y;
84 int offset_z;
85 unsigned sampler_id;
86 unsigned src_sel_x;
87 unsigned src_sel_y;
88 unsigned src_sel_z;
89 unsigned src_sel_w;
90 /* indexed samplers/resources only on evergreen/cayman */
91 unsigned sampler_index_mode;
92 unsigned resource_index_mode;
93 };
94
95 struct r600_bytecode_vtx {
96 struct list_head list;
97 unsigned op;
98 unsigned fetch_type;
99 unsigned buffer_id;
100 unsigned src_gpr;
101 unsigned src_sel_x;
102 unsigned mega_fetch_count;
103 unsigned dst_gpr;
104 unsigned dst_sel_x;
105 unsigned dst_sel_y;
106 unsigned dst_sel_z;
107 unsigned dst_sel_w;
108 unsigned use_const_fields;
109 unsigned data_format;
110 unsigned num_format_all;
111 unsigned format_comp_all;
112 unsigned srf_mode_all;
113 unsigned offset;
114 unsigned endian;
115 unsigned buffer_index_mode;
116 };
117
118 struct r600_bytecode_gds {
119 struct list_head list;
120 unsigned op;
121 unsigned gds_op;
122 unsigned src_gpr;
123 unsigned src_rel;
124 unsigned src_sel_x;
125 unsigned src_sel_y;
126 unsigned src_sel_z;
127 unsigned src_gpr2;
128 unsigned dst_gpr;
129 unsigned dst_rel;
130 unsigned dst_sel_x;
131 unsigned dst_sel_y;
132 unsigned dst_sel_z;
133 unsigned dst_sel_w;
134 };
135
136 struct r600_bytecode_output {
137 unsigned array_base;
138 unsigned array_size;
139 unsigned comp_mask;
140 unsigned type;
141
142 unsigned op;
143
144 unsigned elem_size;
145 unsigned gpr;
146 unsigned swizzle_x;
147 unsigned swizzle_y;
148 unsigned swizzle_z;
149 unsigned swizzle_w;
150 unsigned burst_count;
151 unsigned index_gpr;
152 };
153
154 struct r600_bytecode_kcache {
155 unsigned bank;
156 unsigned mode;
157 unsigned addr;
158 unsigned index_mode;
159 };
160
161 struct r600_bytecode_cf {
162 struct list_head list;
163
164 unsigned op;
165 unsigned addr;
166 unsigned ndw;
167 unsigned id;
168 unsigned cond;
169 unsigned pop_count;
170 unsigned count;
171 unsigned cf_addr; /* control flow addr */
172 struct r600_bytecode_kcache kcache[4];
173 unsigned r6xx_uses_waterfall;
174 unsigned eg_alu_extended;
175 unsigned barrier;
176 unsigned end_of_program;
177 struct list_head alu;
178 struct list_head tex;
179 struct list_head vtx;
180 struct list_head gds;
181 struct r600_bytecode_output output;
182 struct r600_bytecode_alu *curr_bs_head;
183 struct r600_bytecode_alu *prev_bs_head;
184 struct r600_bytecode_alu *prev2_bs_head;
185 unsigned isa[2];
186 };
187
188 #define FC_NONE 0
189 #define FC_IF 1
190 #define FC_LOOP 2
191 #define FC_REP 3
192 #define FC_PUSH_VPM 4
193 #define FC_PUSH_WQM 5
194
195 struct r600_cf_stack_entry {
196 int type;
197 struct r600_bytecode_cf *start;
198 struct r600_bytecode_cf **mid; /* used to store the else point */
199 int num_mid;
200 };
201
202 #define SQ_MAX_CALL_DEPTH 0x00000020
203
204 #define AR_HANDLE_NORMAL 0
205 #define AR_HANDLE_RV6XX 1 /* except RV670 */
206
207 struct r600_stack_info {
208 /* current level of non-WQM PUSH operations
209 * (PUSH, PUSH_ELSE, ALU_PUSH_BEFORE) */
210 int push;
211 /* current level of WQM PUSH operations
212 * (PUSH, PUSH_ELSE, PUSH_WQM) */
213 int push_wqm;
214 /* current loop level */
215 int loop;
216
217 /* required depth */
218 int max_entries;
219 /* subentries per entry */
220 int entry_size;
221 };
222
223 struct r600_bytecode {
224 enum chip_class chip_class;
225 enum radeon_family family;
226 bool has_compressed_msaa_texturing;
227 int type;
228 struct list_head cf;
229 struct r600_bytecode_cf *cf_last;
230 unsigned ndw;
231 unsigned ncf;
232 unsigned ngpr;
233 unsigned nstack;
234 unsigned nlds_dw;
235 unsigned nresource;
236 unsigned force_add_cf;
237 uint32_t *bytecode;
238 uint32_t fc_sp;
239 struct r600_cf_stack_entry fc_stack[32];
240 struct r600_stack_info stack;
241 unsigned ar_loaded;
242 unsigned ar_reg;
243 unsigned ar_chan;
244 unsigned ar_handling;
245 unsigned r6xx_nop_after_rel_dst;
246 bool index_loaded[2];
247 unsigned index_reg[2]; /* indexing register CF_INDEX_[01] */
248 unsigned debug_id;
249 struct r600_isa* isa;
250 };
251
252 /* eg_asm.c */
253 int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
254 int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause);
255 int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id);
256 /* r600_asm.c */
257 void r600_bytecode_init(struct r600_bytecode *bc,
258 enum chip_class chip_class,
259 enum radeon_family family,
260 bool has_compressed_msaa_texturing);
261 void r600_bytecode_clear(struct r600_bytecode *bc);
262 int r600_bytecode_add_alu(struct r600_bytecode *bc,
263 const struct r600_bytecode_alu *alu);
264 int r600_bytecode_add_vtx(struct r600_bytecode *bc,
265 const struct r600_bytecode_vtx *vtx);
266 int r600_bytecode_add_tex(struct r600_bytecode *bc,
267 const struct r600_bytecode_tex *tex);
268 int r600_bytecode_add_gds(struct r600_bytecode *bc,
269 const struct r600_bytecode_gds *gds);
270 int r600_bytecode_add_output(struct r600_bytecode *bc,
271 const struct r600_bytecode_output *output);
272 int r600_bytecode_build(struct r600_bytecode *bc);
273 int r600_bytecode_add_cf(struct r600_bytecode *bc);
274 int r600_bytecode_add_cfinst(struct r600_bytecode *bc,
275 unsigned op);
276 int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
277 const struct r600_bytecode_alu *alu, unsigned type);
278 void r600_bytecode_special_constants(uint32_t value,
279 unsigned *sel, unsigned *neg, unsigned abs);
280 void r600_bytecode_disasm(struct r600_bytecode *bc);
281 void r600_bytecode_alu_read(struct r600_bytecode *bc,
282 struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
283
284 int cm_bytecode_add_cf_end(struct r600_bytecode *bc);
285
286 void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
287 unsigned count,
288 const struct pipe_vertex_element *elements);
289
290 /* r700_asm.c */
291 void r700_bytecode_cf_vtx_build(uint32_t *bytecode,
292 const struct r600_bytecode_cf *cf);
293 int r700_bytecode_alu_build(struct r600_bytecode *bc,
294 struct r600_bytecode_alu *alu, unsigned id);
295 void r700_bytecode_alu_read(struct r600_bytecode *bc,
296 struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
297 void r600_bytecode_export_read(struct r600_bytecode *bc,
298 struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
299 void eg_bytecode_export_read(struct r600_bytecode *bc,
300 struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
301
302 void r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
303 unsigned *num_format, unsigned *format_comp, unsigned *endian);
304
305 static inline int fp64_switch(int i)
306 {
307 switch (i) {
308 case 0:
309 return 1;
310 case 1:
311 return 0;
312 case 2:
313 return 3;
314 case 3:
315 return 2;
316 }
317 return 0;
318 }
319 #endif