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r600: add some missing cayman register defines
[mesa.git] / src / gallium / drivers / r600 / r600_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "r600_pipe.h"
24 #include "compute_memory_pool.h"
25 #include "evergreen_compute.h"
26 #include "util/u_surface.h"
27 #include "util/u_format.h"
28 #include "evergreend.h"
29
30 enum r600_blitter_op /* bitmask */
31 {
32 R600_SAVE_FRAGMENT_STATE = 1,
33 R600_SAVE_TEXTURES = 2,
34 R600_SAVE_FRAMEBUFFER = 4,
35 R600_DISABLE_RENDER_COND = 8,
36
37 R600_CLEAR = R600_SAVE_FRAGMENT_STATE,
38
39 R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER,
40
41 R600_COPY_BUFFER = R600_DISABLE_RENDER_COND,
42
43 R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
44 R600_DISABLE_RENDER_COND,
45
46 R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES,
47
48 R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
49
50 R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER
51 };
52
53 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
54 {
55 struct r600_context *rctx = (struct r600_context *)ctx;
56
57 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb);
58 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
59 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
60 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
61 util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader);
62 util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader);
63 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)rctx->b.streamout.targets);
65 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
66
67 if (op & R600_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_viewport(rctx->blitter, &rctx->b.viewports.states[0]);
69 util_blitter_save_scissor(rctx->blitter, &rctx->b.scissors.states[0]);
70 util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
71 util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
72 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
73 util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state);
74 util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask);
75 }
76
77 if (op & R600_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state);
79
80 if (op & R600_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask),
83 (void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states);
84
85 util_blitter_save_fragment_sampler_views(
86 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask),
87 (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
88 }
89
90 if (op & R600_DISABLE_RENDER_COND)
91 rctx->b.render_cond_force_off = true;
92 }
93
94 static void r600_blitter_end(struct pipe_context *ctx)
95 {
96 struct r600_context *rctx = (struct r600_context *)ctx;
97
98 rctx->b.render_cond_force_off = false;
99 }
100
101 static unsigned u_max_sample(struct pipe_resource *r)
102 {
103 return r->nr_samples ? r->nr_samples - 1 : 0;
104 }
105
106 static void r600_blit_decompress_depth(struct pipe_context *ctx,
107 struct r600_texture *texture,
108 struct r600_texture *staging,
109 unsigned first_level, unsigned last_level,
110 unsigned first_layer, unsigned last_layer,
111 unsigned first_sample, unsigned last_sample)
112 {
113 struct r600_context *rctx = (struct r600_context *)ctx;
114 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
115 struct r600_texture *flushed_depth_texture = staging ?
116 staging : texture->flushed_depth_texture;
117 const struct util_format_description *desc =
118 util_format_description(texture->resource.b.b.format);
119 float depth;
120
121 if (!staging && !texture->dirty_level_mask)
122 return;
123
124 max_sample = u_max_sample(&texture->resource.b.b);
125
126 /* XXX Decompressing MSAA depth textures is broken on R6xx.
127 * There is also a hardlock if CMASK and FMASK are not present.
128 * Just skip this until we find out how to fix it. */
129 if (rctx->b.chip_class == R600 && max_sample > 0) {
130 texture->dirty_level_mask = 0;
131 return;
132 }
133
134 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 ||
135 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635)
136 depth = 0.0f;
137 else
138 depth = 1.0f;
139
140 /* Enable decompression in DB_RENDER_CONTROL */
141 rctx->db_misc_state.flush_depthstencil_through_cb = true;
142 rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
143 rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
144 rctx->db_misc_state.copy_sample = first_sample;
145 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
146
147 for (level = first_level; level <= last_level; level++) {
148 if (!staging && !(texture->dirty_level_mask & (1 << level)))
149 continue;
150
151 /* The smaller the mipmap level, the less layers there are
152 * as far as 3D textures are concerned. */
153 max_layer = util_max_layer(&texture->resource.b.b, level);
154 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
155
156 for (layer = first_layer; layer <= checked_last_layer; layer++) {
157 for (sample = first_sample; sample <= last_sample; sample++) {
158 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
159
160 if (sample != rctx->db_misc_state.copy_sample) {
161 rctx->db_misc_state.copy_sample = sample;
162 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
163 }
164
165 surf_tmpl.format = texture->resource.b.b.format;
166 surf_tmpl.u.tex.level = level;
167 surf_tmpl.u.tex.first_layer = layer;
168 surf_tmpl.u.tex.last_layer = layer;
169
170 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
171
172 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
173 cbsurf = ctx->create_surface(ctx,
174 &flushed_depth_texture->resource.b.b, &surf_tmpl);
175
176 r600_blitter_begin(ctx, R600_DECOMPRESS);
177 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample,
178 rctx->custom_dsa_flush, depth);
179 r600_blitter_end(ctx);
180
181 pipe_surface_reference(&zsurf, NULL);
182 pipe_surface_reference(&cbsurf, NULL);
183 }
184 }
185
186 /* The texture will always be dirty if some layers or samples aren't flushed.
187 * I don't think this case occurs often though. */
188 if (!staging &&
189 first_layer == 0 && last_layer == max_layer &&
190 first_sample == 0 && last_sample == max_sample) {
191 texture->dirty_level_mask &= ~(1 << level);
192 }
193 }
194
195 /* reenable compression in DB_RENDER_CONTROL */
196 rctx->db_misc_state.flush_depthstencil_through_cb = false;
197 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
198 }
199
200 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
201 struct r600_texture *texture,
202 bool is_stencil_sampler,
203 unsigned first_level, unsigned last_level,
204 unsigned first_layer, unsigned last_layer)
205 {
206 struct pipe_surface *zsurf, surf_tmpl = {{0}};
207 unsigned layer, max_layer, checked_last_layer, level;
208 unsigned *dirty_level_mask;
209
210 /* Enable decompression in DB_RENDER_CONTROL */
211 if (is_stencil_sampler) {
212 rctx->db_misc_state.flush_stencil_inplace = true;
213 dirty_level_mask = &texture->stencil_dirty_level_mask;
214 } else {
215 rctx->db_misc_state.flush_depth_inplace = true;
216 dirty_level_mask = &texture->dirty_level_mask;
217 }
218 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
219
220 surf_tmpl.format = texture->resource.b.b.format;
221
222 for (level = first_level; level <= last_level; level++) {
223 if (!(*dirty_level_mask & (1 << level)))
224 continue;
225
226 surf_tmpl.u.tex.level = level;
227
228 /* The smaller the mipmap level, the less layers there are
229 * as far as 3D textures are concerned. */
230 max_layer = util_max_layer(&texture->resource.b.b, level);
231 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
232
233 for (layer = first_layer; layer <= checked_last_layer; layer++) {
234 surf_tmpl.u.tex.first_layer = layer;
235 surf_tmpl.u.tex.last_layer = layer;
236
237 zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl);
238
239 r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS);
240 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0,
241 rctx->custom_dsa_flush, 1.0f);
242 r600_blitter_end(&rctx->b.b);
243
244 pipe_surface_reference(&zsurf, NULL);
245 }
246
247 /* The texture will always be dirty if some layers or samples aren't flushed.
248 * I don't think this case occurs often though. */
249 if (first_layer == 0 && last_layer == max_layer) {
250 *dirty_level_mask &= ~(1 << level);
251 }
252 }
253
254 /* Disable decompression in DB_RENDER_CONTROL */
255 rctx->db_misc_state.flush_depth_inplace = false;
256 rctx->db_misc_state.flush_stencil_inplace = false;
257 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
258 }
259
260 void r600_decompress_depth_textures(struct r600_context *rctx,
261 struct r600_samplerview_state *textures)
262 {
263 unsigned i;
264 unsigned depth_texture_mask = textures->compressed_depthtex_mask;
265
266 while (depth_texture_mask) {
267 struct pipe_sampler_view *view;
268 struct r600_pipe_sampler_view *rview;
269 struct r600_texture *tex;
270
271 i = u_bit_scan(&depth_texture_mask);
272
273 view = &textures->views[i]->base;
274 assert(view);
275 rview = (struct r600_pipe_sampler_view*)view;
276
277 tex = (struct r600_texture *)view->texture;
278 assert(tex->db_compatible);
279
280 if (r600_can_sample_zs(tex, rview->is_stencil_sampler)) {
281 r600_blit_decompress_depth_in_place(rctx, tex,
282 rview->is_stencil_sampler,
283 view->u.tex.first_level, view->u.tex.last_level,
284 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
285 } else {
286 r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
287 view->u.tex.first_level, view->u.tex.last_level,
288 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
289 0, u_max_sample(&tex->resource.b.b));
290 }
291 }
292 }
293
294 void r600_decompress_depth_images(struct r600_context *rctx,
295 struct r600_image_state *images)
296 {
297 unsigned i;
298 unsigned depth_texture_mask = images->compressed_depthtex_mask;
299
300 while (depth_texture_mask) {
301 struct r600_image_view *view;
302 struct r600_texture *tex;
303
304 i = u_bit_scan(&depth_texture_mask);
305
306 view = &images->views[i];
307 assert(view);
308
309 tex = (struct r600_texture *)view->base.resource;
310 assert(tex->db_compatible);
311
312 if (r600_can_sample_zs(tex, false)) {
313 r600_blit_decompress_depth_in_place(rctx, tex,
314 false,
315 view->base.u.tex.level,
316 view->base.u.tex.level,
317 0, util_max_layer(&tex->resource.b.b, view->base.u.tex.level));
318 } else {
319 r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
320 view->base.u.tex.level,
321 view->base.u.tex.level,
322 0, util_max_layer(&tex->resource.b.b, view->base.u.tex.level),
323 0, u_max_sample(&tex->resource.b.b));
324 }
325 }
326 }
327
328 static void r600_blit_decompress_color(struct pipe_context *ctx,
329 struct r600_texture *rtex,
330 unsigned first_level, unsigned last_level,
331 unsigned first_layer, unsigned last_layer)
332 {
333 struct r600_context *rctx = (struct r600_context *)ctx;
334 unsigned layer, level, checked_last_layer, max_layer;
335
336 if (!rtex->dirty_level_mask)
337 return;
338
339 for (level = first_level; level <= last_level; level++) {
340 if (!(rtex->dirty_level_mask & (1 << level)))
341 continue;
342
343 /* The smaller the mipmap level, the less layers there are
344 * as far as 3D textures are concerned. */
345 max_layer = util_max_layer(&rtex->resource.b.b, level);
346 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
347
348 for (layer = first_layer; layer <= checked_last_layer; layer++) {
349 struct pipe_surface *cbsurf, surf_tmpl;
350
351 surf_tmpl.format = rtex->resource.b.b.format;
352 surf_tmpl.u.tex.level = level;
353 surf_tmpl.u.tex.first_layer = layer;
354 surf_tmpl.u.tex.last_layer = layer;
355 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
356
357 r600_blitter_begin(ctx, R600_DECOMPRESS);
358 util_blitter_custom_color(rctx->blitter, cbsurf,
359 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear);
360 r600_blitter_end(ctx);
361
362 pipe_surface_reference(&cbsurf, NULL);
363 }
364
365 /* The texture will always be dirty if some layers aren't flushed.
366 * I don't think this case occurs often though. */
367 if (first_layer == 0 && last_layer == max_layer) {
368 rtex->dirty_level_mask &= ~(1 << level);
369 }
370 }
371 }
372
373 void r600_decompress_color_textures(struct r600_context *rctx,
374 struct r600_samplerview_state *textures)
375 {
376 unsigned i;
377 unsigned mask = textures->compressed_colortex_mask;
378
379 while (mask) {
380 struct pipe_sampler_view *view;
381 struct r600_texture *tex;
382
383 i = u_bit_scan(&mask);
384
385 view = &textures->views[i]->base;
386 assert(view);
387
388 tex = (struct r600_texture *)view->texture;
389 assert(tex->cmask.size);
390
391 r600_blit_decompress_color(&rctx->b.b, tex,
392 view->u.tex.first_level, view->u.tex.last_level,
393 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
394 }
395 }
396
397 void r600_decompress_color_images(struct r600_context *rctx,
398 struct r600_image_state *images)
399 {
400 unsigned i;
401 unsigned mask = images->compressed_colortex_mask;
402
403 while (mask) {
404 struct r600_image_view *view;
405 struct r600_texture *tex;
406
407 i = u_bit_scan(&mask);
408
409 view = &images->views[i];
410 assert(view);
411
412 tex = (struct r600_texture *)view->base.resource;
413 assert(tex->cmask.size);
414
415 r600_blit_decompress_color(&rctx->b.b, tex,
416 view->base.u.tex.level, view->base.u.tex.level,
417 view->base.u.tex.first_layer,
418 view->base.u.tex.last_layer);
419 }
420 }
421
422 /* Helper for decompressing a portion of a color or depth resource before
423 * blitting if any decompression is needed.
424 * The driver doesn't decompress resources automatically while u_blitter is
425 * rendering. */
426 static bool r600_decompress_subresource(struct pipe_context *ctx,
427 struct pipe_resource *tex,
428 unsigned level,
429 unsigned first_layer, unsigned last_layer)
430 {
431 struct r600_context *rctx = (struct r600_context *)ctx;
432 struct r600_texture *rtex = (struct r600_texture*)tex;
433
434 if (rtex->db_compatible) {
435 if (r600_can_sample_zs(rtex, false)) {
436 r600_blit_decompress_depth_in_place(rctx, rtex, false,
437 level, level,
438 first_layer, last_layer);
439 if (rtex->surface.has_stencil) {
440 r600_blit_decompress_depth_in_place(rctx, rtex, true,
441 level, level,
442 first_layer, last_layer);
443 }
444 } else {
445 if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
446 return false; /* error */
447
448 r600_blit_decompress_depth(ctx, rtex, NULL,
449 level, level,
450 first_layer, last_layer,
451 0, u_max_sample(tex));
452 }
453 } else if (rtex->cmask.size) {
454 r600_blit_decompress_color(ctx, rtex, level, level,
455 first_layer, last_layer);
456 }
457 return true;
458 }
459
460 static void r600_clear(struct pipe_context *ctx, unsigned buffers,
461 const union pipe_color_union *color,
462 double depth, unsigned stencil)
463 {
464 struct r600_context *rctx = (struct r600_context *)ctx;
465 struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
466
467 if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
468 evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
469 &buffers, NULL, color);
470 if (!buffers)
471 return; /* all buffers have been fast cleared */
472 }
473
474 if (buffers & PIPE_CLEAR_COLOR) {
475 int i;
476
477 /* These buffers cannot use fast clear, make sure to disable expansion. */
478 for (i = 0; i < fb->nr_cbufs; i++) {
479 struct r600_texture *tex;
480
481 /* If not clearing this buffer, skip. */
482 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
483 continue;
484
485 if (!fb->cbufs[i])
486 continue;
487
488 tex = (struct r600_texture *)fb->cbufs[i]->texture;
489 if (tex->fmask.size == 0)
490 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
491 }
492 }
493
494 /* if hyperz enabled just clear hyperz */
495 if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
496 struct r600_texture *rtex;
497 unsigned level = fb->zsbuf->u.tex.level;
498
499 rtex = (struct r600_texture*)fb->zsbuf->texture;
500
501 /* We can't use hyperz fast clear if each slice of a texture
502 * array are clear to different value. To simplify code just
503 * disable fast clear for texture array.
504 */
505 if (r600_htile_enabled(rtex, level) &&
506 fb->zsbuf->u.tex.first_layer == 0 &&
507 fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) {
508 if (rtex->depth_clear_value != depth) {
509 rtex->depth_clear_value = depth;
510 r600_mark_atom_dirty(rctx, &rctx->db_state.atom);
511 }
512 rctx->db_misc_state.htile_clear = true;
513 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
514 }
515 }
516
517 r600_blitter_begin(ctx, R600_CLEAR);
518 util_blitter_clear(rctx->blitter, fb->width, fb->height,
519 util_framebuffer_get_num_layers(fb),
520 buffers, color, depth, stencil);
521 r600_blitter_end(ctx);
522
523 /* disable fast clear */
524 if (rctx->db_misc_state.htile_clear) {
525 rctx->db_misc_state.htile_clear = false;
526 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
527 }
528 }
529
530 static void r600_clear_render_target(struct pipe_context *ctx,
531 struct pipe_surface *dst,
532 const union pipe_color_union *color,
533 unsigned dstx, unsigned dsty,
534 unsigned width, unsigned height,
535 bool render_condition_enabled)
536 {
537 struct r600_context *rctx = (struct r600_context *)ctx;
538
539 r600_blitter_begin(ctx, R600_CLEAR_SURFACE |
540 (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND));
541 util_blitter_clear_render_target(rctx->blitter, dst, color,
542 dstx, dsty, width, height);
543 r600_blitter_end(ctx);
544 }
545
546 static void r600_clear_depth_stencil(struct pipe_context *ctx,
547 struct pipe_surface *dst,
548 unsigned clear_flags,
549 double depth,
550 unsigned stencil,
551 unsigned dstx, unsigned dsty,
552 unsigned width, unsigned height,
553 bool render_condition_enabled)
554 {
555 struct r600_context *rctx = (struct r600_context *)ctx;
556
557 r600_blitter_begin(ctx, R600_CLEAR_SURFACE |
558 (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND));
559 util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil,
560 dstx, dsty, width, height);
561 r600_blitter_end(ctx);
562 }
563
564 static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
565 struct pipe_resource *src, const struct pipe_box *src_box)
566 {
567 struct r600_context *rctx = (struct r600_context*)ctx;
568
569 if (rctx->screen->b.has_cp_dma) {
570 r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
571 }
572 else if (rctx->screen->b.has_streamout &&
573 /* Require 4-byte alignment. */
574 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
575
576 r600_blitter_begin(ctx, R600_COPY_BUFFER);
577 util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width);
578 r600_blitter_end(ctx);
579 } else {
580 util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
581 }
582 }
583
584 /**
585 * Global buffers are not really resources, they are are actually offsets
586 * into a single global resource (r600_screen::global_pool). The means
587 * they don't have their own buf handle, so they cannot be passed
588 * to r600_copy_buffer() and must be handled separately.
589 */
590 static void r600_copy_global_buffer(struct pipe_context *ctx,
591 struct pipe_resource *dst, unsigned
592 dstx, struct pipe_resource *src,
593 const struct pipe_box *src_box)
594 {
595 struct r600_context *rctx = (struct r600_context*)ctx;
596 struct compute_memory_pool *pool = rctx->screen->global_pool;
597 struct pipe_box new_src_box = *src_box;
598
599 if (src->bind & PIPE_BIND_GLOBAL) {
600 struct r600_resource_global *rsrc =
601 (struct r600_resource_global *)src;
602 struct compute_memory_item *item = rsrc->chunk;
603
604 if (is_item_in_pool(item)) {
605 new_src_box.x += 4 * item->start_in_dw;
606 src = (struct pipe_resource *)pool->bo;
607 } else {
608 if (item->real_buffer == NULL) {
609 item->real_buffer =
610 r600_compute_buffer_alloc_vram(pool->screen,
611 item->size_in_dw * 4);
612 }
613 src = (struct pipe_resource*)item->real_buffer;
614 }
615 }
616 if (dst->bind & PIPE_BIND_GLOBAL) {
617 struct r600_resource_global *rdst =
618 (struct r600_resource_global *)dst;
619 struct compute_memory_item *item = rdst->chunk;
620
621 if (is_item_in_pool(item)) {
622 dstx += 4 * item->start_in_dw;
623 dst = (struct pipe_resource *)pool->bo;
624 } else {
625 if (item->real_buffer == NULL) {
626 item->real_buffer =
627 r600_compute_buffer_alloc_vram(pool->screen,
628 item->size_in_dw * 4);
629 }
630 dst = (struct pipe_resource*)item->real_buffer;
631 }
632 }
633
634 r600_copy_buffer(ctx, dst, dstx, src, &new_src_box);
635 }
636
637 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
638 uint64_t offset, uint64_t size, unsigned value,
639 enum r600_coherency coher)
640 {
641 struct r600_context *rctx = (struct r600_context*)ctx;
642
643 if (rctx->screen->b.has_cp_dma &&
644 rctx->b.chip_class >= EVERGREEN &&
645 offset % 4 == 0 && size % 4 == 0) {
646 evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher);
647 } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
648 union pipe_color_union clear_value;
649 clear_value.ui[0] = value;
650
651 r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND);
652 util_blitter_clear_buffer(rctx->blitter, dst, offset, size,
653 1, &clear_value);
654 r600_blitter_end(ctx);
655 } else {
656 uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
657 PIPE_TRANSFER_WRITE);
658 map += offset / 4;
659 size /= 4;
660 for (unsigned i = 0; i < size; i++)
661 *map++ = value;
662 }
663 }
664
665 void r600_resource_copy_region(struct pipe_context *ctx,
666 struct pipe_resource *dst,
667 unsigned dst_level,
668 unsigned dstx, unsigned dsty, unsigned dstz,
669 struct pipe_resource *src,
670 unsigned src_level,
671 const struct pipe_box *src_box)
672 {
673 struct r600_context *rctx = (struct r600_context *)ctx;
674 struct pipe_surface *dst_view, dst_templ;
675 struct pipe_sampler_view src_templ, *src_view;
676 unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
677 unsigned src_force_level = 0;
678 struct pipe_box sbox, dstbox;
679
680 /* Handle buffers first. */
681 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
682 if ((src->bind & PIPE_BIND_GLOBAL) ||
683 (dst->bind & PIPE_BIND_GLOBAL)) {
684 r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
685 } else {
686 r600_copy_buffer(ctx, dst, dstx, src, src_box);
687 }
688 return;
689 }
690
691 assert(u_max_sample(dst) == u_max_sample(src));
692
693 /* The driver doesn't decompress resources automatically while
694 * u_blitter is rendering. */
695 if (!r600_decompress_subresource(ctx, src, src_level,
696 src_box->z, src_box->z + src_box->depth - 1)) {
697 return; /* error */
698 }
699
700 dst_width = u_minify(dst->width0, dst_level);
701 dst_height = u_minify(dst->height0, dst_level);
702 src_width0 = src->width0;
703 src_height0 = src->height0;
704 src_widthFL = u_minify(src->width0, src_level);
705 src_heightFL = u_minify(src->height0, src_level);
706
707 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
708 util_blitter_default_src_texture(rctx->blitter, &src_templ, src, src_level);
709
710 if (util_format_is_compressed(src->format) ||
711 util_format_is_compressed(dst->format)) {
712 unsigned blocksize = util_format_get_blocksize(src->format);
713
714 if (blocksize == 8)
715 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
716 else
717 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
718 dst_templ.format = src_templ.format;
719
720 dst_width = util_format_get_nblocksx(dst->format, dst_width);
721 dst_height = util_format_get_nblocksy(dst->format, dst_height);
722 src_width0 = util_format_get_nblocksx(src->format, src_width0);
723 src_height0 = util_format_get_nblocksy(src->format, src_height0);
724 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
725 src_heightFL = util_format_get_nblocksy(src->format, src_heightFL);
726
727 dstx = util_format_get_nblocksx(dst->format, dstx);
728 dsty = util_format_get_nblocksy(dst->format, dsty);
729
730 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
731 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
732 sbox.z = src_box->z;
733 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
734 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
735 sbox.depth = src_box->depth;
736 src_box = &sbox;
737
738 src_force_level = src_level;
739 } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
740 if (util_format_is_subsampled_422(src->format)) {
741
742 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
743 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
744
745 dst_width = util_format_get_nblocksx(dst->format, dst_width);
746 src_width0 = util_format_get_nblocksx(src->format, src_width0);
747 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
748
749 dstx = util_format_get_nblocksx(dst->format, dstx);
750
751 sbox = *src_box;
752 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
753 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
754 src_box = &sbox;
755 } else {
756 unsigned blocksize = util_format_get_blocksize(src->format);
757
758 switch (blocksize) {
759 case 1:
760 dst_templ.format = PIPE_FORMAT_R8_UNORM;
761 src_templ.format = PIPE_FORMAT_R8_UNORM;
762 break;
763 case 2:
764 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
765 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
766 break;
767 case 4:
768 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
769 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
770 break;
771 case 8:
772 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
773 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
774 break;
775 case 16:
776 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
777 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
778 break;
779 default:
780 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
781 util_format_short_name(src->format), blocksize);
782 assert(0);
783 }
784 }
785 }
786
787 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
788 /* we don't care about these two for r600g */
789 dst->width0, dst->height0,
790 dst_width, dst_height);
791
792 if (rctx->b.chip_class >= EVERGREEN) {
793 src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ,
794 src_width0, src_height0,
795 src_force_level);
796 } else {
797 src_view = r600_create_sampler_view_custom(ctx, src, &src_templ,
798 src_widthFL, src_heightFL);
799 }
800
801 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
802 abs(src_box->depth), &dstbox);
803
804 /* Copy. */
805 r600_blitter_begin(ctx, R600_COPY_TEXTURE);
806 util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
807 src_view, src_box, src_width0, src_height0,
808 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
809 FALSE);
810 r600_blitter_end(ctx);
811
812 pipe_surface_reference(&dst_view, NULL);
813 pipe_sampler_view_reference(&src_view, NULL);
814 }
815
816 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
817 const struct pipe_blit_info *info)
818 {
819 struct r600_context *rctx = (struct r600_context*)ctx;
820 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
821 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
822 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
823 enum pipe_format format = info->src.format;
824 unsigned sample_mask =
825 rctx->b.chip_class == CAYMAN ? ~0 :
826 ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);
827 struct pipe_resource *tmp, templ;
828 struct pipe_blit_info blit;
829
830 /* Check basic requirements for hw resolve. */
831 if (!(info->src.resource->nr_samples > 1 &&
832 info->dst.resource->nr_samples <= 1 &&
833 !util_format_is_pure_integer(format) &&
834 !util_format_is_depth_or_stencil(format) &&
835 util_max_layer(info->src.resource, 0) == 0))
836 return false;
837
838 /* Check the remaining requirements for hw resolve. */
839 if (util_max_layer(info->dst.resource, info->dst.level) == 0 &&
840 util_is_format_compatible(util_format_description(info->src.format),
841 util_format_description(info->dst.format)) &&
842 !info->scissor_enable &&
843 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
844 dst_width == info->src.resource->width0 &&
845 dst_height == info->src.resource->height0 &&
846 info->dst.box.x == 0 &&
847 info->dst.box.y == 0 &&
848 info->dst.box.width == dst_width &&
849 info->dst.box.height == dst_height &&
850 info->dst.box.depth == 1 &&
851 info->src.box.x == 0 &&
852 info->src.box.y == 0 &&
853 info->src.box.width == dst_width &&
854 info->src.box.height == dst_height &&
855 info->src.box.depth == 1 &&
856 dst->surface.u.legacy.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
857 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
858 r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
859 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
860 util_blitter_custom_resolve_color(rctx->blitter,
861 info->dst.resource, info->dst.level,
862 info->dst.box.z,
863 info->src.resource, info->src.box.z,
864 sample_mask, rctx->custom_blend_resolve,
865 format);
866 r600_blitter_end(ctx);
867 return true;
868 }
869
870 /* Shader-based resolve is VERY SLOW. Instead, resolve into
871 * a temporary texture and blit.
872 */
873 memset(&templ, 0, sizeof(templ));
874 templ.target = PIPE_TEXTURE_2D;
875 templ.format = info->src.resource->format;
876 templ.width0 = info->src.resource->width0;
877 templ.height0 = info->src.resource->height0;
878 templ.depth0 = 1;
879 templ.array_size = 1;
880 templ.usage = PIPE_USAGE_DEFAULT;
881 templ.flags = R600_RESOURCE_FLAG_FORCE_TILING;
882
883 tmp = ctx->screen->resource_create(ctx->screen, &templ);
884 if (!tmp)
885 return false;
886
887 /* resolve */
888 r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
889 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
890 util_blitter_custom_resolve_color(rctx->blitter, tmp, 0, 0,
891 info->src.resource, info->src.box.z,
892 sample_mask, rctx->custom_blend_resolve,
893 format);
894 r600_blitter_end(ctx);
895
896 /* blit */
897 blit = *info;
898 blit.src.resource = tmp;
899 blit.src.box.z = 0;
900
901 r600_blitter_begin(ctx, R600_BLIT |
902 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
903 util_blitter_blit(rctx->blitter, &blit);
904 r600_blitter_end(ctx);
905
906 pipe_resource_reference(&tmp, NULL);
907 return true;
908 }
909
910 static void r600_blit(struct pipe_context *ctx,
911 const struct pipe_blit_info *info)
912 {
913 struct r600_context *rctx = (struct r600_context*)ctx;
914 struct r600_texture *rdst = (struct r600_texture *)info->dst.resource;
915
916 if (do_hardware_msaa_resolve(ctx, info)) {
917 return;
918 }
919
920 /* Using SDMA for copying to a linear texture in GTT is much faster.
921 * This improves DRI PRIME performance.
922 *
923 * resource_copy_region can't do this yet, because dma_copy calls it
924 * on failure (recursion).
925 */
926 if (rdst->surface.u.legacy.level[info->dst.level].mode ==
927 RADEON_SURF_MODE_LINEAR_ALIGNED &&
928 rctx->b.dma_copy &&
929 util_can_blit_via_copy_region(info, false)) {
930 rctx->b.dma_copy(ctx, info->dst.resource, info->dst.level,
931 info->dst.box.x, info->dst.box.y,
932 info->dst.box.z,
933 info->src.resource, info->src.level,
934 &info->src.box);
935 return;
936 }
937
938 assert(util_blitter_is_blit_supported(rctx->blitter, info));
939
940 /* The driver doesn't decompress resources automatically while
941 * u_blitter is rendering. */
942 if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level,
943 info->src.box.z,
944 info->src.box.z + info->src.box.depth - 1)) {
945 return; /* error */
946 }
947
948 if (rctx->screen->b.debug_flags & DBG_FORCE_DMA &&
949 util_try_blit_via_copy_region(ctx, info))
950 return;
951
952 r600_blitter_begin(ctx, R600_BLIT |
953 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
954 util_blitter_blit(rctx->blitter, info);
955 r600_blitter_end(ctx);
956 }
957
958 static void r600_flush_resource(struct pipe_context *ctx,
959 struct pipe_resource *res)
960 {
961 struct r600_texture *rtex = (struct r600_texture*)res;
962
963 assert(res->target != PIPE_BUFFER);
964
965 if (!rtex->is_depth && rtex->cmask.size) {
966 r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
967 0, util_max_layer(res, 0));
968 }
969 }
970
971 void r600_init_blit_functions(struct r600_context *rctx)
972 {
973 rctx->b.b.clear = r600_clear;
974 rctx->b.b.clear_render_target = r600_clear_render_target;
975 rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil;
976 rctx->b.b.resource_copy_region = r600_resource_copy_region;
977 rctx->b.b.blit = r600_blit;
978 rctx->b.b.flush_resource = r600_flush_resource;
979 rctx->b.clear_buffer = r600_clear_buffer;
980 rctx->b.blit_decompress_depth = r600_blit_decompress_depth;
981 }