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[mesa.git] / src / gallium / drivers / r600 / r600_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "r600_pipe.h"
24 #include "compute_memory_pool.h"
25 #include "evergreen_compute.h"
26 #include "util/u_surface.h"
27 #include "util/u_format.h"
28 #include "evergreend.h"
29
30 enum r600_blitter_op /* bitmask */
31 {
32 R600_SAVE_FRAGMENT_STATE = 1,
33 R600_SAVE_TEXTURES = 2,
34 R600_SAVE_FRAMEBUFFER = 4,
35 R600_DISABLE_RENDER_COND = 8,
36
37 R600_CLEAR = R600_SAVE_FRAGMENT_STATE,
38
39 R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER,
40
41 R600_COPY_BUFFER = R600_DISABLE_RENDER_COND,
42
43 R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
44 R600_DISABLE_RENDER_COND,
45
46 R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES,
47
48 R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
49
50 R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER
51 };
52
53 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
54 {
55 struct r600_context *rctx = (struct r600_context *)ctx;
56
57 r600_suspend_nontimer_queries(&rctx->b);
58
59 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb);
60 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
61 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
62 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
63 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)rctx->b.streamout.targets);
65 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
66
67 if (op & R600_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_viewport(rctx->blitter, &rctx->viewport[0].state);
69 util_blitter_save_scissor(rctx->blitter, &rctx->scissor[0].scissor);
70 util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
71 util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
72 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
73 util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state);
74 util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask);
75 }
76
77 if (op & R600_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state);
79
80 if (op & R600_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask),
83 (void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states);
84
85 util_blitter_save_fragment_sampler_views(
86 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask),
87 (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
88 }
89
90 if ((op & R600_DISABLE_RENDER_COND) && rctx->b.current_render_cond) {
91 util_blitter_save_render_condition(rctx->blitter,
92 rctx->b.current_render_cond,
93 rctx->b.current_render_cond_cond,
94 rctx->b.current_render_cond_mode);
95 }
96 }
97
98 static void r600_blitter_end(struct pipe_context *ctx)
99 {
100 struct r600_context *rctx = (struct r600_context *)ctx;
101 r600_resume_nontimer_queries(&rctx->b);
102 }
103
104 static unsigned u_max_sample(struct pipe_resource *r)
105 {
106 return r->nr_samples ? r->nr_samples - 1 : 0;
107 }
108
109 static void r600_blit_decompress_depth(struct pipe_context *ctx,
110 struct r600_texture *texture,
111 struct r600_texture *staging,
112 unsigned first_level, unsigned last_level,
113 unsigned first_layer, unsigned last_layer,
114 unsigned first_sample, unsigned last_sample)
115 {
116 struct r600_context *rctx = (struct r600_context *)ctx;
117 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
118 struct r600_texture *flushed_depth_texture = staging ?
119 staging : texture->flushed_depth_texture;
120 const struct util_format_description *desc =
121 util_format_description(texture->resource.b.b.format);
122 float depth;
123
124 if (!staging && !texture->dirty_level_mask)
125 return;
126
127 max_sample = u_max_sample(&texture->resource.b.b);
128
129 /* XXX Decompressing MSAA depth textures is broken on R6xx.
130 * There is also a hardlock if CMASK and FMASK are not present.
131 * Just skip this until we find out how to fix it. */
132 if (rctx->b.chip_class == R600 && max_sample > 0) {
133 texture->dirty_level_mask = 0;
134 return;
135 }
136
137 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 ||
138 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635)
139 depth = 0.0f;
140 else
141 depth = 1.0f;
142
143 /* Enable decompression in DB_RENDER_CONTROL */
144 rctx->db_misc_state.flush_depthstencil_through_cb = true;
145 rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
146 rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
147 rctx->db_misc_state.copy_sample = first_sample;
148 rctx->db_misc_state.atom.dirty = true;
149
150 for (level = first_level; level <= last_level; level++) {
151 if (!staging && !(texture->dirty_level_mask & (1 << level)))
152 continue;
153
154 /* The smaller the mipmap level, the less layers there are
155 * as far as 3D textures are concerned. */
156 max_layer = util_max_layer(&texture->resource.b.b, level);
157 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
158
159 for (layer = first_layer; layer <= checked_last_layer; layer++) {
160 for (sample = first_sample; sample <= last_sample; sample++) {
161 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
162
163 if (sample != rctx->db_misc_state.copy_sample) {
164 rctx->db_misc_state.copy_sample = sample;
165 rctx->db_misc_state.atom.dirty = true;
166 }
167
168 surf_tmpl.format = texture->resource.b.b.format;
169 surf_tmpl.u.tex.level = level;
170 surf_tmpl.u.tex.first_layer = layer;
171 surf_tmpl.u.tex.last_layer = layer;
172
173 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
174
175 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
176 cbsurf = ctx->create_surface(ctx,
177 &flushed_depth_texture->resource.b.b, &surf_tmpl);
178
179 r600_blitter_begin(ctx, R600_DECOMPRESS);
180 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample,
181 rctx->custom_dsa_flush, depth);
182 r600_blitter_end(ctx);
183
184 pipe_surface_reference(&zsurf, NULL);
185 pipe_surface_reference(&cbsurf, NULL);
186 }
187 }
188
189 /* The texture will always be dirty if some layers or samples aren't flushed.
190 * I don't think this case occurs often though. */
191 if (!staging &&
192 first_layer == 0 && last_layer == max_layer &&
193 first_sample == 0 && last_sample == max_sample) {
194 texture->dirty_level_mask &= ~(1 << level);
195 }
196 }
197
198 /* reenable compression in DB_RENDER_CONTROL */
199 rctx->db_misc_state.flush_depthstencil_through_cb = false;
200 rctx->db_misc_state.atom.dirty = true;
201 }
202
203 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
204 struct r600_texture *texture,
205 unsigned first_level, unsigned last_level,
206 unsigned first_layer, unsigned last_layer)
207 {
208 struct pipe_surface *zsurf, surf_tmpl = {{0}};
209 unsigned layer, max_layer, checked_last_layer, level;
210
211 /* Enable decompression in DB_RENDER_CONTROL */
212 rctx->db_misc_state.flush_depthstencil_in_place = true;
213 rctx->db_misc_state.atom.dirty = true;
214
215 surf_tmpl.format = texture->resource.b.b.format;
216
217 for (level = first_level; level <= last_level; level++) {
218 if (!(texture->dirty_level_mask & (1 << level)))
219 continue;
220
221 surf_tmpl.u.tex.level = level;
222
223 /* The smaller the mipmap level, the less layers there are
224 * as far as 3D textures are concerned. */
225 max_layer = util_max_layer(&texture->resource.b.b, level);
226 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
227
228 for (layer = first_layer; layer <= checked_last_layer; layer++) {
229 surf_tmpl.u.tex.first_layer = layer;
230 surf_tmpl.u.tex.last_layer = layer;
231
232 zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl);
233
234 r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS);
235 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0,
236 rctx->custom_dsa_flush, 1.0f);
237 r600_blitter_end(&rctx->b.b);
238
239 pipe_surface_reference(&zsurf, NULL);
240 }
241
242 /* The texture will always be dirty if some layers or samples aren't flushed.
243 * I don't think this case occurs often though. */
244 if (first_layer == 0 && last_layer == max_layer) {
245 texture->dirty_level_mask &= ~(1 << level);
246 }
247 }
248
249 /* Disable decompression in DB_RENDER_CONTROL */
250 rctx->db_misc_state.flush_depthstencil_in_place = false;
251 rctx->db_misc_state.atom.dirty = true;
252 }
253
254 void r600_decompress_depth_textures(struct r600_context *rctx,
255 struct r600_samplerview_state *textures)
256 {
257 unsigned i;
258 unsigned depth_texture_mask = textures->compressed_depthtex_mask;
259
260 while (depth_texture_mask) {
261 struct pipe_sampler_view *view;
262 struct r600_texture *tex;
263
264 i = u_bit_scan(&depth_texture_mask);
265
266 view = &textures->views[i]->base;
267 assert(view);
268
269 tex = (struct r600_texture *)view->texture;
270 assert(tex->is_depth && !tex->is_flushing_texture);
271
272 if (rctx->b.chip_class >= EVERGREEN ||
273 r600_can_read_depth(tex)) {
274 r600_blit_decompress_depth_in_place(rctx, tex,
275 view->u.tex.first_level, view->u.tex.last_level,
276 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
277 } else {
278 r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
279 view->u.tex.first_level, view->u.tex.last_level,
280 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
281 0, u_max_sample(&tex->resource.b.b));
282 }
283 }
284 }
285
286 static void r600_blit_decompress_color(struct pipe_context *ctx,
287 struct r600_texture *rtex,
288 unsigned first_level, unsigned last_level,
289 unsigned first_layer, unsigned last_layer)
290 {
291 struct r600_context *rctx = (struct r600_context *)ctx;
292 unsigned layer, level, checked_last_layer, max_layer;
293
294 if (!rtex->dirty_level_mask)
295 return;
296
297 for (level = first_level; level <= last_level; level++) {
298 if (!(rtex->dirty_level_mask & (1 << level)))
299 continue;
300
301 /* The smaller the mipmap level, the less layers there are
302 * as far as 3D textures are concerned. */
303 max_layer = util_max_layer(&rtex->resource.b.b, level);
304 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
305
306 for (layer = first_layer; layer <= checked_last_layer; layer++) {
307 struct pipe_surface *cbsurf, surf_tmpl;
308
309 surf_tmpl.format = rtex->resource.b.b.format;
310 surf_tmpl.u.tex.level = level;
311 surf_tmpl.u.tex.first_layer = layer;
312 surf_tmpl.u.tex.last_layer = layer;
313 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
314
315 r600_blitter_begin(ctx, R600_DECOMPRESS);
316 util_blitter_custom_color(rctx->blitter, cbsurf,
317 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear);
318 r600_blitter_end(ctx);
319
320 pipe_surface_reference(&cbsurf, NULL);
321 }
322
323 /* The texture will always be dirty if some layers aren't flushed.
324 * I don't think this case occurs often though. */
325 if (first_layer == 0 && last_layer == max_layer) {
326 rtex->dirty_level_mask &= ~(1 << level);
327 }
328 }
329 }
330
331 void r600_decompress_color_textures(struct r600_context *rctx,
332 struct r600_samplerview_state *textures)
333 {
334 unsigned i;
335 unsigned mask = textures->compressed_colortex_mask;
336
337 while (mask) {
338 struct pipe_sampler_view *view;
339 struct r600_texture *tex;
340
341 i = u_bit_scan(&mask);
342
343 view = &textures->views[i]->base;
344 assert(view);
345
346 tex = (struct r600_texture *)view->texture;
347 assert(tex->cmask.size);
348
349 r600_blit_decompress_color(&rctx->b.b, tex,
350 view->u.tex.first_level, view->u.tex.last_level,
351 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
352 }
353 }
354
355 /* Helper for decompressing a portion of a color or depth resource before
356 * blitting if any decompression is needed.
357 * The driver doesn't decompress resources automatically while u_blitter is
358 * rendering. */
359 static bool r600_decompress_subresource(struct pipe_context *ctx,
360 struct pipe_resource *tex,
361 unsigned level,
362 unsigned first_layer, unsigned last_layer)
363 {
364 struct r600_context *rctx = (struct r600_context *)ctx;
365 struct r600_texture *rtex = (struct r600_texture*)tex;
366
367 if (rtex->is_depth && !rtex->is_flushing_texture) {
368 if (rctx->b.chip_class >= EVERGREEN ||
369 r600_can_read_depth(rtex)) {
370 r600_blit_decompress_depth_in_place(rctx, rtex,
371 level, level,
372 first_layer, last_layer);
373 } else {
374 if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
375 return false; /* error */
376
377 r600_blit_decompress_depth(ctx, rtex, NULL,
378 level, level,
379 first_layer, last_layer,
380 0, u_max_sample(tex));
381 }
382 } else if (rtex->cmask.size) {
383 r600_blit_decompress_color(ctx, rtex, level, level,
384 first_layer, last_layer);
385 }
386 return true;
387 }
388
389 static void r600_clear(struct pipe_context *ctx, unsigned buffers,
390 const union pipe_color_union *color,
391 double depth, unsigned stencil)
392 {
393 struct r600_context *rctx = (struct r600_context *)ctx;
394 struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
395
396 /* Single-sample fast color clear is broken on r600g:
397 * https://bugs.freedesktop.org/show_bug.cgi?id=73528
398 * https://bugs.freedesktop.org/show_bug.cgi?id=82186
399 */
400 if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN &&
401 rctx->framebuffer.nr_samples > 1) {
402 evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
403 &buffers, color);
404 if (!buffers)
405 return; /* all buffers have been fast cleared */
406 }
407
408 if (buffers & PIPE_CLEAR_COLOR) {
409 int i;
410
411 /* These buffers cannot use fast clear, make sure to disable expansion. */
412 for (i = 0; i < fb->nr_cbufs; i++) {
413 struct r600_texture *tex;
414
415 /* If not clearing this buffer, skip. */
416 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
417 continue;
418
419 if (!fb->cbufs[i])
420 continue;
421
422 tex = (struct r600_texture *)fb->cbufs[i]->texture;
423 if (tex->fmask.size == 0)
424 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
425 }
426 }
427
428 /* if hyperz enabled just clear hyperz */
429 if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
430 struct r600_texture *rtex;
431 unsigned level = fb->zsbuf->u.tex.level;
432
433 rtex = (struct r600_texture*)fb->zsbuf->texture;
434
435 /* We can't use hyperz fast clear if each slice of a texture
436 * array are clear to different value. To simplify code just
437 * disable fast clear for texture array.
438 */
439 /* Only use htile for first level */
440 if (rtex->htile_buffer && !level &&
441 fb->zsbuf->u.tex.first_layer == 0 &&
442 fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) {
443 if (rtex->depth_clear_value != depth) {
444 rtex->depth_clear_value = depth;
445 rctx->db_state.atom.dirty = true;
446 }
447 rctx->db_misc_state.htile_clear = true;
448 rctx->db_misc_state.atom.dirty = true;
449 }
450 }
451
452 r600_blitter_begin(ctx, R600_CLEAR);
453 util_blitter_clear(rctx->blitter, fb->width, fb->height,
454 util_framebuffer_get_num_layers(fb),
455 buffers, color, depth, stencil);
456 r600_blitter_end(ctx);
457
458 /* disable fast clear */
459 if (rctx->db_misc_state.htile_clear) {
460 rctx->db_misc_state.htile_clear = false;
461 rctx->db_misc_state.atom.dirty = true;
462 }
463 }
464
465 static void r600_clear_render_target(struct pipe_context *ctx,
466 struct pipe_surface *dst,
467 const union pipe_color_union *color,
468 unsigned dstx, unsigned dsty,
469 unsigned width, unsigned height)
470 {
471 struct r600_context *rctx = (struct r600_context *)ctx;
472
473 r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
474 util_blitter_clear_render_target(rctx->blitter, dst, color,
475 dstx, dsty, width, height);
476 r600_blitter_end(ctx);
477 }
478
479 static void r600_clear_depth_stencil(struct pipe_context *ctx,
480 struct pipe_surface *dst,
481 unsigned clear_flags,
482 double depth,
483 unsigned stencil,
484 unsigned dstx, unsigned dsty,
485 unsigned width, unsigned height)
486 {
487 struct r600_context *rctx = (struct r600_context *)ctx;
488
489 r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
490 util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil,
491 dstx, dsty, width, height);
492 r600_blitter_end(ctx);
493 }
494
495 static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
496 struct pipe_resource *src, const struct pipe_box *src_box)
497 {
498 struct r600_context *rctx = (struct r600_context*)ctx;
499
500 if (rctx->screen->b.has_cp_dma) {
501 r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
502 }
503 else if (rctx->screen->b.has_streamout &&
504 /* Require 4-byte alignment. */
505 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
506
507 r600_blitter_begin(ctx, R600_COPY_BUFFER);
508 util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width);
509 r600_blitter_end(ctx);
510 } else {
511 util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
512 }
513
514 /* The index buffer (VGT) doesn't seem to see the result of the copying.
515 * Can we somehow flush the index buffer cache? Starting a new IB seems
516 * to do the trick. */
517 if (rctx->b.chip_class <= R700)
518 rctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
519 }
520
521 /**
522 * Global buffers are not really resources, they are are actually offsets
523 * into a single global resource (r600_screen::global_pool). The means
524 * they don't have their own cs_buf handle, so they cannot be passed
525 * to r600_copy_buffer() and must be handled separately.
526 */
527 static void r600_copy_global_buffer(struct pipe_context *ctx,
528 struct pipe_resource *dst, unsigned
529 dstx, struct pipe_resource *src,
530 const struct pipe_box *src_box)
531 {
532 struct r600_context *rctx = (struct r600_context*)ctx;
533 struct compute_memory_pool *pool = rctx->screen->global_pool;
534 struct pipe_box new_src_box = *src_box;
535
536 if (src->bind & PIPE_BIND_GLOBAL) {
537 struct r600_resource_global *rsrc =
538 (struct r600_resource_global *)src;
539 struct compute_memory_item *item = rsrc->chunk;
540
541 if (is_item_in_pool(item)) {
542 new_src_box.x += 4 * item->start_in_dw;
543 src = (struct pipe_resource *)pool->bo;
544 } else {
545 if (item->real_buffer == NULL) {
546 item->real_buffer = (struct r600_resource*)
547 r600_compute_buffer_alloc_vram(pool->screen,
548 item->size_in_dw * 4);
549 }
550 src = (struct pipe_resource*)item->real_buffer;
551 }
552 }
553 if (dst->bind & PIPE_BIND_GLOBAL) {
554 struct r600_resource_global *rdst =
555 (struct r600_resource_global *)dst;
556 struct compute_memory_item *item = rdst->chunk;
557
558 if (is_item_in_pool(item)) {
559 dstx += 4 * item->start_in_dw;
560 dst = (struct pipe_resource *)pool->bo;
561 } else {
562 if (item->real_buffer == NULL) {
563 item->real_buffer = (struct r600_resource*)
564 r600_compute_buffer_alloc_vram(pool->screen,
565 item->size_in_dw * 4);
566 }
567 dst = (struct pipe_resource*)item->real_buffer;
568 }
569 }
570
571 r600_copy_buffer(ctx, dst, dstx, src, &new_src_box);
572 }
573
574 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
575 unsigned offset, unsigned size, unsigned value,
576 bool is_framebuffer)
577 {
578 struct r600_context *rctx = (struct r600_context*)ctx;
579
580 if (rctx->screen->b.has_cp_dma &&
581 rctx->b.chip_class >= EVERGREEN &&
582 offset % 4 == 0 && size % 4 == 0) {
583 evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value);
584 } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
585 union pipe_color_union clear_value;
586 clear_value.ui[0] = value;
587
588 r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND);
589 util_blitter_clear_buffer(rctx->blitter, dst, offset, size,
590 1, &clear_value);
591 r600_blitter_end(ctx);
592 } else {
593 uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
594 PIPE_TRANSFER_WRITE);
595 size /= 4;
596 for (unsigned i = 0; i < size; i++)
597 *map++ = value;
598 }
599 }
600
601 void r600_resource_copy_region(struct pipe_context *ctx,
602 struct pipe_resource *dst,
603 unsigned dst_level,
604 unsigned dstx, unsigned dsty, unsigned dstz,
605 struct pipe_resource *src,
606 unsigned src_level,
607 const struct pipe_box *src_box)
608 {
609 struct r600_context *rctx = (struct r600_context *)ctx;
610 struct pipe_surface *dst_view, dst_templ;
611 struct pipe_sampler_view src_templ, *src_view;
612 unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
613 unsigned src_force_level = 0;
614 struct pipe_box sbox, dstbox;
615
616 /* Handle buffers first. */
617 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
618 if ((src->bind & PIPE_BIND_GLOBAL) ||
619 (dst->bind & PIPE_BIND_GLOBAL)) {
620 r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
621 } else {
622 r600_copy_buffer(ctx, dst, dstx, src, src_box);
623 }
624 return;
625 }
626
627 assert(u_max_sample(dst) == u_max_sample(src));
628
629 /* The driver doesn't decompress resources automatically while
630 * u_blitter is rendering. */
631 if (!r600_decompress_subresource(ctx, src, src_level,
632 src_box->z, src_box->z + src_box->depth - 1)) {
633 return; /* error */
634 }
635
636 dst_width = u_minify(dst->width0, dst_level);
637 dst_height = u_minify(dst->height0, dst_level);
638 src_width0 = src->width0;
639 src_height0 = src->height0;
640 src_widthFL = u_minify(src->width0, src_level);
641 src_heightFL = u_minify(src->height0, src_level);
642
643 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
644 util_blitter_default_src_texture(&src_templ, src, src_level);
645
646 if (util_format_is_compressed(src->format)) {
647 unsigned blocksize = util_format_get_blocksize(src->format);
648
649 if (blocksize == 8)
650 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
651 else
652 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
653 dst_templ.format = src_templ.format;
654
655 dst_width = util_format_get_nblocksx(dst->format, dst_width);
656 dst_height = util_format_get_nblocksy(dst->format, dst_height);
657 src_width0 = util_format_get_nblocksx(src->format, src_width0);
658 src_height0 = util_format_get_nblocksy(src->format, src_height0);
659 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
660 src_heightFL = util_format_get_nblocksy(src->format, src_heightFL);
661
662 dstx = util_format_get_nblocksx(dst->format, dstx);
663 dsty = util_format_get_nblocksy(dst->format, dsty);
664
665 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
666 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
667 sbox.z = src_box->z;
668 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
669 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
670 sbox.depth = src_box->depth;
671 src_box = &sbox;
672
673 src_force_level = src_level;
674 } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
675 if (util_format_is_subsampled_422(src->format)) {
676
677 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
678 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
679
680 dst_width = util_format_get_nblocksx(dst->format, dst_width);
681 src_width0 = util_format_get_nblocksx(src->format, src_width0);
682 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
683
684 dstx = util_format_get_nblocksx(dst->format, dstx);
685
686 sbox = *src_box;
687 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
688 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
689 src_box = &sbox;
690 } else {
691 unsigned blocksize = util_format_get_blocksize(src->format);
692
693 switch (blocksize) {
694 case 1:
695 dst_templ.format = PIPE_FORMAT_R8_UNORM;
696 src_templ.format = PIPE_FORMAT_R8_UNORM;
697 break;
698 case 2:
699 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
700 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
701 break;
702 case 4:
703 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
704 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
705 break;
706 case 8:
707 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
708 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
709 break;
710 case 16:
711 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
712 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
713 break;
714 default:
715 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
716 util_format_short_name(src->format), blocksize);
717 assert(0);
718 }
719 }
720 }
721
722 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ, dst_width, dst_height);
723
724 if (rctx->b.chip_class >= EVERGREEN) {
725 src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ,
726 src_width0, src_height0,
727 src_force_level);
728 } else {
729 src_view = r600_create_sampler_view_custom(ctx, src, &src_templ,
730 src_widthFL, src_heightFL);
731 }
732
733 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
734 abs(src_box->depth), &dstbox);
735
736 /* Copy. */
737 r600_blitter_begin(ctx, R600_COPY_TEXTURE);
738 util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
739 src_view, src_box, src_width0, src_height0,
740 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL);
741 r600_blitter_end(ctx);
742
743 pipe_surface_reference(&dst_view, NULL);
744 pipe_sampler_view_reference(&src_view, NULL);
745 }
746
747 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
748 static enum pipe_format int_to_norm_format(enum pipe_format format)
749 {
750 switch (format) {
751 #define REPLACE_FORMAT_SIGN(format,sign) \
752 case PIPE_FORMAT_##format##_##sign##INT: \
753 return PIPE_FORMAT_##format##_##sign##NORM
754 #define REPLACE_FORMAT(format) \
755 REPLACE_FORMAT_SIGN(format, U); \
756 REPLACE_FORMAT_SIGN(format, S)
757
758 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
759 REPLACE_FORMAT(R8);
760 REPLACE_FORMAT(R8G8);
761 REPLACE_FORMAT(R8G8B8X8);
762 REPLACE_FORMAT(R8G8B8A8);
763 REPLACE_FORMAT(A8);
764 REPLACE_FORMAT(I8);
765 REPLACE_FORMAT(L8);
766 REPLACE_FORMAT(L8A8);
767 REPLACE_FORMAT(R16);
768 REPLACE_FORMAT(R16G16);
769 REPLACE_FORMAT(R16G16B16X16);
770 REPLACE_FORMAT(R16G16B16A16);
771 REPLACE_FORMAT(A16);
772 REPLACE_FORMAT(I16);
773 REPLACE_FORMAT(L16);
774 REPLACE_FORMAT(L16A16);
775
776 #undef REPLACE_FORMAT
777 #undef REPLACE_FORMAT_SIGN
778 default:
779 return format;
780 }
781 }
782
783 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
784 const struct pipe_blit_info *info)
785 {
786 struct r600_context *rctx = (struct r600_context*)ctx;
787 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
788 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
789 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
790 enum pipe_format format = int_to_norm_format(info->dst.format);
791 unsigned sample_mask =
792 rctx->b.chip_class == CAYMAN ? ~0 :
793 ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);
794
795 if (info->src.resource->nr_samples > 1 &&
796 info->dst.resource->nr_samples <= 1 &&
797 util_max_layer(info->src.resource, 0) == 0 &&
798 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
799 info->dst.format == info->src.format &&
800 !util_format_is_pure_integer(format) &&
801 !util_format_is_depth_or_stencil(format) &&
802 !info->scissor_enable &&
803 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
804 dst_width == info->src.resource->width0 &&
805 dst_height == info->src.resource->height0 &&
806 info->dst.box.x == 0 &&
807 info->dst.box.y == 0 &&
808 info->dst.box.width == dst_width &&
809 info->dst.box.height == dst_height &&
810 info->dst.box.depth == 1 &&
811 info->src.box.x == 0 &&
812 info->src.box.y == 0 &&
813 info->src.box.width == dst_width &&
814 info->src.box.height == dst_height &&
815 info->src.box.depth == 1 &&
816 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
817 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
818 r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
819 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
820 util_blitter_custom_resolve_color(rctx->blitter,
821 info->dst.resource, info->dst.level,
822 info->dst.box.z,
823 info->src.resource, info->src.box.z,
824 sample_mask, rctx->custom_blend_resolve,
825 format);
826 r600_blitter_end(ctx);
827 return true;
828 }
829 return false;
830 }
831
832 static void r600_blit(struct pipe_context *ctx,
833 const struct pipe_blit_info *info)
834 {
835 struct r600_context *rctx = (struct r600_context*)ctx;
836
837 if (do_hardware_msaa_resolve(ctx, info)) {
838 return;
839 }
840
841 assert(util_blitter_is_blit_supported(rctx->blitter, info));
842
843 /* The driver doesn't decompress resources automatically while
844 * u_blitter is rendering. */
845 if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level,
846 info->src.box.z,
847 info->src.box.z + info->src.box.depth - 1)) {
848 return; /* error */
849 }
850
851 if (rctx->screen->b.debug_flags & DBG_FORCE_DMA &&
852 util_try_blit_via_copy_region(ctx, info))
853 return;
854
855 r600_blitter_begin(ctx, R600_BLIT |
856 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
857 util_blitter_blit(rctx->blitter, info);
858 r600_blitter_end(ctx);
859 }
860
861 static void r600_flush_resource(struct pipe_context *ctx,
862 struct pipe_resource *res)
863 {
864 struct r600_texture *rtex = (struct r600_texture*)res;
865
866 assert(res->target != PIPE_BUFFER);
867
868 if (!rtex->is_depth && rtex->cmask.size) {
869 r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
870 0, util_max_layer(res, 0));
871 }
872 }
873
874 void r600_init_blit_functions(struct r600_context *rctx)
875 {
876 rctx->b.b.clear = r600_clear;
877 rctx->b.b.clear_render_target = r600_clear_render_target;
878 rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil;
879 rctx->b.b.resource_copy_region = r600_resource_copy_region;
880 rctx->b.b.blit = r600_blit;
881 rctx->b.b.flush_resource = r600_flush_resource;
882 rctx->b.clear_buffer = r600_clear_buffer;
883 rctx->b.blit_decompress_depth = r600_blit_decompress_depth;
884 }