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r600/sb: schedule LDS ops in appropriate places.
[mesa.git] / src / gallium / drivers / r600 / r600_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "r600_pipe.h"
24 #include "compute_memory_pool.h"
25 #include "evergreen_compute.h"
26 #include "util/u_surface.h"
27 #include "util/u_format.h"
28 #include "evergreend.h"
29
30 enum r600_blitter_op /* bitmask */
31 {
32 R600_SAVE_FRAGMENT_STATE = 1,
33 R600_SAVE_TEXTURES = 2,
34 R600_SAVE_FRAMEBUFFER = 4,
35 R600_DISABLE_RENDER_COND = 8,
36
37 R600_CLEAR = R600_SAVE_FRAGMENT_STATE,
38
39 R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER,
40
41 R600_COPY_BUFFER = R600_DISABLE_RENDER_COND,
42
43 R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
44 R600_DISABLE_RENDER_COND,
45
46 R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES,
47
48 R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
49
50 R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER
51 };
52
53 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
54 {
55 struct r600_context *rctx = (struct r600_context *)ctx;
56
57 if (rctx->cmd_buf_is_compute) {
58 rctx->b.gfx.flush(rctx, PIPE_FLUSH_ASYNC, NULL);
59 rctx->cmd_buf_is_compute = false;
60 }
61
62 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb);
63 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
64 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
65 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
66 util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader);
67 util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader);
68 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
69 (struct pipe_stream_output_target**)rctx->b.streamout.targets);
70 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
71
72 if (op & R600_SAVE_FRAGMENT_STATE) {
73 util_blitter_save_viewport(rctx->blitter, &rctx->b.viewports.states[0]);
74 util_blitter_save_scissor(rctx->blitter, &rctx->b.scissors.states[0]);
75 util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
76 util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
77 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
78 util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state);
79 util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask);
80 }
81
82 if (op & R600_SAVE_FRAMEBUFFER)
83 util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state);
84
85 if (op & R600_SAVE_TEXTURES) {
86 util_blitter_save_fragment_sampler_states(
87 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask),
88 (void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states);
89
90 util_blitter_save_fragment_sampler_views(
91 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask),
92 (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
93 }
94
95 if (op & R600_DISABLE_RENDER_COND)
96 rctx->b.render_cond_force_off = true;
97 }
98
99 static void r600_blitter_end(struct pipe_context *ctx)
100 {
101 struct r600_context *rctx = (struct r600_context *)ctx;
102
103 rctx->b.render_cond_force_off = false;
104 }
105
106 static unsigned u_max_sample(struct pipe_resource *r)
107 {
108 return r->nr_samples ? r->nr_samples - 1 : 0;
109 }
110
111 static void r600_blit_decompress_depth(struct pipe_context *ctx,
112 struct r600_texture *texture,
113 struct r600_texture *staging,
114 unsigned first_level, unsigned last_level,
115 unsigned first_layer, unsigned last_layer,
116 unsigned first_sample, unsigned last_sample)
117 {
118 struct r600_context *rctx = (struct r600_context *)ctx;
119 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
120 struct r600_texture *flushed_depth_texture = staging ?
121 staging : texture->flushed_depth_texture;
122 const struct util_format_description *desc =
123 util_format_description(texture->resource.b.b.format);
124 float depth;
125
126 if (!staging && !texture->dirty_level_mask)
127 return;
128
129 max_sample = u_max_sample(&texture->resource.b.b);
130
131 /* XXX Decompressing MSAA depth textures is broken on R6xx.
132 * There is also a hardlock if CMASK and FMASK are not present.
133 * Just skip this until we find out how to fix it. */
134 if (rctx->b.chip_class == R600 && max_sample > 0) {
135 texture->dirty_level_mask = 0;
136 return;
137 }
138
139 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 ||
140 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635)
141 depth = 0.0f;
142 else
143 depth = 1.0f;
144
145 /* Enable decompression in DB_RENDER_CONTROL */
146 rctx->db_misc_state.flush_depthstencil_through_cb = true;
147 rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
148 rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
149 rctx->db_misc_state.copy_sample = first_sample;
150 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
151
152 for (level = first_level; level <= last_level; level++) {
153 if (!staging && !(texture->dirty_level_mask & (1 << level)))
154 continue;
155
156 /* The smaller the mipmap level, the less layers there are
157 * as far as 3D textures are concerned. */
158 max_layer = util_max_layer(&texture->resource.b.b, level);
159 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
160
161 for (layer = first_layer; layer <= checked_last_layer; layer++) {
162 for (sample = first_sample; sample <= last_sample; sample++) {
163 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
164
165 if (sample != rctx->db_misc_state.copy_sample) {
166 rctx->db_misc_state.copy_sample = sample;
167 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
168 }
169
170 surf_tmpl.format = texture->resource.b.b.format;
171 surf_tmpl.u.tex.level = level;
172 surf_tmpl.u.tex.first_layer = layer;
173 surf_tmpl.u.tex.last_layer = layer;
174
175 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
176
177 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
178 cbsurf = ctx->create_surface(ctx,
179 &flushed_depth_texture->resource.b.b, &surf_tmpl);
180
181 r600_blitter_begin(ctx, R600_DECOMPRESS);
182 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample,
183 rctx->custom_dsa_flush, depth);
184 r600_blitter_end(ctx);
185
186 pipe_surface_reference(&zsurf, NULL);
187 pipe_surface_reference(&cbsurf, NULL);
188 }
189 }
190
191 /* The texture will always be dirty if some layers or samples aren't flushed.
192 * I don't think this case occurs often though. */
193 if (!staging &&
194 first_layer == 0 && last_layer == max_layer &&
195 first_sample == 0 && last_sample == max_sample) {
196 texture->dirty_level_mask &= ~(1 << level);
197 }
198 }
199
200 /* reenable compression in DB_RENDER_CONTROL */
201 rctx->db_misc_state.flush_depthstencil_through_cb = false;
202 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
203 }
204
205 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
206 struct r600_texture *texture,
207 bool is_stencil_sampler,
208 unsigned first_level, unsigned last_level,
209 unsigned first_layer, unsigned last_layer)
210 {
211 struct pipe_surface *zsurf, surf_tmpl = {{0}};
212 unsigned layer, max_layer, checked_last_layer, level;
213 unsigned *dirty_level_mask;
214
215 /* Enable decompression in DB_RENDER_CONTROL */
216 if (is_stencil_sampler) {
217 rctx->db_misc_state.flush_stencil_inplace = true;
218 dirty_level_mask = &texture->stencil_dirty_level_mask;
219 } else {
220 rctx->db_misc_state.flush_depth_inplace = true;
221 dirty_level_mask = &texture->dirty_level_mask;
222 }
223 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
224
225 surf_tmpl.format = texture->resource.b.b.format;
226
227 for (level = first_level; level <= last_level; level++) {
228 if (!(*dirty_level_mask & (1 << level)))
229 continue;
230
231 surf_tmpl.u.tex.level = level;
232
233 /* The smaller the mipmap level, the less layers there are
234 * as far as 3D textures are concerned. */
235 max_layer = util_max_layer(&texture->resource.b.b, level);
236 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
237
238 for (layer = first_layer; layer <= checked_last_layer; layer++) {
239 surf_tmpl.u.tex.first_layer = layer;
240 surf_tmpl.u.tex.last_layer = layer;
241
242 zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl);
243
244 r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS);
245 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0,
246 rctx->custom_dsa_flush, 1.0f);
247 r600_blitter_end(&rctx->b.b);
248
249 pipe_surface_reference(&zsurf, NULL);
250 }
251
252 /* The texture will always be dirty if some layers or samples aren't flushed.
253 * I don't think this case occurs often though. */
254 if (first_layer == 0 && last_layer == max_layer) {
255 *dirty_level_mask &= ~(1 << level);
256 }
257 }
258
259 /* Disable decompression in DB_RENDER_CONTROL */
260 rctx->db_misc_state.flush_depth_inplace = false;
261 rctx->db_misc_state.flush_stencil_inplace = false;
262 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
263 }
264
265 void r600_decompress_depth_textures(struct r600_context *rctx,
266 struct r600_samplerview_state *textures)
267 {
268 unsigned i;
269 unsigned depth_texture_mask = textures->compressed_depthtex_mask;
270
271 while (depth_texture_mask) {
272 struct pipe_sampler_view *view;
273 struct r600_pipe_sampler_view *rview;
274 struct r600_texture *tex;
275
276 i = u_bit_scan(&depth_texture_mask);
277
278 view = &textures->views[i]->base;
279 assert(view);
280 rview = (struct r600_pipe_sampler_view*)view;
281
282 tex = (struct r600_texture *)view->texture;
283 assert(tex->db_compatible);
284
285 if (r600_can_sample_zs(tex, rview->is_stencil_sampler)) {
286 r600_blit_decompress_depth_in_place(rctx, tex,
287 rview->is_stencil_sampler,
288 view->u.tex.first_level, view->u.tex.last_level,
289 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
290 } else {
291 r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
292 view->u.tex.first_level, view->u.tex.last_level,
293 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
294 0, u_max_sample(&tex->resource.b.b));
295 }
296 }
297 }
298
299 void r600_decompress_depth_images(struct r600_context *rctx,
300 struct r600_image_state *images)
301 {
302 unsigned i;
303 unsigned depth_texture_mask = images->compressed_depthtex_mask;
304
305 while (depth_texture_mask) {
306 struct r600_image_view *view;
307 struct r600_texture *tex;
308
309 i = u_bit_scan(&depth_texture_mask);
310
311 view = &images->views[i];
312 assert(view);
313
314 tex = (struct r600_texture *)view->base.resource;
315 assert(tex->db_compatible);
316
317 if (r600_can_sample_zs(tex, false)) {
318 r600_blit_decompress_depth_in_place(rctx, tex,
319 false,
320 view->base.u.tex.level,
321 view->base.u.tex.level,
322 0, util_max_layer(&tex->resource.b.b, view->base.u.tex.level));
323 } else {
324 r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
325 view->base.u.tex.level,
326 view->base.u.tex.level,
327 0, util_max_layer(&tex->resource.b.b, view->base.u.tex.level),
328 0, u_max_sample(&tex->resource.b.b));
329 }
330 }
331 }
332
333 static void r600_blit_decompress_color(struct pipe_context *ctx,
334 struct r600_texture *rtex,
335 unsigned first_level, unsigned last_level,
336 unsigned first_layer, unsigned last_layer)
337 {
338 struct r600_context *rctx = (struct r600_context *)ctx;
339 unsigned layer, level, checked_last_layer, max_layer;
340
341 if (!rtex->dirty_level_mask)
342 return;
343
344 for (level = first_level; level <= last_level; level++) {
345 if (!(rtex->dirty_level_mask & (1 << level)))
346 continue;
347
348 /* The smaller the mipmap level, the less layers there are
349 * as far as 3D textures are concerned. */
350 max_layer = util_max_layer(&rtex->resource.b.b, level);
351 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
352
353 for (layer = first_layer; layer <= checked_last_layer; layer++) {
354 struct pipe_surface *cbsurf, surf_tmpl;
355
356 surf_tmpl.format = rtex->resource.b.b.format;
357 surf_tmpl.u.tex.level = level;
358 surf_tmpl.u.tex.first_layer = layer;
359 surf_tmpl.u.tex.last_layer = layer;
360 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
361
362 r600_blitter_begin(ctx, R600_DECOMPRESS);
363 util_blitter_custom_color(rctx->blitter, cbsurf,
364 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear);
365 r600_blitter_end(ctx);
366
367 pipe_surface_reference(&cbsurf, NULL);
368 }
369
370 /* The texture will always be dirty if some layers aren't flushed.
371 * I don't think this case occurs often though. */
372 if (first_layer == 0 && last_layer == max_layer) {
373 rtex->dirty_level_mask &= ~(1 << level);
374 }
375 }
376 }
377
378 void r600_decompress_color_textures(struct r600_context *rctx,
379 struct r600_samplerview_state *textures)
380 {
381 unsigned i;
382 unsigned mask = textures->compressed_colortex_mask;
383
384 while (mask) {
385 struct pipe_sampler_view *view;
386 struct r600_texture *tex;
387
388 i = u_bit_scan(&mask);
389
390 view = &textures->views[i]->base;
391 assert(view);
392
393 tex = (struct r600_texture *)view->texture;
394 assert(tex->cmask.size);
395
396 r600_blit_decompress_color(&rctx->b.b, tex,
397 view->u.tex.first_level, view->u.tex.last_level,
398 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
399 }
400 }
401
402 void r600_decompress_color_images(struct r600_context *rctx,
403 struct r600_image_state *images)
404 {
405 unsigned i;
406 unsigned mask = images->compressed_colortex_mask;
407
408 while (mask) {
409 struct r600_image_view *view;
410 struct r600_texture *tex;
411
412 i = u_bit_scan(&mask);
413
414 view = &images->views[i];
415 assert(view);
416
417 tex = (struct r600_texture *)view->base.resource;
418 assert(tex->cmask.size);
419
420 r600_blit_decompress_color(&rctx->b.b, tex,
421 view->base.u.tex.level, view->base.u.tex.level,
422 view->base.u.tex.first_layer,
423 view->base.u.tex.last_layer);
424 }
425 }
426
427 /* Helper for decompressing a portion of a color or depth resource before
428 * blitting if any decompression is needed.
429 * The driver doesn't decompress resources automatically while u_blitter is
430 * rendering. */
431 static bool r600_decompress_subresource(struct pipe_context *ctx,
432 struct pipe_resource *tex,
433 unsigned level,
434 unsigned first_layer, unsigned last_layer)
435 {
436 struct r600_context *rctx = (struct r600_context *)ctx;
437 struct r600_texture *rtex = (struct r600_texture*)tex;
438
439 if (rtex->db_compatible) {
440 if (r600_can_sample_zs(rtex, false)) {
441 r600_blit_decompress_depth_in_place(rctx, rtex, false,
442 level, level,
443 first_layer, last_layer);
444 if (rtex->surface.has_stencil) {
445 r600_blit_decompress_depth_in_place(rctx, rtex, true,
446 level, level,
447 first_layer, last_layer);
448 }
449 } else {
450 if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
451 return false; /* error */
452
453 r600_blit_decompress_depth(ctx, rtex, NULL,
454 level, level,
455 first_layer, last_layer,
456 0, u_max_sample(tex));
457 }
458 } else if (rtex->cmask.size) {
459 r600_blit_decompress_color(ctx, rtex, level, level,
460 first_layer, last_layer);
461 }
462 return true;
463 }
464
465 static void r600_clear(struct pipe_context *ctx, unsigned buffers,
466 const union pipe_color_union *color,
467 double depth, unsigned stencil)
468 {
469 struct r600_context *rctx = (struct r600_context *)ctx;
470 struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
471
472 if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
473 evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
474 &buffers, NULL, color);
475 if (!buffers)
476 return; /* all buffers have been fast cleared */
477 }
478
479 if (buffers & PIPE_CLEAR_COLOR) {
480 int i;
481
482 /* These buffers cannot use fast clear, make sure to disable expansion. */
483 for (i = 0; i < fb->nr_cbufs; i++) {
484 struct r600_texture *tex;
485
486 /* If not clearing this buffer, skip. */
487 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
488 continue;
489
490 if (!fb->cbufs[i])
491 continue;
492
493 tex = (struct r600_texture *)fb->cbufs[i]->texture;
494 if (tex->fmask.size == 0)
495 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
496 }
497 }
498
499 /* if hyperz enabled just clear hyperz */
500 if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
501 struct r600_texture *rtex;
502 unsigned level = fb->zsbuf->u.tex.level;
503
504 rtex = (struct r600_texture*)fb->zsbuf->texture;
505
506 /* We can't use hyperz fast clear if each slice of a texture
507 * array are clear to different value. To simplify code just
508 * disable fast clear for texture array.
509 */
510 if (r600_htile_enabled(rtex, level) &&
511 fb->zsbuf->u.tex.first_layer == 0 &&
512 fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) {
513 if (rtex->depth_clear_value != depth) {
514 rtex->depth_clear_value = depth;
515 r600_mark_atom_dirty(rctx, &rctx->db_state.atom);
516 }
517 rctx->db_misc_state.htile_clear = true;
518 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
519 }
520 }
521
522 r600_blitter_begin(ctx, R600_CLEAR);
523 util_blitter_clear(rctx->blitter, fb->width, fb->height,
524 util_framebuffer_get_num_layers(fb),
525 buffers, color, depth, stencil);
526 r600_blitter_end(ctx);
527
528 /* disable fast clear */
529 if (rctx->db_misc_state.htile_clear) {
530 rctx->db_misc_state.htile_clear = false;
531 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
532 }
533 }
534
535 static void r600_clear_render_target(struct pipe_context *ctx,
536 struct pipe_surface *dst,
537 const union pipe_color_union *color,
538 unsigned dstx, unsigned dsty,
539 unsigned width, unsigned height,
540 bool render_condition_enabled)
541 {
542 struct r600_context *rctx = (struct r600_context *)ctx;
543
544 r600_blitter_begin(ctx, R600_CLEAR_SURFACE |
545 (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND));
546 util_blitter_clear_render_target(rctx->blitter, dst, color,
547 dstx, dsty, width, height);
548 r600_blitter_end(ctx);
549 }
550
551 static void r600_clear_depth_stencil(struct pipe_context *ctx,
552 struct pipe_surface *dst,
553 unsigned clear_flags,
554 double depth,
555 unsigned stencil,
556 unsigned dstx, unsigned dsty,
557 unsigned width, unsigned height,
558 bool render_condition_enabled)
559 {
560 struct r600_context *rctx = (struct r600_context *)ctx;
561
562 r600_blitter_begin(ctx, R600_CLEAR_SURFACE |
563 (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND));
564 util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil,
565 dstx, dsty, width, height);
566 r600_blitter_end(ctx);
567 }
568
569 static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
570 struct pipe_resource *src, const struct pipe_box *src_box)
571 {
572 struct r600_context *rctx = (struct r600_context*)ctx;
573
574 if (rctx->screen->b.has_cp_dma) {
575 r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
576 }
577 else if (rctx->screen->b.has_streamout &&
578 /* Require 4-byte alignment. */
579 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
580
581 r600_blitter_begin(ctx, R600_COPY_BUFFER);
582 util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width);
583 r600_blitter_end(ctx);
584 } else {
585 util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
586 }
587 }
588
589 /**
590 * Global buffers are not really resources, they are are actually offsets
591 * into a single global resource (r600_screen::global_pool). The means
592 * they don't have their own buf handle, so they cannot be passed
593 * to r600_copy_buffer() and must be handled separately.
594 */
595 static void r600_copy_global_buffer(struct pipe_context *ctx,
596 struct pipe_resource *dst, unsigned
597 dstx, struct pipe_resource *src,
598 const struct pipe_box *src_box)
599 {
600 struct r600_context *rctx = (struct r600_context*)ctx;
601 struct compute_memory_pool *pool = rctx->screen->global_pool;
602 struct pipe_box new_src_box = *src_box;
603
604 if (src->bind & PIPE_BIND_GLOBAL) {
605 struct r600_resource_global *rsrc =
606 (struct r600_resource_global *)src;
607 struct compute_memory_item *item = rsrc->chunk;
608
609 if (is_item_in_pool(item)) {
610 new_src_box.x += 4 * item->start_in_dw;
611 src = (struct pipe_resource *)pool->bo;
612 } else {
613 if (item->real_buffer == NULL) {
614 item->real_buffer =
615 r600_compute_buffer_alloc_vram(pool->screen,
616 item->size_in_dw * 4);
617 }
618 src = (struct pipe_resource*)item->real_buffer;
619 }
620 }
621 if (dst->bind & PIPE_BIND_GLOBAL) {
622 struct r600_resource_global *rdst =
623 (struct r600_resource_global *)dst;
624 struct compute_memory_item *item = rdst->chunk;
625
626 if (is_item_in_pool(item)) {
627 dstx += 4 * item->start_in_dw;
628 dst = (struct pipe_resource *)pool->bo;
629 } else {
630 if (item->real_buffer == NULL) {
631 item->real_buffer =
632 r600_compute_buffer_alloc_vram(pool->screen,
633 item->size_in_dw * 4);
634 }
635 dst = (struct pipe_resource*)item->real_buffer;
636 }
637 }
638
639 r600_copy_buffer(ctx, dst, dstx, src, &new_src_box);
640 }
641
642 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
643 uint64_t offset, uint64_t size, unsigned value,
644 enum r600_coherency coher)
645 {
646 struct r600_context *rctx = (struct r600_context*)ctx;
647
648 if (rctx->screen->b.has_cp_dma &&
649 rctx->b.chip_class >= EVERGREEN &&
650 offset % 4 == 0 && size % 4 == 0) {
651 evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher);
652 } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
653 union pipe_color_union clear_value;
654 clear_value.ui[0] = value;
655
656 r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND);
657 util_blitter_clear_buffer(rctx->blitter, dst, offset, size,
658 1, &clear_value);
659 r600_blitter_end(ctx);
660 } else {
661 uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
662 PIPE_TRANSFER_WRITE);
663 map += offset / 4;
664 size /= 4;
665 for (unsigned i = 0; i < size; i++)
666 *map++ = value;
667 }
668 }
669
670 void r600_resource_copy_region(struct pipe_context *ctx,
671 struct pipe_resource *dst,
672 unsigned dst_level,
673 unsigned dstx, unsigned dsty, unsigned dstz,
674 struct pipe_resource *src,
675 unsigned src_level,
676 const struct pipe_box *src_box)
677 {
678 struct r600_context *rctx = (struct r600_context *)ctx;
679 struct pipe_surface *dst_view, dst_templ;
680 struct pipe_sampler_view src_templ, *src_view;
681 unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
682 unsigned src_force_level = 0;
683 struct pipe_box sbox, dstbox;
684
685 /* Handle buffers first. */
686 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
687 if ((src->bind & PIPE_BIND_GLOBAL) ||
688 (dst->bind & PIPE_BIND_GLOBAL)) {
689 r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
690 } else {
691 r600_copy_buffer(ctx, dst, dstx, src, src_box);
692 }
693 return;
694 }
695
696 assert(u_max_sample(dst) == u_max_sample(src));
697
698 /* The driver doesn't decompress resources automatically while
699 * u_blitter is rendering. */
700 if (!r600_decompress_subresource(ctx, src, src_level,
701 src_box->z, src_box->z + src_box->depth - 1)) {
702 return; /* error */
703 }
704
705 dst_width = u_minify(dst->width0, dst_level);
706 dst_height = u_minify(dst->height0, dst_level);
707 src_width0 = src->width0;
708 src_height0 = src->height0;
709 src_widthFL = u_minify(src->width0, src_level);
710 src_heightFL = u_minify(src->height0, src_level);
711
712 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
713 util_blitter_default_src_texture(rctx->blitter, &src_templ, src, src_level);
714
715 if (util_format_is_compressed(src->format) ||
716 util_format_is_compressed(dst->format)) {
717 unsigned blocksize = util_format_get_blocksize(src->format);
718
719 if (blocksize == 8)
720 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
721 else
722 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
723 dst_templ.format = src_templ.format;
724
725 dst_width = util_format_get_nblocksx(dst->format, dst_width);
726 dst_height = util_format_get_nblocksy(dst->format, dst_height);
727 src_width0 = util_format_get_nblocksx(src->format, src_width0);
728 src_height0 = util_format_get_nblocksy(src->format, src_height0);
729 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
730 src_heightFL = util_format_get_nblocksy(src->format, src_heightFL);
731
732 dstx = util_format_get_nblocksx(dst->format, dstx);
733 dsty = util_format_get_nblocksy(dst->format, dsty);
734
735 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
736 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
737 sbox.z = src_box->z;
738 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
739 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
740 sbox.depth = src_box->depth;
741 src_box = &sbox;
742
743 src_force_level = src_level;
744 } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
745 if (util_format_is_subsampled_422(src->format)) {
746
747 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
748 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
749
750 dst_width = util_format_get_nblocksx(dst->format, dst_width);
751 src_width0 = util_format_get_nblocksx(src->format, src_width0);
752 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
753
754 dstx = util_format_get_nblocksx(dst->format, dstx);
755
756 sbox = *src_box;
757 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
758 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
759 src_box = &sbox;
760 } else {
761 unsigned blocksize = util_format_get_blocksize(src->format);
762
763 switch (blocksize) {
764 case 1:
765 dst_templ.format = PIPE_FORMAT_R8_UNORM;
766 src_templ.format = PIPE_FORMAT_R8_UNORM;
767 break;
768 case 2:
769 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
770 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
771 break;
772 case 4:
773 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
774 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
775 break;
776 case 8:
777 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
778 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
779 break;
780 case 16:
781 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
782 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
783 break;
784 default:
785 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
786 util_format_short_name(src->format), blocksize);
787 assert(0);
788 }
789 }
790 }
791
792 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
793 /* we don't care about these two for r600g */
794 dst->width0, dst->height0,
795 dst_width, dst_height);
796
797 if (rctx->b.chip_class >= EVERGREEN) {
798 src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ,
799 src_width0, src_height0,
800 src_force_level);
801 } else {
802 src_view = r600_create_sampler_view_custom(ctx, src, &src_templ,
803 src_widthFL, src_heightFL);
804 }
805
806 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
807 abs(src_box->depth), &dstbox);
808
809 /* Copy. */
810 r600_blitter_begin(ctx, R600_COPY_TEXTURE);
811 util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
812 src_view, src_box, src_width0, src_height0,
813 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
814 FALSE);
815 r600_blitter_end(ctx);
816
817 pipe_surface_reference(&dst_view, NULL);
818 pipe_sampler_view_reference(&src_view, NULL);
819 }
820
821 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
822 const struct pipe_blit_info *info)
823 {
824 struct r600_context *rctx = (struct r600_context*)ctx;
825 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
826 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
827 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
828 enum pipe_format format = info->src.format;
829 unsigned sample_mask =
830 rctx->b.chip_class == CAYMAN ? ~0 :
831 ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);
832 struct pipe_resource *tmp, templ;
833 struct pipe_blit_info blit;
834
835 /* Check basic requirements for hw resolve. */
836 if (!(info->src.resource->nr_samples > 1 &&
837 info->dst.resource->nr_samples <= 1 &&
838 !util_format_is_pure_integer(format) &&
839 !util_format_is_depth_or_stencil(format) &&
840 util_max_layer(info->src.resource, 0) == 0))
841 return false;
842
843 /* Check the remaining requirements for hw resolve. */
844 if (util_max_layer(info->dst.resource, info->dst.level) == 0 &&
845 util_is_format_compatible(util_format_description(info->src.format),
846 util_format_description(info->dst.format)) &&
847 !info->scissor_enable &&
848 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
849 dst_width == info->src.resource->width0 &&
850 dst_height == info->src.resource->height0 &&
851 info->dst.box.x == 0 &&
852 info->dst.box.y == 0 &&
853 info->dst.box.width == dst_width &&
854 info->dst.box.height == dst_height &&
855 info->dst.box.depth == 1 &&
856 info->src.box.x == 0 &&
857 info->src.box.y == 0 &&
858 info->src.box.width == dst_width &&
859 info->src.box.height == dst_height &&
860 info->src.box.depth == 1 &&
861 dst->surface.u.legacy.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
862 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
863 r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
864 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
865 util_blitter_custom_resolve_color(rctx->blitter,
866 info->dst.resource, info->dst.level,
867 info->dst.box.z,
868 info->src.resource, info->src.box.z,
869 sample_mask, rctx->custom_blend_resolve,
870 format);
871 r600_blitter_end(ctx);
872 return true;
873 }
874
875 /* Shader-based resolve is VERY SLOW. Instead, resolve into
876 * a temporary texture and blit.
877 */
878 memset(&templ, 0, sizeof(templ));
879 templ.target = PIPE_TEXTURE_2D;
880 templ.format = info->src.resource->format;
881 templ.width0 = info->src.resource->width0;
882 templ.height0 = info->src.resource->height0;
883 templ.depth0 = 1;
884 templ.array_size = 1;
885 templ.usage = PIPE_USAGE_DEFAULT;
886 templ.flags = R600_RESOURCE_FLAG_FORCE_TILING;
887
888 tmp = ctx->screen->resource_create(ctx->screen, &templ);
889 if (!tmp)
890 return false;
891
892 /* resolve */
893 r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
894 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
895 util_blitter_custom_resolve_color(rctx->blitter, tmp, 0, 0,
896 info->src.resource, info->src.box.z,
897 sample_mask, rctx->custom_blend_resolve,
898 format);
899 r600_blitter_end(ctx);
900
901 /* blit */
902 blit = *info;
903 blit.src.resource = tmp;
904 blit.src.box.z = 0;
905
906 r600_blitter_begin(ctx, R600_BLIT |
907 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
908 util_blitter_blit(rctx->blitter, &blit);
909 r600_blitter_end(ctx);
910
911 pipe_resource_reference(&tmp, NULL);
912 return true;
913 }
914
915 static void r600_blit(struct pipe_context *ctx,
916 const struct pipe_blit_info *info)
917 {
918 struct r600_context *rctx = (struct r600_context*)ctx;
919 struct r600_texture *rdst = (struct r600_texture *)info->dst.resource;
920
921 if (do_hardware_msaa_resolve(ctx, info)) {
922 return;
923 }
924
925 /* Using SDMA for copying to a linear texture in GTT is much faster.
926 * This improves DRI PRIME performance.
927 *
928 * resource_copy_region can't do this yet, because dma_copy calls it
929 * on failure (recursion).
930 */
931 if (rdst->surface.u.legacy.level[info->dst.level].mode ==
932 RADEON_SURF_MODE_LINEAR_ALIGNED &&
933 rctx->b.dma_copy &&
934 util_can_blit_via_copy_region(info, false)) {
935 rctx->b.dma_copy(ctx, info->dst.resource, info->dst.level,
936 info->dst.box.x, info->dst.box.y,
937 info->dst.box.z,
938 info->src.resource, info->src.level,
939 &info->src.box);
940 return;
941 }
942
943 assert(util_blitter_is_blit_supported(rctx->blitter, info));
944
945 /* The driver doesn't decompress resources automatically while
946 * u_blitter is rendering. */
947 if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level,
948 info->src.box.z,
949 info->src.box.z + info->src.box.depth - 1)) {
950 return; /* error */
951 }
952
953 if (rctx->screen->b.debug_flags & DBG_FORCE_DMA &&
954 util_try_blit_via_copy_region(ctx, info))
955 return;
956
957 r600_blitter_begin(ctx, R600_BLIT |
958 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
959 util_blitter_blit(rctx->blitter, info);
960 r600_blitter_end(ctx);
961 }
962
963 static void r600_flush_resource(struct pipe_context *ctx,
964 struct pipe_resource *res)
965 {
966 struct r600_texture *rtex = (struct r600_texture*)res;
967
968 assert(res->target != PIPE_BUFFER);
969
970 if (!rtex->is_depth && rtex->cmask.size) {
971 r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
972 0, util_max_layer(res, 0));
973 }
974 }
975
976 void r600_init_blit_functions(struct r600_context *rctx)
977 {
978 rctx->b.b.clear = r600_clear;
979 rctx->b.b.clear_render_target = r600_clear_render_target;
980 rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil;
981 rctx->b.b.resource_copy_region = r600_resource_copy_region;
982 rctx->b.b.blit = r600_blit;
983 rctx->b.b.flush_resource = r600_flush_resource;
984 rctx->b.clear_buffer = r600_clear_buffer;
985 rctx->b.blit_decompress_depth = r600_blit_decompress_depth;
986 }