r600g: move fast color clear code to a common place
[mesa.git] / src / gallium / drivers / r600 / r600_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "r600_pipe.h"
24 #include "util/u_surface.h"
25 #include "util/u_blitter.h"
26 #include "util/u_format.h"
27 #include "evergreend.h"
28
29 enum r600_blitter_op /* bitmask */
30 {
31 R600_SAVE_FRAGMENT_STATE = 1,
32 R600_SAVE_TEXTURES = 2,
33 R600_SAVE_FRAMEBUFFER = 4,
34 R600_DISABLE_RENDER_COND = 8,
35
36 R600_CLEAR = R600_SAVE_FRAGMENT_STATE,
37
38 R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER,
39
40 R600_COPY_BUFFER = R600_DISABLE_RENDER_COND,
41
42 R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
43 R600_DISABLE_RENDER_COND,
44
45 R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
46 R600_DISABLE_RENDER_COND,
47
48 R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
49
50 R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND
51 };
52
53 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
54 {
55 struct r600_context *rctx = (struct r600_context *)ctx;
56
57 r600_suspend_nontimer_queries(&rctx->b);
58
59 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb);
60 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
61 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
62 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
63 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)rctx->b.streamout.targets);
65 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
66
67 if (op & R600_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_viewport(rctx->blitter, &rctx->viewport[0].state);
69 util_blitter_save_scissor(rctx->blitter, &rctx->scissor[0].scissor);
70 util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
71 util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
72 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
73 util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state);
74 util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask);
75 }
76
77 if (op & R600_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state);
79
80 if (op & R600_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask),
83 (void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states);
84
85 util_blitter_save_fragment_sampler_views(
86 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask),
87 (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
88 }
89
90 if ((op & R600_DISABLE_RENDER_COND) && rctx->b.current_render_cond) {
91 util_blitter_save_render_condition(rctx->blitter,
92 rctx->b.current_render_cond,
93 rctx->b.current_render_cond_cond,
94 rctx->b.current_render_cond_mode);
95 }
96 }
97
98 static void r600_blitter_end(struct pipe_context *ctx)
99 {
100 struct r600_context *rctx = (struct r600_context *)ctx;
101 r600_resume_nontimer_queries(&rctx->b);
102 }
103
104 static unsigned u_max_sample(struct pipe_resource *r)
105 {
106 return r->nr_samples ? r->nr_samples - 1 : 0;
107 }
108
109 static void r600_blit_decompress_depth(struct pipe_context *ctx,
110 struct r600_texture *texture,
111 struct r600_texture *staging,
112 unsigned first_level, unsigned last_level,
113 unsigned first_layer, unsigned last_layer,
114 unsigned first_sample, unsigned last_sample)
115 {
116 struct r600_context *rctx = (struct r600_context *)ctx;
117 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
118 struct r600_texture *flushed_depth_texture = staging ?
119 staging : texture->flushed_depth_texture;
120 const struct util_format_description *desc =
121 util_format_description(texture->resource.b.b.format);
122 float depth;
123
124 if (!staging && !texture->dirty_level_mask)
125 return;
126
127 max_sample = u_max_sample(&texture->resource.b.b);
128
129 /* XXX Decompressing MSAA depth textures is broken on R6xx.
130 * There is also a hardlock if CMASK and FMASK are not present.
131 * Just skip this until we find out how to fix it. */
132 if (rctx->b.chip_class == R600 && max_sample > 0) {
133 texture->dirty_level_mask = 0;
134 return;
135 }
136
137 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 ||
138 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635)
139 depth = 0.0f;
140 else
141 depth = 1.0f;
142
143 /* Enable decompression in DB_RENDER_CONTROL */
144 rctx->db_misc_state.flush_depthstencil_through_cb = true;
145 rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
146 rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
147 rctx->db_misc_state.copy_sample = first_sample;
148 rctx->db_misc_state.atom.dirty = true;
149
150 for (level = first_level; level <= last_level; level++) {
151 if (!staging && !(texture->dirty_level_mask & (1 << level)))
152 continue;
153
154 /* The smaller the mipmap level, the less layers there are
155 * as far as 3D textures are concerned. */
156 max_layer = util_max_layer(&texture->resource.b.b, level);
157 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
158
159 for (layer = first_layer; layer <= checked_last_layer; layer++) {
160 for (sample = first_sample; sample <= last_sample; sample++) {
161 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
162
163 if (sample != rctx->db_misc_state.copy_sample) {
164 rctx->db_misc_state.copy_sample = sample;
165 rctx->db_misc_state.atom.dirty = true;
166 }
167
168 surf_tmpl.format = texture->resource.b.b.format;
169 surf_tmpl.u.tex.level = level;
170 surf_tmpl.u.tex.first_layer = layer;
171 surf_tmpl.u.tex.last_layer = layer;
172
173 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
174
175 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
176 cbsurf = ctx->create_surface(ctx,
177 &flushed_depth_texture->resource.b.b, &surf_tmpl);
178
179 r600_blitter_begin(ctx, R600_DECOMPRESS);
180 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample,
181 rctx->custom_dsa_flush, depth);
182 r600_blitter_end(ctx);
183
184 pipe_surface_reference(&zsurf, NULL);
185 pipe_surface_reference(&cbsurf, NULL);
186 }
187 }
188
189 /* The texture will always be dirty if some layers or samples aren't flushed.
190 * I don't think this case occurs often though. */
191 if (!staging &&
192 first_layer == 0 && last_layer == max_layer &&
193 first_sample == 0 && last_sample == max_sample) {
194 texture->dirty_level_mask &= ~(1 << level);
195 }
196 }
197
198 /* reenable compression in DB_RENDER_CONTROL */
199 rctx->db_misc_state.flush_depthstencil_through_cb = false;
200 rctx->db_misc_state.atom.dirty = true;
201 }
202
203 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
204 struct r600_texture *texture,
205 unsigned first_level, unsigned last_level,
206 unsigned first_layer, unsigned last_layer)
207 {
208 struct pipe_surface *zsurf, surf_tmpl = {{0}};
209 unsigned layer, max_layer, checked_last_layer, level;
210
211 /* Enable decompression in DB_RENDER_CONTROL */
212 rctx->db_misc_state.flush_depthstencil_in_place = true;
213 rctx->db_misc_state.atom.dirty = true;
214
215 surf_tmpl.format = texture->resource.b.b.format;
216
217 for (level = first_level; level <= last_level; level++) {
218 if (!(texture->dirty_level_mask & (1 << level)))
219 continue;
220
221 surf_tmpl.u.tex.level = level;
222
223 /* The smaller the mipmap level, the less layers there are
224 * as far as 3D textures are concerned. */
225 max_layer = util_max_layer(&texture->resource.b.b, level);
226 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
227
228 for (layer = first_layer; layer <= checked_last_layer; layer++) {
229 surf_tmpl.u.tex.first_layer = layer;
230 surf_tmpl.u.tex.last_layer = layer;
231
232 zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl);
233
234 r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS);
235 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0,
236 rctx->custom_dsa_flush, 1.0f);
237 r600_blitter_end(&rctx->b.b);
238
239 pipe_surface_reference(&zsurf, NULL);
240 }
241
242 /* The texture will always be dirty if some layers or samples aren't flushed.
243 * I don't think this case occurs often though. */
244 if (first_layer == 0 && last_layer == max_layer) {
245 texture->dirty_level_mask &= ~(1 << level);
246 }
247 }
248
249 /* Disable decompression in DB_RENDER_CONTROL */
250 rctx->db_misc_state.flush_depthstencil_in_place = false;
251 rctx->db_misc_state.atom.dirty = true;
252 }
253
254 void r600_decompress_depth_textures(struct r600_context *rctx,
255 struct r600_samplerview_state *textures)
256 {
257 unsigned i;
258 unsigned depth_texture_mask = textures->compressed_depthtex_mask;
259
260 while (depth_texture_mask) {
261 struct pipe_sampler_view *view;
262 struct r600_texture *tex;
263
264 i = u_bit_scan(&depth_texture_mask);
265
266 view = &textures->views[i]->base;
267 assert(view);
268
269 tex = (struct r600_texture *)view->texture;
270 assert(tex->is_depth && !tex->is_flushing_texture);
271
272 if (rctx->b.chip_class >= EVERGREEN ||
273 r600_can_read_depth(tex)) {
274 r600_blit_decompress_depth_in_place(rctx, tex,
275 view->u.tex.first_level, view->u.tex.last_level,
276 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
277 } else {
278 r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
279 view->u.tex.first_level, view->u.tex.last_level,
280 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
281 0, u_max_sample(&tex->resource.b.b));
282 }
283 }
284 }
285
286 static void r600_blit_decompress_color(struct pipe_context *ctx,
287 struct r600_texture *rtex,
288 unsigned first_level, unsigned last_level,
289 unsigned first_layer, unsigned last_layer)
290 {
291 struct r600_context *rctx = (struct r600_context *)ctx;
292 unsigned layer, level, checked_last_layer, max_layer;
293
294 if (!rtex->dirty_level_mask)
295 return;
296
297 for (level = first_level; level <= last_level; level++) {
298 if (!(rtex->dirty_level_mask & (1 << level)))
299 continue;
300
301 /* The smaller the mipmap level, the less layers there are
302 * as far as 3D textures are concerned. */
303 max_layer = util_max_layer(&rtex->resource.b.b, level);
304 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
305
306 for (layer = first_layer; layer <= checked_last_layer; layer++) {
307 struct pipe_surface *cbsurf, surf_tmpl;
308
309 surf_tmpl.format = rtex->resource.b.b.format;
310 surf_tmpl.u.tex.level = level;
311 surf_tmpl.u.tex.first_layer = layer;
312 surf_tmpl.u.tex.last_layer = layer;
313 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
314
315 r600_blitter_begin(ctx, R600_DECOMPRESS);
316 util_blitter_custom_color(rctx->blitter, cbsurf,
317 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear);
318 r600_blitter_end(ctx);
319
320 pipe_surface_reference(&cbsurf, NULL);
321 }
322
323 /* The texture will always be dirty if some layers aren't flushed.
324 * I don't think this case occurs often though. */
325 if (first_layer == 0 && last_layer == max_layer) {
326 rtex->dirty_level_mask &= ~(1 << level);
327 }
328 }
329 }
330
331 void r600_decompress_color_textures(struct r600_context *rctx,
332 struct r600_samplerview_state *textures)
333 {
334 unsigned i;
335 unsigned mask = textures->compressed_colortex_mask;
336
337 while (mask) {
338 struct pipe_sampler_view *view;
339 struct r600_texture *tex;
340
341 i = u_bit_scan(&mask);
342
343 view = &textures->views[i]->base;
344 assert(view);
345
346 tex = (struct r600_texture *)view->texture;
347 assert(tex->cmask.size);
348
349 r600_blit_decompress_color(&rctx->b.b, tex,
350 view->u.tex.first_level, view->u.tex.last_level,
351 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
352 }
353 }
354
355 /* Helper for decompressing a portion of a color or depth resource before
356 * blitting if any decompression is needed.
357 * The driver doesn't decompress resources automatically while u_blitter is
358 * rendering. */
359 static bool r600_decompress_subresource(struct pipe_context *ctx,
360 struct pipe_resource *tex,
361 unsigned level,
362 unsigned first_layer, unsigned last_layer)
363 {
364 struct r600_context *rctx = (struct r600_context *)ctx;
365 struct r600_texture *rtex = (struct r600_texture*)tex;
366
367 if (rtex->is_depth && !rtex->is_flushing_texture) {
368 if (rctx->b.chip_class >= EVERGREEN ||
369 r600_can_read_depth(rtex)) {
370 r600_blit_decompress_depth_in_place(rctx, rtex,
371 level, level,
372 first_layer, last_layer);
373 } else {
374 if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
375 return false; /* error */
376
377 r600_blit_decompress_depth(ctx, rtex, NULL,
378 level, level,
379 first_layer, last_layer,
380 0, u_max_sample(tex));
381 }
382 } else if (rtex->cmask.size) {
383 r600_blit_decompress_color(ctx, rtex, level, level,
384 first_layer, last_layer);
385 }
386 return true;
387 }
388
389 static void r600_clear(struct pipe_context *ctx, unsigned buffers,
390 const union pipe_color_union *color,
391 double depth, unsigned stencil)
392 {
393 struct r600_context *rctx = (struct r600_context *)ctx;
394 struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
395
396 if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
397 evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
398 &buffers, color);
399 }
400
401 if (buffers & PIPE_CLEAR_COLOR) {
402 int i;
403
404 /* These buffers cannot use fast clear, make sure to disable expansion. */
405 for (i = 0; i < fb->nr_cbufs; i++) {
406 struct r600_texture *tex;
407
408 /* If not clearing this buffer, skip. */
409 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
410 continue;
411
412 if (!fb->cbufs[i])
413 continue;
414
415 tex = (struct r600_texture *)fb->cbufs[i]->texture;
416 if (tex->fmask.size == 0)
417 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
418 }
419 }
420
421 /* if hyperz enabled just clear hyperz */
422 if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
423 struct r600_texture *rtex;
424 unsigned level = fb->zsbuf->u.tex.level;
425
426 rtex = (struct r600_texture*)fb->zsbuf->texture;
427
428 /* We can't use hyperz fast clear if each slice of a texture
429 * array are clear to different value. To simplify code just
430 * disable fast clear for texture array.
431 */
432 /* Only use htile for first level */
433 if (rtex->htile_buffer && !level && rtex->surface.array_size == 1) {
434 if (rtex->depth_clear_value != depth) {
435 rtex->depth_clear_value = depth;
436 rctx->db_state.atom.dirty = true;
437 }
438 rctx->db_misc_state.htile_clear = true;
439 rctx->db_misc_state.atom.dirty = true;
440 }
441 }
442
443 r600_blitter_begin(ctx, R600_CLEAR);
444 util_blitter_clear(rctx->blitter, fb->width, fb->height, 1,
445 buffers, color, depth, stencil);
446 r600_blitter_end(ctx);
447
448 /* disable fast clear */
449 if (rctx->db_misc_state.htile_clear) {
450 rctx->db_misc_state.htile_clear = false;
451 rctx->db_misc_state.atom.dirty = true;
452 }
453 }
454
455 static void r600_clear_render_target(struct pipe_context *ctx,
456 struct pipe_surface *dst,
457 const union pipe_color_union *color,
458 unsigned dstx, unsigned dsty,
459 unsigned width, unsigned height)
460 {
461 struct r600_context *rctx = (struct r600_context *)ctx;
462
463 r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
464 util_blitter_clear_render_target(rctx->blitter, dst, color,
465 dstx, dsty, width, height);
466 r600_blitter_end(ctx);
467 }
468
469 static void r600_clear_depth_stencil(struct pipe_context *ctx,
470 struct pipe_surface *dst,
471 unsigned clear_flags,
472 double depth,
473 unsigned stencil,
474 unsigned dstx, unsigned dsty,
475 unsigned width, unsigned height)
476 {
477 struct r600_context *rctx = (struct r600_context *)ctx;
478
479 r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
480 util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil,
481 dstx, dsty, width, height);
482 r600_blitter_end(ctx);
483 }
484
485 static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
486 struct pipe_resource *src, const struct pipe_box *src_box)
487 {
488 struct r600_context *rctx = (struct r600_context*)ctx;
489
490 if (rctx->screen->b.has_cp_dma) {
491 r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
492 }
493 else if (rctx->screen->b.has_streamout &&
494 /* Require 4-byte alignment. */
495 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
496
497 r600_blitter_begin(ctx, R600_COPY_BUFFER);
498 util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width);
499 r600_blitter_end(ctx);
500 } else {
501 util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
502 }
503 }
504
505 /**
506 * Global buffers are not really resources, they are are actually offsets
507 * into a single global resource (r600_screen::global_pool). The means
508 * they don't have their own cs_buf handle, so they cannot be passed
509 * to r600_copy_buffer() and must be handled separately.
510 *
511 * XXX: It should be possible to implement this function using
512 * r600_copy_buffer() by passing the memory_pool resource as both src
513 * and dst and updating dstx and src_box to point to the correct offsets.
514 * This would likely perform better than the current implementation.
515 */
516 static void r600_copy_global_buffer(struct pipe_context *ctx,
517 struct pipe_resource *dst, unsigned
518 dstx, struct pipe_resource *src,
519 const struct pipe_box *src_box)
520 {
521 struct pipe_box dst_box; struct pipe_transfer *src_pxfer,
522 *dst_pxfer;
523
524 u_box_1d(dstx, src_box->width, &dst_box);
525 void *src_ptr = ctx->transfer_map(ctx, src, 0, PIPE_TRANSFER_READ,
526 src_box, &src_pxfer);
527 void *dst_ptr = ctx->transfer_map(ctx, dst, 0, PIPE_TRANSFER_WRITE,
528 &dst_box, &dst_pxfer);
529 memcpy(dst_ptr, src_ptr, src_box->width);
530
531 ctx->transfer_unmap(ctx, src_pxfer);
532 ctx->transfer_unmap(ctx, dst_pxfer);
533 }
534
535 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
536 unsigned offset, unsigned size, unsigned value)
537 {
538 struct r600_context *rctx = (struct r600_context*)ctx;
539
540 if (rctx->screen->b.has_cp_dma &&
541 rctx->b.chip_class >= EVERGREEN &&
542 offset % 4 == 0 && size % 4 == 0) {
543 evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value);
544 } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
545 union pipe_color_union clear_value;
546 clear_value.ui[0] = value;
547
548 r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND);
549 util_blitter_clear_buffer(rctx->blitter, dst, offset, size,
550 1, &clear_value);
551 r600_blitter_end(ctx);
552 } else {
553 uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
554 PIPE_TRANSFER_WRITE);
555 size /= 4;
556 for (unsigned i = 0; i < size; i++)
557 *map++ = value;
558 }
559 }
560
561 static bool util_format_is_subsampled_2x1_32bpp(enum pipe_format format)
562 {
563 const struct util_format_description *desc = util_format_description(format);
564
565 return desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED &&
566 desc->block.width == 2 &&
567 desc->block.height == 1 &&
568 desc->block.bits == 32;
569 }
570
571 static void r600_resource_copy_region(struct pipe_context *ctx,
572 struct pipe_resource *dst,
573 unsigned dst_level,
574 unsigned dstx, unsigned dsty, unsigned dstz,
575 struct pipe_resource *src,
576 unsigned src_level,
577 const struct pipe_box *src_box)
578 {
579 struct r600_context *rctx = (struct r600_context *)ctx;
580 struct pipe_surface *dst_view, dst_templ;
581 struct pipe_sampler_view src_templ, *src_view;
582 unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
583 unsigned src_force_level = 0;
584 struct pipe_box sbox, dstbox;
585
586 /* Handle buffers first. */
587 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
588 if ((src->bind & PIPE_BIND_GLOBAL) ||
589 (dst->bind & PIPE_BIND_GLOBAL)) {
590 r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
591 } else {
592 r600_copy_buffer(ctx, dst, dstx, src, src_box);
593 }
594 return;
595 }
596
597 assert(u_max_sample(dst) == u_max_sample(src));
598
599 /* The driver doesn't decompress resources automatically while
600 * u_blitter is rendering. */
601 if (!r600_decompress_subresource(ctx, src, src_level,
602 src_box->z, src_box->z + src_box->depth - 1)) {
603 return; /* error */
604 }
605
606 dst_width = u_minify(dst->width0, dst_level);
607 dst_height = u_minify(dst->height0, dst_level);
608 src_width0 = src->width0;
609 src_height0 = src->height0;
610 src_widthFL = u_minify(src->width0, src_level);
611 src_heightFL = u_minify(src->height0, src_level);
612
613 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
614 util_blitter_default_src_texture(&src_templ, src, src_level);
615
616 if (util_format_is_compressed(src->format)) {
617 unsigned blocksize = util_format_get_blocksize(src->format);
618
619 if (blocksize == 8)
620 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
621 else
622 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
623 dst_templ.format = src_templ.format;
624
625 dst_width = util_format_get_nblocksx(dst->format, dst_width);
626 dst_height = util_format_get_nblocksy(dst->format, dst_height);
627 src_width0 = util_format_get_nblocksx(src->format, src_width0);
628 src_height0 = util_format_get_nblocksy(src->format, src_height0);
629 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
630 src_heightFL = util_format_get_nblocksy(src->format, src_heightFL);
631
632 dstx = util_format_get_nblocksx(dst->format, dstx);
633 dsty = util_format_get_nblocksy(dst->format, dsty);
634
635 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
636 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
637 sbox.z = src_box->z;
638 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
639 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
640 sbox.depth = src_box->depth;
641 src_box = &sbox;
642
643 src_force_level = src_level;
644 } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
645 if (util_format_is_subsampled_2x1_32bpp(src->format)) {
646
647 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
648 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
649
650 dst_width = util_format_get_nblocksx(dst->format, dst_width);
651 src_width0 = util_format_get_nblocksx(src->format, src_width0);
652 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
653
654 dstx = util_format_get_nblocksx(dst->format, dstx);
655
656 sbox = *src_box;
657 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
658 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
659 src_box = &sbox;
660 } else {
661 unsigned blocksize = util_format_get_blocksize(src->format);
662
663 switch (blocksize) {
664 case 1:
665 dst_templ.format = PIPE_FORMAT_R8_UNORM;
666 src_templ.format = PIPE_FORMAT_R8_UNORM;
667 break;
668 case 2:
669 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
670 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
671 break;
672 case 4:
673 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
674 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
675 break;
676 case 8:
677 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
678 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
679 break;
680 case 16:
681 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
682 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
683 break;
684 default:
685 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
686 util_format_short_name(src->format), blocksize);
687 assert(0);
688 }
689 }
690 }
691
692 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ, dst_width, dst_height);
693
694 if (rctx->b.chip_class >= EVERGREEN) {
695 src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ,
696 src_width0, src_height0,
697 src_force_level);
698 } else {
699 src_view = r600_create_sampler_view_custom(ctx, src, &src_templ,
700 src_widthFL, src_heightFL);
701 }
702
703 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
704 abs(src_box->depth), &dstbox);
705
706 /* Copy. */
707 r600_blitter_begin(ctx, R600_COPY_TEXTURE);
708 util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
709 src_view, src_box, src_width0, src_height0,
710 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL);
711 r600_blitter_end(ctx);
712
713 pipe_surface_reference(&dst_view, NULL);
714 pipe_sampler_view_reference(&src_view, NULL);
715 }
716
717 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
718 static enum pipe_format int_to_norm_format(enum pipe_format format)
719 {
720 switch (format) {
721 #define REPLACE_FORMAT_SIGN(format,sign) \
722 case PIPE_FORMAT_##format##_##sign##INT: \
723 return PIPE_FORMAT_##format##_##sign##NORM
724 #define REPLACE_FORMAT(format) \
725 REPLACE_FORMAT_SIGN(format, U); \
726 REPLACE_FORMAT_SIGN(format, S)
727
728 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
729 REPLACE_FORMAT(R8);
730 REPLACE_FORMAT(R8G8);
731 REPLACE_FORMAT(R8G8B8X8);
732 REPLACE_FORMAT(R8G8B8A8);
733 REPLACE_FORMAT(A8);
734 REPLACE_FORMAT(I8);
735 REPLACE_FORMAT(L8);
736 REPLACE_FORMAT(L8A8);
737 REPLACE_FORMAT(R16);
738 REPLACE_FORMAT(R16G16);
739 REPLACE_FORMAT(R16G16B16X16);
740 REPLACE_FORMAT(R16G16B16A16);
741 REPLACE_FORMAT(A16);
742 REPLACE_FORMAT(I16);
743 REPLACE_FORMAT(L16);
744 REPLACE_FORMAT(L16A16);
745
746 #undef REPLACE_FORMAT
747 #undef REPLACE_FORMAT_SIGN
748 default:
749 return format;
750 }
751 }
752
753 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
754 const struct pipe_blit_info *info)
755 {
756 struct r600_context *rctx = (struct r600_context*)ctx;
757 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
758 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
759 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
760 enum pipe_format format = int_to_norm_format(info->dst.format);
761 unsigned sample_mask =
762 rctx->b.chip_class == CAYMAN ? ~0 :
763 ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);
764
765 if (info->src.resource->nr_samples > 1 &&
766 info->dst.resource->nr_samples <= 1 &&
767 util_max_layer(info->src.resource, 0) == 0 &&
768 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
769 info->dst.format == info->src.format &&
770 !util_format_is_pure_integer(format) &&
771 !util_format_is_depth_or_stencil(format) &&
772 !info->scissor_enable &&
773 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
774 dst_width == info->src.resource->width0 &&
775 dst_height == info->src.resource->height0 &&
776 info->dst.box.x == 0 &&
777 info->dst.box.y == 0 &&
778 info->dst.box.width == dst_width &&
779 info->dst.box.height == dst_height &&
780 info->dst.box.depth == 1 &&
781 info->src.box.x == 0 &&
782 info->src.box.y == 0 &&
783 info->src.box.width == dst_width &&
784 info->src.box.height == dst_height &&
785 info->src.box.depth == 1 &&
786 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D) {
787 r600_blitter_begin(ctx, R600_COLOR_RESOLVE);
788 util_blitter_custom_resolve_color(rctx->blitter,
789 info->dst.resource, info->dst.level,
790 info->dst.box.z,
791 info->src.resource, info->src.box.z,
792 sample_mask, rctx->custom_blend_resolve,
793 format);
794 r600_blitter_end(ctx);
795 return true;
796 }
797 return false;
798 }
799
800 static void r600_blit(struct pipe_context *ctx,
801 const struct pipe_blit_info *info)
802 {
803 struct r600_context *rctx = (struct r600_context*)ctx;
804
805 if (do_hardware_msaa_resolve(ctx, info)) {
806 return;
807 }
808
809 assert(util_blitter_is_blit_supported(rctx->blitter, info));
810
811 /* The driver doesn't decompress resources automatically while
812 * u_blitter is rendering. */
813 if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level,
814 info->src.box.z,
815 info->src.box.z + info->src.box.depth - 1)) {
816 return; /* error */
817 }
818
819 r600_blitter_begin(ctx, R600_BLIT);
820 util_blitter_blit(rctx->blitter, info);
821 r600_blitter_end(ctx);
822 }
823
824 static void r600_flush_resource(struct pipe_context *ctx,
825 struct pipe_resource *res)
826 {
827 struct r600_texture *rtex = (struct r600_texture*)res;
828
829 assert(res->target != PIPE_BUFFER);
830
831 if (!rtex->is_depth && rtex->cmask.size) {
832 r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
833 0, res->array_size - 1);
834 }
835 }
836
837 void r600_init_blit_functions(struct r600_context *rctx)
838 {
839 rctx->b.b.clear = r600_clear;
840 rctx->b.b.clear_render_target = r600_clear_render_target;
841 rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil;
842 rctx->b.b.resource_copy_region = r600_resource_copy_region;
843 rctx->b.b.blit = r600_blit;
844 rctx->b.b.flush_resource = r600_flush_resource;
845 rctx->b.clear_buffer = r600_clear_buffer;
846 rctx->b.blit_decompress_depth = r600_blit_decompress_depth;
847 }