2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 #include "r600_pipe.h"
24 #include "compute_memory_pool.h"
25 #include "evergreen_compute.h"
26 #include "util/u_surface.h"
27 #include "util/u_format.h"
28 #include "evergreend.h"
30 enum r600_blitter_op
/* bitmask */
32 R600_SAVE_FRAGMENT_STATE
= 1,
33 R600_SAVE_TEXTURES
= 2,
34 R600_SAVE_FRAMEBUFFER
= 4,
35 R600_DISABLE_RENDER_COND
= 8,
37 R600_CLEAR
= R600_SAVE_FRAGMENT_STATE
,
39 R600_CLEAR_SURFACE
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
,
41 R600_COPY_BUFFER
= R600_DISABLE_RENDER_COND
,
43 R600_COPY_TEXTURE
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
| R600_SAVE_TEXTURES
|
44 R600_DISABLE_RENDER_COND
,
46 R600_BLIT
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
| R600_SAVE_TEXTURES
,
48 R600_DECOMPRESS
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
| R600_DISABLE_RENDER_COND
,
50 R600_COLOR_RESOLVE
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
53 static void r600_blitter_begin(struct pipe_context
*ctx
, enum r600_blitter_op op
)
55 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
57 r600_suspend_nontimer_queries(&rctx
->b
);
59 util_blitter_save_vertex_buffer_slot(rctx
->blitter
, rctx
->vertex_buffer_state
.vb
);
60 util_blitter_save_vertex_elements(rctx
->blitter
, rctx
->vertex_fetch_shader
.cso
);
61 util_blitter_save_vertex_shader(rctx
->blitter
, rctx
->vs_shader
);
62 util_blitter_save_geometry_shader(rctx
->blitter
, rctx
->gs_shader
);
63 util_blitter_save_so_targets(rctx
->blitter
, rctx
->b
.streamout
.num_targets
,
64 (struct pipe_stream_output_target
**)rctx
->b
.streamout
.targets
);
65 util_blitter_save_rasterizer(rctx
->blitter
, rctx
->rasterizer_state
.cso
);
67 if (op
& R600_SAVE_FRAGMENT_STATE
) {
68 util_blitter_save_viewport(rctx
->blitter
, &rctx
->viewport
[0].state
);
69 util_blitter_save_scissor(rctx
->blitter
, &rctx
->scissor
[0].scissor
);
70 util_blitter_save_fragment_shader(rctx
->blitter
, rctx
->ps_shader
);
71 util_blitter_save_blend(rctx
->blitter
, rctx
->blend_state
.cso
);
72 util_blitter_save_depth_stencil_alpha(rctx
->blitter
, rctx
->dsa_state
.cso
);
73 util_blitter_save_stencil_ref(rctx
->blitter
, &rctx
->stencil_ref
.pipe_state
);
74 util_blitter_save_sample_mask(rctx
->blitter
, rctx
->sample_mask
.sample_mask
);
77 if (op
& R600_SAVE_FRAMEBUFFER
)
78 util_blitter_save_framebuffer(rctx
->blitter
, &rctx
->framebuffer
.state
);
80 if (op
& R600_SAVE_TEXTURES
) {
81 util_blitter_save_fragment_sampler_states(
82 rctx
->blitter
, util_last_bit(rctx
->samplers
[PIPE_SHADER_FRAGMENT
].states
.enabled_mask
),
83 (void**)rctx
->samplers
[PIPE_SHADER_FRAGMENT
].states
.states
);
85 util_blitter_save_fragment_sampler_views(
86 rctx
->blitter
, util_last_bit(rctx
->samplers
[PIPE_SHADER_FRAGMENT
].views
.enabled_mask
),
87 (struct pipe_sampler_view
**)rctx
->samplers
[PIPE_SHADER_FRAGMENT
].views
.views
);
90 if ((op
& R600_DISABLE_RENDER_COND
) && rctx
->b
.current_render_cond
) {
91 util_blitter_save_render_condition(rctx
->blitter
,
92 rctx
->b
.current_render_cond
,
93 rctx
->b
.current_render_cond_cond
,
94 rctx
->b
.current_render_cond_mode
);
98 static void r600_blitter_end(struct pipe_context
*ctx
)
100 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
101 r600_resume_nontimer_queries(&rctx
->b
);
104 static unsigned u_max_sample(struct pipe_resource
*r
)
106 return r
->nr_samples
? r
->nr_samples
- 1 : 0;
109 static void r600_blit_decompress_depth(struct pipe_context
*ctx
,
110 struct r600_texture
*texture
,
111 struct r600_texture
*staging
,
112 unsigned first_level
, unsigned last_level
,
113 unsigned first_layer
, unsigned last_layer
,
114 unsigned first_sample
, unsigned last_sample
)
116 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
117 unsigned layer
, level
, sample
, checked_last_layer
, max_layer
, max_sample
;
118 struct r600_texture
*flushed_depth_texture
= staging
?
119 staging
: texture
->flushed_depth_texture
;
120 const struct util_format_description
*desc
=
121 util_format_description(texture
->resource
.b
.b
.format
);
124 if (!staging
&& !texture
->dirty_level_mask
)
127 max_sample
= u_max_sample(&texture
->resource
.b
.b
);
129 /* XXX Decompressing MSAA depth textures is broken on R6xx.
130 * There is also a hardlock if CMASK and FMASK are not present.
131 * Just skip this until we find out how to fix it. */
132 if (rctx
->b
.chip_class
== R600
&& max_sample
> 0) {
133 texture
->dirty_level_mask
= 0;
137 if (rctx
->b
.family
== CHIP_RV610
|| rctx
->b
.family
== CHIP_RV630
||
138 rctx
->b
.family
== CHIP_RV620
|| rctx
->b
.family
== CHIP_RV635
)
143 /* Enable decompression in DB_RENDER_CONTROL */
144 rctx
->db_misc_state
.flush_depthstencil_through_cb
= true;
145 rctx
->db_misc_state
.copy_depth
= util_format_has_depth(desc
);
146 rctx
->db_misc_state
.copy_stencil
= util_format_has_stencil(desc
);
147 rctx
->db_misc_state
.copy_sample
= first_sample
;
148 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
150 for (level
= first_level
; level
<= last_level
; level
++) {
151 if (!staging
&& !(texture
->dirty_level_mask
& (1 << level
)))
154 /* The smaller the mipmap level, the less layers there are
155 * as far as 3D textures are concerned. */
156 max_layer
= util_max_layer(&texture
->resource
.b
.b
, level
);
157 checked_last_layer
= last_layer
< max_layer
? last_layer
: max_layer
;
159 for (layer
= first_layer
; layer
<= checked_last_layer
; layer
++) {
160 for (sample
= first_sample
; sample
<= last_sample
; sample
++) {
161 struct pipe_surface
*zsurf
, *cbsurf
, surf_tmpl
;
163 if (sample
!= rctx
->db_misc_state
.copy_sample
) {
164 rctx
->db_misc_state
.copy_sample
= sample
;
165 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
168 surf_tmpl
.format
= texture
->resource
.b
.b
.format
;
169 surf_tmpl
.u
.tex
.level
= level
;
170 surf_tmpl
.u
.tex
.first_layer
= layer
;
171 surf_tmpl
.u
.tex
.last_layer
= layer
;
173 zsurf
= ctx
->create_surface(ctx
, &texture
->resource
.b
.b
, &surf_tmpl
);
175 surf_tmpl
.format
= flushed_depth_texture
->resource
.b
.b
.format
;
176 cbsurf
= ctx
->create_surface(ctx
,
177 &flushed_depth_texture
->resource
.b
.b
, &surf_tmpl
);
179 r600_blitter_begin(ctx
, R600_DECOMPRESS
);
180 util_blitter_custom_depth_stencil(rctx
->blitter
, zsurf
, cbsurf
, 1 << sample
,
181 rctx
->custom_dsa_flush
, depth
);
182 r600_blitter_end(ctx
);
184 pipe_surface_reference(&zsurf
, NULL
);
185 pipe_surface_reference(&cbsurf
, NULL
);
189 /* The texture will always be dirty if some layers or samples aren't flushed.
190 * I don't think this case occurs often though. */
192 first_layer
== 0 && last_layer
== max_layer
&&
193 first_sample
== 0 && last_sample
== max_sample
) {
194 texture
->dirty_level_mask
&= ~(1 << level
);
198 /* reenable compression in DB_RENDER_CONTROL */
199 rctx
->db_misc_state
.flush_depthstencil_through_cb
= false;
200 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
203 static void r600_blit_decompress_depth_in_place(struct r600_context
*rctx
,
204 struct r600_texture
*texture
,
205 unsigned first_level
, unsigned last_level
,
206 unsigned first_layer
, unsigned last_layer
)
208 struct pipe_surface
*zsurf
, surf_tmpl
= {{0}};
209 unsigned layer
, max_layer
, checked_last_layer
, level
;
211 /* Enable decompression in DB_RENDER_CONTROL */
212 rctx
->db_misc_state
.flush_depthstencil_in_place
= true;
213 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
215 surf_tmpl
.format
= texture
->resource
.b
.b
.format
;
217 for (level
= first_level
; level
<= last_level
; level
++) {
218 if (!(texture
->dirty_level_mask
& (1 << level
)))
221 surf_tmpl
.u
.tex
.level
= level
;
223 /* The smaller the mipmap level, the less layers there are
224 * as far as 3D textures are concerned. */
225 max_layer
= util_max_layer(&texture
->resource
.b
.b
, level
);
226 checked_last_layer
= last_layer
< max_layer
? last_layer
: max_layer
;
228 for (layer
= first_layer
; layer
<= checked_last_layer
; layer
++) {
229 surf_tmpl
.u
.tex
.first_layer
= layer
;
230 surf_tmpl
.u
.tex
.last_layer
= layer
;
232 zsurf
= rctx
->b
.b
.create_surface(&rctx
->b
.b
, &texture
->resource
.b
.b
, &surf_tmpl
);
234 r600_blitter_begin(&rctx
->b
.b
, R600_DECOMPRESS
);
235 util_blitter_custom_depth_stencil(rctx
->blitter
, zsurf
, NULL
, ~0,
236 rctx
->custom_dsa_flush
, 1.0f
);
237 r600_blitter_end(&rctx
->b
.b
);
239 pipe_surface_reference(&zsurf
, NULL
);
242 /* The texture will always be dirty if some layers or samples aren't flushed.
243 * I don't think this case occurs often though. */
244 if (first_layer
== 0 && last_layer
== max_layer
) {
245 texture
->dirty_level_mask
&= ~(1 << level
);
249 /* Disable decompression in DB_RENDER_CONTROL */
250 rctx
->db_misc_state
.flush_depthstencil_in_place
= false;
251 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
254 void r600_decompress_depth_textures(struct r600_context
*rctx
,
255 struct r600_samplerview_state
*textures
)
258 unsigned depth_texture_mask
= textures
->compressed_depthtex_mask
;
260 while (depth_texture_mask
) {
261 struct pipe_sampler_view
*view
;
262 struct r600_texture
*tex
;
264 i
= u_bit_scan(&depth_texture_mask
);
266 view
= &textures
->views
[i
]->base
;
269 tex
= (struct r600_texture
*)view
->texture
;
270 assert(tex
->is_depth
&& !tex
->is_flushing_texture
);
272 if (rctx
->b
.chip_class
>= EVERGREEN
||
273 r600_can_read_depth(tex
)) {
274 r600_blit_decompress_depth_in_place(rctx
, tex
,
275 view
->u
.tex
.first_level
, view
->u
.tex
.last_level
,
276 0, util_max_layer(&tex
->resource
.b
.b
, view
->u
.tex
.first_level
));
278 r600_blit_decompress_depth(&rctx
->b
.b
, tex
, NULL
,
279 view
->u
.tex
.first_level
, view
->u
.tex
.last_level
,
280 0, util_max_layer(&tex
->resource
.b
.b
, view
->u
.tex
.first_level
),
281 0, u_max_sample(&tex
->resource
.b
.b
));
286 static void r600_blit_decompress_color(struct pipe_context
*ctx
,
287 struct r600_texture
*rtex
,
288 unsigned first_level
, unsigned last_level
,
289 unsigned first_layer
, unsigned last_layer
)
291 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
292 unsigned layer
, level
, checked_last_layer
, max_layer
;
294 if (!rtex
->dirty_level_mask
)
297 for (level
= first_level
; level
<= last_level
; level
++) {
298 if (!(rtex
->dirty_level_mask
& (1 << level
)))
301 /* The smaller the mipmap level, the less layers there are
302 * as far as 3D textures are concerned. */
303 max_layer
= util_max_layer(&rtex
->resource
.b
.b
, level
);
304 checked_last_layer
= last_layer
< max_layer
? last_layer
: max_layer
;
306 for (layer
= first_layer
; layer
<= checked_last_layer
; layer
++) {
307 struct pipe_surface
*cbsurf
, surf_tmpl
;
309 surf_tmpl
.format
= rtex
->resource
.b
.b
.format
;
310 surf_tmpl
.u
.tex
.level
= level
;
311 surf_tmpl
.u
.tex
.first_layer
= layer
;
312 surf_tmpl
.u
.tex
.last_layer
= layer
;
313 cbsurf
= ctx
->create_surface(ctx
, &rtex
->resource
.b
.b
, &surf_tmpl
);
315 r600_blitter_begin(ctx
, R600_DECOMPRESS
);
316 util_blitter_custom_color(rctx
->blitter
, cbsurf
,
317 rtex
->fmask
.size
? rctx
->custom_blend_decompress
: rctx
->custom_blend_fastclear
);
318 r600_blitter_end(ctx
);
320 pipe_surface_reference(&cbsurf
, NULL
);
323 /* The texture will always be dirty if some layers aren't flushed.
324 * I don't think this case occurs often though. */
325 if (first_layer
== 0 && last_layer
== max_layer
) {
326 rtex
->dirty_level_mask
&= ~(1 << level
);
331 void r600_decompress_color_textures(struct r600_context
*rctx
,
332 struct r600_samplerview_state
*textures
)
335 unsigned mask
= textures
->compressed_colortex_mask
;
338 struct pipe_sampler_view
*view
;
339 struct r600_texture
*tex
;
341 i
= u_bit_scan(&mask
);
343 view
= &textures
->views
[i
]->base
;
346 tex
= (struct r600_texture
*)view
->texture
;
347 assert(tex
->cmask
.size
);
349 r600_blit_decompress_color(&rctx
->b
.b
, tex
,
350 view
->u
.tex
.first_level
, view
->u
.tex
.last_level
,
351 0, util_max_layer(&tex
->resource
.b
.b
, view
->u
.tex
.first_level
));
355 /* Helper for decompressing a portion of a color or depth resource before
356 * blitting if any decompression is needed.
357 * The driver doesn't decompress resources automatically while u_blitter is
359 static bool r600_decompress_subresource(struct pipe_context
*ctx
,
360 struct pipe_resource
*tex
,
362 unsigned first_layer
, unsigned last_layer
)
364 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
365 struct r600_texture
*rtex
= (struct r600_texture
*)tex
;
367 if (rtex
->is_depth
&& !rtex
->is_flushing_texture
) {
368 if (rctx
->b
.chip_class
>= EVERGREEN
||
369 r600_can_read_depth(rtex
)) {
370 r600_blit_decompress_depth_in_place(rctx
, rtex
,
372 first_layer
, last_layer
);
374 if (!r600_init_flushed_depth_texture(ctx
, tex
, NULL
))
375 return false; /* error */
377 r600_blit_decompress_depth(ctx
, rtex
, NULL
,
379 first_layer
, last_layer
,
380 0, u_max_sample(tex
));
382 } else if (rtex
->cmask
.size
) {
383 r600_blit_decompress_color(ctx
, rtex
, level
, level
,
384 first_layer
, last_layer
);
389 static void r600_clear(struct pipe_context
*ctx
, unsigned buffers
,
390 const union pipe_color_union
*color
,
391 double depth
, unsigned stencil
)
393 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
394 struct pipe_framebuffer_state
*fb
= &rctx
->framebuffer
.state
;
396 if (buffers
& PIPE_CLEAR_COLOR
&& rctx
->b
.chip_class
>= EVERGREEN
) {
397 evergreen_do_fast_color_clear(&rctx
->b
, fb
, &rctx
->framebuffer
.atom
,
400 return; /* all buffers have been fast cleared */
403 if (buffers
& PIPE_CLEAR_COLOR
) {
406 /* These buffers cannot use fast clear, make sure to disable expansion. */
407 for (i
= 0; i
< fb
->nr_cbufs
; i
++) {
408 struct r600_texture
*tex
;
410 /* If not clearing this buffer, skip. */
411 if (!(buffers
& (PIPE_CLEAR_COLOR0
<< i
)))
417 tex
= (struct r600_texture
*)fb
->cbufs
[i
]->texture
;
418 if (tex
->fmask
.size
== 0)
419 tex
->dirty_level_mask
&= ~(1 << fb
->cbufs
[i
]->u
.tex
.level
);
423 /* if hyperz enabled just clear hyperz */
424 if (fb
->zsbuf
&& (buffers
& PIPE_CLEAR_DEPTH
)) {
425 struct r600_texture
*rtex
;
426 unsigned level
= fb
->zsbuf
->u
.tex
.level
;
428 rtex
= (struct r600_texture
*)fb
->zsbuf
->texture
;
430 /* We can't use hyperz fast clear if each slice of a texture
431 * array are clear to different value. To simplify code just
432 * disable fast clear for texture array.
434 /* Only use htile for first level */
435 if (rtex
->htile_buffer
&& !level
&&
436 fb
->zsbuf
->u
.tex
.first_layer
== 0 &&
437 fb
->zsbuf
->u
.tex
.last_layer
== util_max_layer(&rtex
->resource
.b
.b
, level
)) {
438 if (rtex
->depth_clear_value
!= depth
) {
439 rtex
->depth_clear_value
= depth
;
440 r600_mark_atom_dirty(rctx
, &rctx
->db_state
.atom
);
442 rctx
->db_misc_state
.htile_clear
= true;
443 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
447 r600_blitter_begin(ctx
, R600_CLEAR
);
448 util_blitter_clear(rctx
->blitter
, fb
->width
, fb
->height
,
449 util_framebuffer_get_num_layers(fb
),
450 buffers
, color
, depth
, stencil
);
451 r600_blitter_end(ctx
);
453 /* disable fast clear */
454 if (rctx
->db_misc_state
.htile_clear
) {
455 rctx
->db_misc_state
.htile_clear
= false;
456 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
460 static void r600_clear_render_target(struct pipe_context
*ctx
,
461 struct pipe_surface
*dst
,
462 const union pipe_color_union
*color
,
463 unsigned dstx
, unsigned dsty
,
464 unsigned width
, unsigned height
)
466 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
468 r600_blitter_begin(ctx
, R600_CLEAR_SURFACE
);
469 util_blitter_clear_render_target(rctx
->blitter
, dst
, color
,
470 dstx
, dsty
, width
, height
);
471 r600_blitter_end(ctx
);
474 static void r600_clear_depth_stencil(struct pipe_context
*ctx
,
475 struct pipe_surface
*dst
,
476 unsigned clear_flags
,
479 unsigned dstx
, unsigned dsty
,
480 unsigned width
, unsigned height
)
482 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
484 r600_blitter_begin(ctx
, R600_CLEAR_SURFACE
);
485 util_blitter_clear_depth_stencil(rctx
->blitter
, dst
, clear_flags
, depth
, stencil
,
486 dstx
, dsty
, width
, height
);
487 r600_blitter_end(ctx
);
490 static void r600_copy_buffer(struct pipe_context
*ctx
, struct pipe_resource
*dst
, unsigned dstx
,
491 struct pipe_resource
*src
, const struct pipe_box
*src_box
)
493 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
495 if (rctx
->screen
->b
.has_cp_dma
) {
496 r600_cp_dma_copy_buffer(rctx
, dst
, dstx
, src
, src_box
->x
, src_box
->width
);
498 else if (rctx
->screen
->b
.has_streamout
&&
499 /* Require 4-byte alignment. */
500 dstx
% 4 == 0 && src_box
->x
% 4 == 0 && src_box
->width
% 4 == 0) {
502 r600_blitter_begin(ctx
, R600_COPY_BUFFER
);
503 util_blitter_copy_buffer(rctx
->blitter
, dst
, dstx
, src
, src_box
->x
, src_box
->width
);
504 r600_blitter_end(ctx
);
506 util_resource_copy_region(ctx
, dst
, 0, dstx
, 0, 0, src
, 0, src_box
);
509 /* The index buffer (VGT) doesn't seem to see the result of the copying.
510 * Can we somehow flush the index buffer cache? Starting a new IB seems
511 * to do the trick. */
512 if (rctx
->b
.chip_class
<= R700
)
513 rctx
->b
.rings
.gfx
.flush(ctx
, RADEON_FLUSH_ASYNC
, NULL
);
517 * Global buffers are not really resources, they are are actually offsets
518 * into a single global resource (r600_screen::global_pool). The means
519 * they don't have their own cs_buf handle, so they cannot be passed
520 * to r600_copy_buffer() and must be handled separately.
522 static void r600_copy_global_buffer(struct pipe_context
*ctx
,
523 struct pipe_resource
*dst
, unsigned
524 dstx
, struct pipe_resource
*src
,
525 const struct pipe_box
*src_box
)
527 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
528 struct compute_memory_pool
*pool
= rctx
->screen
->global_pool
;
529 struct pipe_box new_src_box
= *src_box
;
531 if (src
->bind
& PIPE_BIND_GLOBAL
) {
532 struct r600_resource_global
*rsrc
=
533 (struct r600_resource_global
*)src
;
534 struct compute_memory_item
*item
= rsrc
->chunk
;
536 if (is_item_in_pool(item
)) {
537 new_src_box
.x
+= 4 * item
->start_in_dw
;
538 src
= (struct pipe_resource
*)pool
->bo
;
540 if (item
->real_buffer
== NULL
) {
541 item
->real_buffer
= (struct r600_resource
*)
542 r600_compute_buffer_alloc_vram(pool
->screen
,
543 item
->size_in_dw
* 4);
545 src
= (struct pipe_resource
*)item
->real_buffer
;
548 if (dst
->bind
& PIPE_BIND_GLOBAL
) {
549 struct r600_resource_global
*rdst
=
550 (struct r600_resource_global
*)dst
;
551 struct compute_memory_item
*item
= rdst
->chunk
;
553 if (is_item_in_pool(item
)) {
554 dstx
+= 4 * item
->start_in_dw
;
555 dst
= (struct pipe_resource
*)pool
->bo
;
557 if (item
->real_buffer
== NULL
) {
558 item
->real_buffer
= (struct r600_resource
*)
559 r600_compute_buffer_alloc_vram(pool
->screen
,
560 item
->size_in_dw
* 4);
562 dst
= (struct pipe_resource
*)item
->real_buffer
;
566 r600_copy_buffer(ctx
, dst
, dstx
, src
, &new_src_box
);
569 static void r600_clear_buffer(struct pipe_context
*ctx
, struct pipe_resource
*dst
,
570 unsigned offset
, unsigned size
, unsigned value
,
573 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
575 if (rctx
->screen
->b
.has_cp_dma
&&
576 rctx
->b
.chip_class
>= EVERGREEN
&&
577 offset
% 4 == 0 && size
% 4 == 0) {
578 evergreen_cp_dma_clear_buffer(rctx
, dst
, offset
, size
, value
);
579 } else if (rctx
->screen
->b
.has_streamout
&& offset
% 4 == 0 && size
% 4 == 0) {
580 union pipe_color_union clear_value
;
581 clear_value
.ui
[0] = value
;
583 r600_blitter_begin(ctx
, R600_DISABLE_RENDER_COND
);
584 util_blitter_clear_buffer(rctx
->blitter
, dst
, offset
, size
,
586 r600_blitter_end(ctx
);
588 uint32_t *map
= r600_buffer_map_sync_with_rings(&rctx
->b
, r600_resource(dst
),
589 PIPE_TRANSFER_WRITE
);
591 for (unsigned i
= 0; i
< size
; i
++)
596 void r600_resource_copy_region(struct pipe_context
*ctx
,
597 struct pipe_resource
*dst
,
599 unsigned dstx
, unsigned dsty
, unsigned dstz
,
600 struct pipe_resource
*src
,
602 const struct pipe_box
*src_box
)
604 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
605 struct pipe_surface
*dst_view
, dst_templ
;
606 struct pipe_sampler_view src_templ
, *src_view
;
607 unsigned dst_width
, dst_height
, src_width0
, src_height0
, src_widthFL
, src_heightFL
;
608 unsigned src_force_level
= 0;
609 struct pipe_box sbox
, dstbox
;
611 /* Handle buffers first. */
612 if (dst
->target
== PIPE_BUFFER
&& src
->target
== PIPE_BUFFER
) {
613 if ((src
->bind
& PIPE_BIND_GLOBAL
) ||
614 (dst
->bind
& PIPE_BIND_GLOBAL
)) {
615 r600_copy_global_buffer(ctx
, dst
, dstx
, src
, src_box
);
617 r600_copy_buffer(ctx
, dst
, dstx
, src
, src_box
);
622 assert(u_max_sample(dst
) == u_max_sample(src
));
624 /* The driver doesn't decompress resources automatically while
625 * u_blitter is rendering. */
626 if (!r600_decompress_subresource(ctx
, src
, src_level
,
627 src_box
->z
, src_box
->z
+ src_box
->depth
- 1)) {
631 dst_width
= u_minify(dst
->width0
, dst_level
);
632 dst_height
= u_minify(dst
->height0
, dst_level
);
633 src_width0
= src
->width0
;
634 src_height0
= src
->height0
;
635 src_widthFL
= u_minify(src
->width0
, src_level
);
636 src_heightFL
= u_minify(src
->height0
, src_level
);
638 util_blitter_default_dst_texture(&dst_templ
, dst
, dst_level
, dstz
);
639 util_blitter_default_src_texture(&src_templ
, src
, src_level
);
641 if (util_format_is_compressed(src
->format
)) {
642 unsigned blocksize
= util_format_get_blocksize(src
->format
);
645 src_templ
.format
= PIPE_FORMAT_R16G16B16A16_UINT
; /* 64-bit block */
647 src_templ
.format
= PIPE_FORMAT_R32G32B32A32_UINT
; /* 128-bit block */
648 dst_templ
.format
= src_templ
.format
;
650 dst_width
= util_format_get_nblocksx(dst
->format
, dst_width
);
651 dst_height
= util_format_get_nblocksy(dst
->format
, dst_height
);
652 src_width0
= util_format_get_nblocksx(src
->format
, src_width0
);
653 src_height0
= util_format_get_nblocksy(src
->format
, src_height0
);
654 src_widthFL
= util_format_get_nblocksx(src
->format
, src_widthFL
);
655 src_heightFL
= util_format_get_nblocksy(src
->format
, src_heightFL
);
657 dstx
= util_format_get_nblocksx(dst
->format
, dstx
);
658 dsty
= util_format_get_nblocksy(dst
->format
, dsty
);
660 sbox
.x
= util_format_get_nblocksx(src
->format
, src_box
->x
);
661 sbox
.y
= util_format_get_nblocksy(src
->format
, src_box
->y
);
663 sbox
.width
= util_format_get_nblocksx(src
->format
, src_box
->width
);
664 sbox
.height
= util_format_get_nblocksy(src
->format
, src_box
->height
);
665 sbox
.depth
= src_box
->depth
;
668 src_force_level
= src_level
;
669 } else if (!util_blitter_is_copy_supported(rctx
->blitter
, dst
, src
)) {
670 if (util_format_is_subsampled_422(src
->format
)) {
672 src_templ
.format
= PIPE_FORMAT_R8G8B8A8_UINT
;
673 dst_templ
.format
= PIPE_FORMAT_R8G8B8A8_UINT
;
675 dst_width
= util_format_get_nblocksx(dst
->format
, dst_width
);
676 src_width0
= util_format_get_nblocksx(src
->format
, src_width0
);
677 src_widthFL
= util_format_get_nblocksx(src
->format
, src_widthFL
);
679 dstx
= util_format_get_nblocksx(dst
->format
, dstx
);
682 sbox
.x
= util_format_get_nblocksx(src
->format
, src_box
->x
);
683 sbox
.width
= util_format_get_nblocksx(src
->format
, src_box
->width
);
686 unsigned blocksize
= util_format_get_blocksize(src
->format
);
690 dst_templ
.format
= PIPE_FORMAT_R8_UNORM
;
691 src_templ
.format
= PIPE_FORMAT_R8_UNORM
;
694 dst_templ
.format
= PIPE_FORMAT_R8G8_UNORM
;
695 src_templ
.format
= PIPE_FORMAT_R8G8_UNORM
;
698 dst_templ
.format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
699 src_templ
.format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
702 dst_templ
.format
= PIPE_FORMAT_R16G16B16A16_UINT
;
703 src_templ
.format
= PIPE_FORMAT_R16G16B16A16_UINT
;
706 dst_templ
.format
= PIPE_FORMAT_R32G32B32A32_UINT
;
707 src_templ
.format
= PIPE_FORMAT_R32G32B32A32_UINT
;
710 fprintf(stderr
, "Unhandled format %s with blocksize %u\n",
711 util_format_short_name(src
->format
), blocksize
);
717 dst_view
= r600_create_surface_custom(ctx
, dst
, &dst_templ
, dst_width
, dst_height
);
719 if (rctx
->b
.chip_class
>= EVERGREEN
) {
720 src_view
= evergreen_create_sampler_view_custom(ctx
, src
, &src_templ
,
721 src_width0
, src_height0
,
724 src_view
= r600_create_sampler_view_custom(ctx
, src
, &src_templ
,
725 src_widthFL
, src_heightFL
);
728 u_box_3d(dstx
, dsty
, dstz
, abs(src_box
->width
), abs(src_box
->height
),
729 abs(src_box
->depth
), &dstbox
);
732 r600_blitter_begin(ctx
, R600_COPY_TEXTURE
);
733 util_blitter_blit_generic(rctx
->blitter
, dst_view
, &dstbox
,
734 src_view
, src_box
, src_width0
, src_height0
,
735 PIPE_MASK_RGBAZS
, PIPE_TEX_FILTER_NEAREST
, NULL
);
736 r600_blitter_end(ctx
);
738 pipe_surface_reference(&dst_view
, NULL
);
739 pipe_sampler_view_reference(&src_view
, NULL
);
742 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
743 static enum pipe_format
int_to_norm_format(enum pipe_format format
)
746 #define REPLACE_FORMAT_SIGN(format,sign) \
747 case PIPE_FORMAT_##format##_##sign##INT: \
748 return PIPE_FORMAT_##format##_##sign##NORM
749 #define REPLACE_FORMAT(format) \
750 REPLACE_FORMAT_SIGN(format, U); \
751 REPLACE_FORMAT_SIGN(format, S)
753 REPLACE_FORMAT_SIGN(B10G10R10A2
, U
);
755 REPLACE_FORMAT(R8G8
);
756 REPLACE_FORMAT(R8G8B8X8
);
757 REPLACE_FORMAT(R8G8B8A8
);
761 REPLACE_FORMAT(L8A8
);
763 REPLACE_FORMAT(R16G16
);
764 REPLACE_FORMAT(R16G16B16X16
);
765 REPLACE_FORMAT(R16G16B16A16
);
769 REPLACE_FORMAT(L16A16
);
771 #undef REPLACE_FORMAT
772 #undef REPLACE_FORMAT_SIGN
778 static bool do_hardware_msaa_resolve(struct pipe_context
*ctx
,
779 const struct pipe_blit_info
*info
)
781 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
782 struct r600_texture
*dst
= (struct r600_texture
*)info
->dst
.resource
;
783 unsigned dst_width
= u_minify(info
->dst
.resource
->width0
, info
->dst
.level
);
784 unsigned dst_height
= u_minify(info
->dst
.resource
->height0
, info
->dst
.level
);
785 enum pipe_format format
= int_to_norm_format(info
->dst
.format
);
786 unsigned sample_mask
=
787 rctx
->b
.chip_class
== CAYMAN
? ~0 :
788 ((1ull << MAX2(1, info
->src
.resource
->nr_samples
)) - 1);
790 if (info
->src
.resource
->nr_samples
> 1 &&
791 info
->dst
.resource
->nr_samples
<= 1 &&
792 util_max_layer(info
->src
.resource
, 0) == 0 &&
793 util_max_layer(info
->dst
.resource
, info
->dst
.level
) == 0 &&
794 info
->dst
.format
== info
->src
.format
&&
795 !util_format_is_pure_integer(format
) &&
796 !util_format_is_depth_or_stencil(format
) &&
797 !info
->scissor_enable
&&
798 (info
->mask
& PIPE_MASK_RGBA
) == PIPE_MASK_RGBA
&&
799 dst_width
== info
->src
.resource
->width0
&&
800 dst_height
== info
->src
.resource
->height0
&&
801 info
->dst
.box
.x
== 0 &&
802 info
->dst
.box
.y
== 0 &&
803 info
->dst
.box
.width
== dst_width
&&
804 info
->dst
.box
.height
== dst_height
&&
805 info
->dst
.box
.depth
== 1 &&
806 info
->src
.box
.x
== 0 &&
807 info
->src
.box
.y
== 0 &&
808 info
->src
.box
.width
== dst_width
&&
809 info
->src
.box
.height
== dst_height
&&
810 info
->src
.box
.depth
== 1 &&
811 dst
->surface
.level
[info
->dst
.level
].mode
>= RADEON_SURF_MODE_1D
&&
812 (!dst
->cmask
.size
|| !dst
->dirty_level_mask
) /* dst cannot be fast-cleared */) {
813 r600_blitter_begin(ctx
, R600_COLOR_RESOLVE
|
814 (info
->render_condition_enable
? 0 : R600_DISABLE_RENDER_COND
));
815 util_blitter_custom_resolve_color(rctx
->blitter
,
816 info
->dst
.resource
, info
->dst
.level
,
818 info
->src
.resource
, info
->src
.box
.z
,
819 sample_mask
, rctx
->custom_blend_resolve
,
821 r600_blitter_end(ctx
);
827 static void r600_blit(struct pipe_context
*ctx
,
828 const struct pipe_blit_info
*info
)
830 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
832 if (do_hardware_msaa_resolve(ctx
, info
)) {
836 assert(util_blitter_is_blit_supported(rctx
->blitter
, info
));
838 /* The driver doesn't decompress resources automatically while
839 * u_blitter is rendering. */
840 if (!r600_decompress_subresource(ctx
, info
->src
.resource
, info
->src
.level
,
842 info
->src
.box
.z
+ info
->src
.box
.depth
- 1)) {
846 if (rctx
->screen
->b
.debug_flags
& DBG_FORCE_DMA
&&
847 util_try_blit_via_copy_region(ctx
, info
))
850 r600_blitter_begin(ctx
, R600_BLIT
|
851 (info
->render_condition_enable
? 0 : R600_DISABLE_RENDER_COND
));
852 util_blitter_blit(rctx
->blitter
, info
);
853 r600_blitter_end(ctx
);
856 static void r600_flush_resource(struct pipe_context
*ctx
,
857 struct pipe_resource
*res
)
859 struct r600_texture
*rtex
= (struct r600_texture
*)res
;
861 assert(res
->target
!= PIPE_BUFFER
);
863 if (!rtex
->is_depth
&& rtex
->cmask
.size
) {
864 r600_blit_decompress_color(ctx
, rtex
, 0, res
->last_level
,
865 0, util_max_layer(res
, 0));
869 void r600_init_blit_functions(struct r600_context
*rctx
)
871 rctx
->b
.b
.clear
= r600_clear
;
872 rctx
->b
.b
.clear_render_target
= r600_clear_render_target
;
873 rctx
->b
.b
.clear_depth_stencil
= r600_clear_depth_stencil
;
874 rctx
->b
.b
.resource_copy_region
= r600_resource_copy_region
;
875 rctx
->b
.b
.blit
= r600_blit
;
876 rctx
->b
.b
.flush_resource
= r600_flush_resource
;
877 rctx
->b
.clear_buffer
= r600_clear_buffer
;
878 rctx
->b
.blit_decompress_depth
= r600_blit_decompress_depth
;