2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 #include "r600_pipe.h"
24 #include "compute_memory_pool.h"
25 #include "evergreen_compute.h"
26 #include "util/u_surface.h"
27 #include "util/u_format.h"
28 #include "evergreend.h"
30 enum r600_blitter_op
/* bitmask */
32 R600_SAVE_FRAGMENT_STATE
= 1,
33 R600_SAVE_TEXTURES
= 2,
34 R600_SAVE_FRAMEBUFFER
= 4,
35 R600_DISABLE_RENDER_COND
= 8,
37 R600_CLEAR
= R600_SAVE_FRAGMENT_STATE
,
39 R600_CLEAR_SURFACE
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
,
41 R600_COPY_BUFFER
= R600_DISABLE_RENDER_COND
,
43 R600_COPY_TEXTURE
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
| R600_SAVE_TEXTURES
|
44 R600_DISABLE_RENDER_COND
,
46 R600_BLIT
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
| R600_SAVE_TEXTURES
,
48 R600_DECOMPRESS
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
| R600_DISABLE_RENDER_COND
,
50 R600_COLOR_RESOLVE
= R600_SAVE_FRAGMENT_STATE
| R600_SAVE_FRAMEBUFFER
53 static void r600_blitter_begin(struct pipe_context
*ctx
, enum r600_blitter_op op
)
55 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
57 util_blitter_save_vertex_buffer_slot(rctx
->blitter
, rctx
->vertex_buffer_state
.vb
);
58 util_blitter_save_vertex_elements(rctx
->blitter
, rctx
->vertex_fetch_shader
.cso
);
59 util_blitter_save_vertex_shader(rctx
->blitter
, rctx
->vs_shader
);
60 util_blitter_save_geometry_shader(rctx
->blitter
, rctx
->gs_shader
);
61 util_blitter_save_tessctrl_shader(rctx
->blitter
, rctx
->tcs_shader
);
62 util_blitter_save_tesseval_shader(rctx
->blitter
, rctx
->tes_shader
);
63 util_blitter_save_so_targets(rctx
->blitter
, rctx
->b
.streamout
.num_targets
,
64 (struct pipe_stream_output_target
**)rctx
->b
.streamout
.targets
);
65 util_blitter_save_rasterizer(rctx
->blitter
, rctx
->rasterizer_state
.cso
);
67 if (op
& R600_SAVE_FRAGMENT_STATE
) {
68 util_blitter_save_viewport(rctx
->blitter
, &rctx
->viewport
.state
[0]);
69 util_blitter_save_scissor(rctx
->blitter
, &rctx
->scissor
.scissor
[0]);
70 util_blitter_save_fragment_shader(rctx
->blitter
, rctx
->ps_shader
);
71 util_blitter_save_blend(rctx
->blitter
, rctx
->blend_state
.cso
);
72 util_blitter_save_depth_stencil_alpha(rctx
->blitter
, rctx
->dsa_state
.cso
);
73 util_blitter_save_stencil_ref(rctx
->blitter
, &rctx
->stencil_ref
.pipe_state
);
74 util_blitter_save_sample_mask(rctx
->blitter
, rctx
->sample_mask
.sample_mask
);
77 if (op
& R600_SAVE_FRAMEBUFFER
)
78 util_blitter_save_framebuffer(rctx
->blitter
, &rctx
->framebuffer
.state
);
80 if (op
& R600_SAVE_TEXTURES
) {
81 util_blitter_save_fragment_sampler_states(
82 rctx
->blitter
, util_last_bit(rctx
->samplers
[PIPE_SHADER_FRAGMENT
].states
.enabled_mask
),
83 (void**)rctx
->samplers
[PIPE_SHADER_FRAGMENT
].states
.states
);
85 util_blitter_save_fragment_sampler_views(
86 rctx
->blitter
, util_last_bit(rctx
->samplers
[PIPE_SHADER_FRAGMENT
].views
.enabled_mask
),
87 (struct pipe_sampler_view
**)rctx
->samplers
[PIPE_SHADER_FRAGMENT
].views
.views
);
90 if (op
& R600_DISABLE_RENDER_COND
)
91 rctx
->b
.render_cond_force_off
= true;
94 static void r600_blitter_end(struct pipe_context
*ctx
)
96 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
98 rctx
->b
.render_cond_force_off
= false;
101 static unsigned u_max_sample(struct pipe_resource
*r
)
103 return r
->nr_samples
? r
->nr_samples
- 1 : 0;
106 static void r600_blit_decompress_depth(struct pipe_context
*ctx
,
107 struct r600_texture
*texture
,
108 struct r600_texture
*staging
,
109 unsigned first_level
, unsigned last_level
,
110 unsigned first_layer
, unsigned last_layer
,
111 unsigned first_sample
, unsigned last_sample
)
113 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
114 unsigned layer
, level
, sample
, checked_last_layer
, max_layer
, max_sample
;
115 struct r600_texture
*flushed_depth_texture
= staging
?
116 staging
: texture
->flushed_depth_texture
;
117 const struct util_format_description
*desc
=
118 util_format_description(texture
->resource
.b
.b
.format
);
121 if (!staging
&& !texture
->dirty_level_mask
)
124 max_sample
= u_max_sample(&texture
->resource
.b
.b
);
126 /* XXX Decompressing MSAA depth textures is broken on R6xx.
127 * There is also a hardlock if CMASK and FMASK are not present.
128 * Just skip this until we find out how to fix it. */
129 if (rctx
->b
.chip_class
== R600
&& max_sample
> 0) {
130 texture
->dirty_level_mask
= 0;
134 if (rctx
->b
.family
== CHIP_RV610
|| rctx
->b
.family
== CHIP_RV630
||
135 rctx
->b
.family
== CHIP_RV620
|| rctx
->b
.family
== CHIP_RV635
)
140 /* Enable decompression in DB_RENDER_CONTROL */
141 rctx
->db_misc_state
.flush_depthstencil_through_cb
= true;
142 rctx
->db_misc_state
.copy_depth
= util_format_has_depth(desc
);
143 rctx
->db_misc_state
.copy_stencil
= util_format_has_stencil(desc
);
144 rctx
->db_misc_state
.copy_sample
= first_sample
;
145 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
147 for (level
= first_level
; level
<= last_level
; level
++) {
148 if (!staging
&& !(texture
->dirty_level_mask
& (1 << level
)))
151 /* The smaller the mipmap level, the less layers there are
152 * as far as 3D textures are concerned. */
153 max_layer
= util_max_layer(&texture
->resource
.b
.b
, level
);
154 checked_last_layer
= last_layer
< max_layer
? last_layer
: max_layer
;
156 for (layer
= first_layer
; layer
<= checked_last_layer
; layer
++) {
157 for (sample
= first_sample
; sample
<= last_sample
; sample
++) {
158 struct pipe_surface
*zsurf
, *cbsurf
, surf_tmpl
;
160 if (sample
!= rctx
->db_misc_state
.copy_sample
) {
161 rctx
->db_misc_state
.copy_sample
= sample
;
162 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
165 surf_tmpl
.format
= texture
->resource
.b
.b
.format
;
166 surf_tmpl
.u
.tex
.level
= level
;
167 surf_tmpl
.u
.tex
.first_layer
= layer
;
168 surf_tmpl
.u
.tex
.last_layer
= layer
;
170 zsurf
= ctx
->create_surface(ctx
, &texture
->resource
.b
.b
, &surf_tmpl
);
172 surf_tmpl
.format
= flushed_depth_texture
->resource
.b
.b
.format
;
173 cbsurf
= ctx
->create_surface(ctx
,
174 &flushed_depth_texture
->resource
.b
.b
, &surf_tmpl
);
176 r600_blitter_begin(ctx
, R600_DECOMPRESS
);
177 util_blitter_custom_depth_stencil(rctx
->blitter
, zsurf
, cbsurf
, 1 << sample
,
178 rctx
->custom_dsa_flush
, depth
);
179 r600_blitter_end(ctx
);
181 pipe_surface_reference(&zsurf
, NULL
);
182 pipe_surface_reference(&cbsurf
, NULL
);
186 /* The texture will always be dirty if some layers or samples aren't flushed.
187 * I don't think this case occurs often though. */
189 first_layer
== 0 && last_layer
== max_layer
&&
190 first_sample
== 0 && last_sample
== max_sample
) {
191 texture
->dirty_level_mask
&= ~(1 << level
);
195 /* reenable compression in DB_RENDER_CONTROL */
196 rctx
->db_misc_state
.flush_depthstencil_through_cb
= false;
197 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
200 static void r600_blit_decompress_depth_in_place(struct r600_context
*rctx
,
201 struct r600_texture
*texture
,
202 bool is_stencil_sampler
,
203 unsigned first_level
, unsigned last_level
,
204 unsigned first_layer
, unsigned last_layer
)
206 struct pipe_surface
*zsurf
, surf_tmpl
= {{0}};
207 unsigned layer
, max_layer
, checked_last_layer
, level
;
208 unsigned *dirty_level_mask
;
210 /* Enable decompression in DB_RENDER_CONTROL */
211 if (is_stencil_sampler
) {
212 rctx
->db_misc_state
.flush_stencil_inplace
= true;
213 dirty_level_mask
= &texture
->stencil_dirty_level_mask
;
215 rctx
->db_misc_state
.flush_depth_inplace
= true;
216 dirty_level_mask
= &texture
->dirty_level_mask
;
218 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
220 surf_tmpl
.format
= texture
->resource
.b
.b
.format
;
222 for (level
= first_level
; level
<= last_level
; level
++) {
223 if (!(*dirty_level_mask
& (1 << level
)))
226 surf_tmpl
.u
.tex
.level
= level
;
228 /* The smaller the mipmap level, the less layers there are
229 * as far as 3D textures are concerned. */
230 max_layer
= util_max_layer(&texture
->resource
.b
.b
, level
);
231 checked_last_layer
= last_layer
< max_layer
? last_layer
: max_layer
;
233 for (layer
= first_layer
; layer
<= checked_last_layer
; layer
++) {
234 surf_tmpl
.u
.tex
.first_layer
= layer
;
235 surf_tmpl
.u
.tex
.last_layer
= layer
;
237 zsurf
= rctx
->b
.b
.create_surface(&rctx
->b
.b
, &texture
->resource
.b
.b
, &surf_tmpl
);
239 r600_blitter_begin(&rctx
->b
.b
, R600_DECOMPRESS
);
240 util_blitter_custom_depth_stencil(rctx
->blitter
, zsurf
, NULL
, ~0,
241 rctx
->custom_dsa_flush
, 1.0f
);
242 r600_blitter_end(&rctx
->b
.b
);
244 pipe_surface_reference(&zsurf
, NULL
);
247 /* The texture will always be dirty if some layers or samples aren't flushed.
248 * I don't think this case occurs often though. */
249 if (first_layer
== 0 && last_layer
== max_layer
) {
250 *dirty_level_mask
&= ~(1 << level
);
254 /* Disable decompression in DB_RENDER_CONTROL */
255 rctx
->db_misc_state
.flush_depth_inplace
= false;
256 rctx
->db_misc_state
.flush_stencil_inplace
= false;
257 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
260 void r600_decompress_depth_textures(struct r600_context
*rctx
,
261 struct r600_samplerview_state
*textures
)
264 unsigned depth_texture_mask
= textures
->compressed_depthtex_mask
;
266 while (depth_texture_mask
) {
267 struct pipe_sampler_view
*view
;
268 struct r600_pipe_sampler_view
*rview
;
269 struct r600_texture
*tex
;
271 i
= u_bit_scan(&depth_texture_mask
);
273 view
= &textures
->views
[i
]->base
;
275 rview
= (struct r600_pipe_sampler_view
*)view
;
277 tex
= (struct r600_texture
*)view
->texture
;
278 assert(tex
->is_depth
&& !tex
->is_flushing_texture
);
280 if (rctx
->b
.chip_class
>= EVERGREEN
||
281 r600_can_read_depth(tex
)) {
282 r600_blit_decompress_depth_in_place(rctx
, tex
,
283 rview
->is_stencil_sampler
,
284 view
->u
.tex
.first_level
, view
->u
.tex
.last_level
,
285 0, util_max_layer(&tex
->resource
.b
.b
, view
->u
.tex
.first_level
));
287 r600_blit_decompress_depth(&rctx
->b
.b
, tex
, NULL
,
288 view
->u
.tex
.first_level
, view
->u
.tex
.last_level
,
289 0, util_max_layer(&tex
->resource
.b
.b
, view
->u
.tex
.first_level
),
290 0, u_max_sample(&tex
->resource
.b
.b
));
295 static void r600_blit_decompress_color(struct pipe_context
*ctx
,
296 struct r600_texture
*rtex
,
297 unsigned first_level
, unsigned last_level
,
298 unsigned first_layer
, unsigned last_layer
)
300 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
301 unsigned layer
, level
, checked_last_layer
, max_layer
;
303 if (!rtex
->dirty_level_mask
)
306 for (level
= first_level
; level
<= last_level
; level
++) {
307 if (!(rtex
->dirty_level_mask
& (1 << level
)))
310 /* The smaller the mipmap level, the less layers there are
311 * as far as 3D textures are concerned. */
312 max_layer
= util_max_layer(&rtex
->resource
.b
.b
, level
);
313 checked_last_layer
= last_layer
< max_layer
? last_layer
: max_layer
;
315 for (layer
= first_layer
; layer
<= checked_last_layer
; layer
++) {
316 struct pipe_surface
*cbsurf
, surf_tmpl
;
318 surf_tmpl
.format
= rtex
->resource
.b
.b
.format
;
319 surf_tmpl
.u
.tex
.level
= level
;
320 surf_tmpl
.u
.tex
.first_layer
= layer
;
321 surf_tmpl
.u
.tex
.last_layer
= layer
;
322 cbsurf
= ctx
->create_surface(ctx
, &rtex
->resource
.b
.b
, &surf_tmpl
);
324 r600_blitter_begin(ctx
, R600_DECOMPRESS
);
325 util_blitter_custom_color(rctx
->blitter
, cbsurf
,
326 rtex
->fmask
.size
? rctx
->custom_blend_decompress
: rctx
->custom_blend_fastclear
);
327 r600_blitter_end(ctx
);
329 pipe_surface_reference(&cbsurf
, NULL
);
332 /* The texture will always be dirty if some layers aren't flushed.
333 * I don't think this case occurs often though. */
334 if (first_layer
== 0 && last_layer
== max_layer
) {
335 rtex
->dirty_level_mask
&= ~(1 << level
);
340 void r600_decompress_color_textures(struct r600_context
*rctx
,
341 struct r600_samplerview_state
*textures
)
344 unsigned mask
= textures
->compressed_colortex_mask
;
347 struct pipe_sampler_view
*view
;
348 struct r600_texture
*tex
;
350 i
= u_bit_scan(&mask
);
352 view
= &textures
->views
[i
]->base
;
355 tex
= (struct r600_texture
*)view
->texture
;
356 assert(tex
->cmask
.size
);
358 r600_blit_decompress_color(&rctx
->b
.b
, tex
,
359 view
->u
.tex
.first_level
, view
->u
.tex
.last_level
,
360 0, util_max_layer(&tex
->resource
.b
.b
, view
->u
.tex
.first_level
));
364 /* Helper for decompressing a portion of a color or depth resource before
365 * blitting if any decompression is needed.
366 * The driver doesn't decompress resources automatically while u_blitter is
368 static bool r600_decompress_subresource(struct pipe_context
*ctx
,
369 struct pipe_resource
*tex
,
371 unsigned first_layer
, unsigned last_layer
)
373 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
374 struct r600_texture
*rtex
= (struct r600_texture
*)tex
;
376 if (rtex
->is_depth
&& !rtex
->is_flushing_texture
) {
377 if (rctx
->b
.chip_class
>= EVERGREEN
||
378 r600_can_read_depth(rtex
)) {
379 r600_blit_decompress_depth_in_place(rctx
, rtex
, false,
381 first_layer
, last_layer
);
382 if (rtex
->surface
.flags
& RADEON_SURF_SBUFFER
) {
383 r600_blit_decompress_depth_in_place(rctx
, rtex
, true,
385 first_layer
, last_layer
);
388 if (!r600_init_flushed_depth_texture(ctx
, tex
, NULL
))
389 return false; /* error */
391 r600_blit_decompress_depth(ctx
, rtex
, NULL
,
393 first_layer
, last_layer
,
394 0, u_max_sample(tex
));
396 } else if (rtex
->cmask
.size
) {
397 r600_blit_decompress_color(ctx
, rtex
, level
, level
,
398 first_layer
, last_layer
);
403 static void r600_clear(struct pipe_context
*ctx
, unsigned buffers
,
404 const union pipe_color_union
*color
,
405 double depth
, unsigned stencil
)
407 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
408 struct pipe_framebuffer_state
*fb
= &rctx
->framebuffer
.state
;
410 if (buffers
& PIPE_CLEAR_COLOR
&& rctx
->b
.chip_class
>= EVERGREEN
) {
411 evergreen_do_fast_color_clear(&rctx
->b
, fb
, &rctx
->framebuffer
.atom
,
412 &buffers
, NULL
, color
);
414 return; /* all buffers have been fast cleared */
417 if (buffers
& PIPE_CLEAR_COLOR
) {
420 /* These buffers cannot use fast clear, make sure to disable expansion. */
421 for (i
= 0; i
< fb
->nr_cbufs
; i
++) {
422 struct r600_texture
*tex
;
424 /* If not clearing this buffer, skip. */
425 if (!(buffers
& (PIPE_CLEAR_COLOR0
<< i
)))
431 tex
= (struct r600_texture
*)fb
->cbufs
[i
]->texture
;
432 if (tex
->fmask
.size
== 0)
433 tex
->dirty_level_mask
&= ~(1 << fb
->cbufs
[i
]->u
.tex
.level
);
437 /* if hyperz enabled just clear hyperz */
438 if (fb
->zsbuf
&& (buffers
& PIPE_CLEAR_DEPTH
)) {
439 struct r600_texture
*rtex
;
440 unsigned level
= fb
->zsbuf
->u
.tex
.level
;
442 rtex
= (struct r600_texture
*)fb
->zsbuf
->texture
;
444 /* We can't use hyperz fast clear if each slice of a texture
445 * array are clear to different value. To simplify code just
446 * disable fast clear for texture array.
448 /* Only use htile for first level */
449 if (rtex
->htile_buffer
&& !level
&&
450 fb
->zsbuf
->u
.tex
.first_layer
== 0 &&
451 fb
->zsbuf
->u
.tex
.last_layer
== util_max_layer(&rtex
->resource
.b
.b
, level
)) {
452 if (rtex
->depth_clear_value
!= depth
) {
453 rtex
->depth_clear_value
= depth
;
454 r600_mark_atom_dirty(rctx
, &rctx
->db_state
.atom
);
456 rctx
->db_misc_state
.htile_clear
= true;
457 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
461 r600_blitter_begin(ctx
, R600_CLEAR
);
462 util_blitter_clear(rctx
->blitter
, fb
->width
, fb
->height
,
463 util_framebuffer_get_num_layers(fb
),
464 buffers
, color
, depth
, stencil
);
465 r600_blitter_end(ctx
);
467 /* disable fast clear */
468 if (rctx
->db_misc_state
.htile_clear
) {
469 rctx
->db_misc_state
.htile_clear
= false;
470 r600_mark_atom_dirty(rctx
, &rctx
->db_misc_state
.atom
);
474 static void r600_clear_render_target(struct pipe_context
*ctx
,
475 struct pipe_surface
*dst
,
476 const union pipe_color_union
*color
,
477 unsigned dstx
, unsigned dsty
,
478 unsigned width
, unsigned height
)
480 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
482 r600_blitter_begin(ctx
, R600_CLEAR_SURFACE
);
483 util_blitter_clear_render_target(rctx
->blitter
, dst
, color
,
484 dstx
, dsty
, width
, height
);
485 r600_blitter_end(ctx
);
488 static void r600_clear_depth_stencil(struct pipe_context
*ctx
,
489 struct pipe_surface
*dst
,
490 unsigned clear_flags
,
493 unsigned dstx
, unsigned dsty
,
494 unsigned width
, unsigned height
)
496 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
498 r600_blitter_begin(ctx
, R600_CLEAR_SURFACE
);
499 util_blitter_clear_depth_stencil(rctx
->blitter
, dst
, clear_flags
, depth
, stencil
,
500 dstx
, dsty
, width
, height
);
501 r600_blitter_end(ctx
);
504 static void r600_copy_buffer(struct pipe_context
*ctx
, struct pipe_resource
*dst
, unsigned dstx
,
505 struct pipe_resource
*src
, const struct pipe_box
*src_box
)
507 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
509 if (rctx
->screen
->b
.has_cp_dma
) {
510 r600_cp_dma_copy_buffer(rctx
, dst
, dstx
, src
, src_box
->x
, src_box
->width
);
512 else if (rctx
->screen
->b
.has_streamout
&&
513 /* Require 4-byte alignment. */
514 dstx
% 4 == 0 && src_box
->x
% 4 == 0 && src_box
->width
% 4 == 0) {
516 r600_blitter_begin(ctx
, R600_COPY_BUFFER
);
517 util_blitter_copy_buffer(rctx
->blitter
, dst
, dstx
, src
, src_box
->x
, src_box
->width
);
518 r600_blitter_end(ctx
);
520 util_resource_copy_region(ctx
, dst
, 0, dstx
, 0, 0, src
, 0, src_box
);
523 /* The index buffer (VGT) doesn't seem to see the result of the copying.
524 * Can we somehow flush the index buffer cache? Starting a new IB seems
525 * to do the trick. */
526 if (rctx
->b
.chip_class
<= R700
)
527 rctx
->b
.gfx
.flush(ctx
, RADEON_FLUSH_ASYNC
, NULL
);
531 * Global buffers are not really resources, they are are actually offsets
532 * into a single global resource (r600_screen::global_pool). The means
533 * they don't have their own buf handle, so they cannot be passed
534 * to r600_copy_buffer() and must be handled separately.
536 static void r600_copy_global_buffer(struct pipe_context
*ctx
,
537 struct pipe_resource
*dst
, unsigned
538 dstx
, struct pipe_resource
*src
,
539 const struct pipe_box
*src_box
)
541 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
542 struct compute_memory_pool
*pool
= rctx
->screen
->global_pool
;
543 struct pipe_box new_src_box
= *src_box
;
545 if (src
->bind
& PIPE_BIND_GLOBAL
) {
546 struct r600_resource_global
*rsrc
=
547 (struct r600_resource_global
*)src
;
548 struct compute_memory_item
*item
= rsrc
->chunk
;
550 if (is_item_in_pool(item
)) {
551 new_src_box
.x
+= 4 * item
->start_in_dw
;
552 src
= (struct pipe_resource
*)pool
->bo
;
554 if (item
->real_buffer
== NULL
) {
556 r600_compute_buffer_alloc_vram(pool
->screen
,
557 item
->size_in_dw
* 4);
559 src
= (struct pipe_resource
*)item
->real_buffer
;
562 if (dst
->bind
& PIPE_BIND_GLOBAL
) {
563 struct r600_resource_global
*rdst
=
564 (struct r600_resource_global
*)dst
;
565 struct compute_memory_item
*item
= rdst
->chunk
;
567 if (is_item_in_pool(item
)) {
568 dstx
+= 4 * item
->start_in_dw
;
569 dst
= (struct pipe_resource
*)pool
->bo
;
571 if (item
->real_buffer
== NULL
) {
573 r600_compute_buffer_alloc_vram(pool
->screen
,
574 item
->size_in_dw
* 4);
576 dst
= (struct pipe_resource
*)item
->real_buffer
;
580 r600_copy_buffer(ctx
, dst
, dstx
, src
, &new_src_box
);
583 static void r600_clear_buffer(struct pipe_context
*ctx
, struct pipe_resource
*dst
,
584 uint64_t offset
, uint64_t size
, unsigned value
,
587 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
589 if (rctx
->screen
->b
.has_cp_dma
&&
590 rctx
->b
.chip_class
>= EVERGREEN
&&
591 offset
% 4 == 0 && size
% 4 == 0) {
592 evergreen_cp_dma_clear_buffer(rctx
, dst
, offset
, size
, value
);
593 } else if (rctx
->screen
->b
.has_streamout
&& offset
% 4 == 0 && size
% 4 == 0) {
594 union pipe_color_union clear_value
;
595 clear_value
.ui
[0] = value
;
597 r600_blitter_begin(ctx
, R600_DISABLE_RENDER_COND
);
598 util_blitter_clear_buffer(rctx
->blitter
, dst
, offset
, size
,
600 r600_blitter_end(ctx
);
602 uint32_t *map
= r600_buffer_map_sync_with_rings(&rctx
->b
, r600_resource(dst
),
603 PIPE_TRANSFER_WRITE
);
606 for (unsigned i
= 0; i
< size
; i
++)
611 void r600_resource_copy_region(struct pipe_context
*ctx
,
612 struct pipe_resource
*dst
,
614 unsigned dstx
, unsigned dsty
, unsigned dstz
,
615 struct pipe_resource
*src
,
617 const struct pipe_box
*src_box
)
619 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
620 struct pipe_surface
*dst_view
, dst_templ
;
621 struct pipe_sampler_view src_templ
, *src_view
;
622 unsigned dst_width
, dst_height
, src_width0
, src_height0
, src_widthFL
, src_heightFL
;
623 unsigned src_force_level
= 0;
624 struct pipe_box sbox
, dstbox
;
626 /* Handle buffers first. */
627 if (dst
->target
== PIPE_BUFFER
&& src
->target
== PIPE_BUFFER
) {
628 if ((src
->bind
& PIPE_BIND_GLOBAL
) ||
629 (dst
->bind
& PIPE_BIND_GLOBAL
)) {
630 r600_copy_global_buffer(ctx
, dst
, dstx
, src
, src_box
);
632 r600_copy_buffer(ctx
, dst
, dstx
, src
, src_box
);
637 assert(u_max_sample(dst
) == u_max_sample(src
));
639 /* The driver doesn't decompress resources automatically while
640 * u_blitter is rendering. */
641 if (!r600_decompress_subresource(ctx
, src
, src_level
,
642 src_box
->z
, src_box
->z
+ src_box
->depth
- 1)) {
646 dst_width
= u_minify(dst
->width0
, dst_level
);
647 dst_height
= u_minify(dst
->height0
, dst_level
);
648 src_width0
= src
->width0
;
649 src_height0
= src
->height0
;
650 src_widthFL
= u_minify(src
->width0
, src_level
);
651 src_heightFL
= u_minify(src
->height0
, src_level
);
653 util_blitter_default_dst_texture(&dst_templ
, dst
, dst_level
, dstz
);
654 util_blitter_default_src_texture(&src_templ
, src
, src_level
);
656 if (util_format_is_compressed(src
->format
) ||
657 util_format_is_compressed(dst
->format
)) {
658 unsigned blocksize
= util_format_get_blocksize(src
->format
);
661 src_templ
.format
= PIPE_FORMAT_R16G16B16A16_UINT
; /* 64-bit block */
663 src_templ
.format
= PIPE_FORMAT_R32G32B32A32_UINT
; /* 128-bit block */
664 dst_templ
.format
= src_templ
.format
;
666 dst_width
= util_format_get_nblocksx(dst
->format
, dst_width
);
667 dst_height
= util_format_get_nblocksy(dst
->format
, dst_height
);
668 src_width0
= util_format_get_nblocksx(src
->format
, src_width0
);
669 src_height0
= util_format_get_nblocksy(src
->format
, src_height0
);
670 src_widthFL
= util_format_get_nblocksx(src
->format
, src_widthFL
);
671 src_heightFL
= util_format_get_nblocksy(src
->format
, src_heightFL
);
673 dstx
= util_format_get_nblocksx(dst
->format
, dstx
);
674 dsty
= util_format_get_nblocksy(dst
->format
, dsty
);
676 sbox
.x
= util_format_get_nblocksx(src
->format
, src_box
->x
);
677 sbox
.y
= util_format_get_nblocksy(src
->format
, src_box
->y
);
679 sbox
.width
= util_format_get_nblocksx(src
->format
, src_box
->width
);
680 sbox
.height
= util_format_get_nblocksy(src
->format
, src_box
->height
);
681 sbox
.depth
= src_box
->depth
;
684 src_force_level
= src_level
;
685 } else if (!util_blitter_is_copy_supported(rctx
->blitter
, dst
, src
)) {
686 if (util_format_is_subsampled_422(src
->format
)) {
688 src_templ
.format
= PIPE_FORMAT_R8G8B8A8_UINT
;
689 dst_templ
.format
= PIPE_FORMAT_R8G8B8A8_UINT
;
691 dst_width
= util_format_get_nblocksx(dst
->format
, dst_width
);
692 src_width0
= util_format_get_nblocksx(src
->format
, src_width0
);
693 src_widthFL
= util_format_get_nblocksx(src
->format
, src_widthFL
);
695 dstx
= util_format_get_nblocksx(dst
->format
, dstx
);
698 sbox
.x
= util_format_get_nblocksx(src
->format
, src_box
->x
);
699 sbox
.width
= util_format_get_nblocksx(src
->format
, src_box
->width
);
702 unsigned blocksize
= util_format_get_blocksize(src
->format
);
706 dst_templ
.format
= PIPE_FORMAT_R8_UNORM
;
707 src_templ
.format
= PIPE_FORMAT_R8_UNORM
;
710 dst_templ
.format
= PIPE_FORMAT_R8G8_UNORM
;
711 src_templ
.format
= PIPE_FORMAT_R8G8_UNORM
;
714 dst_templ
.format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
715 src_templ
.format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
718 dst_templ
.format
= PIPE_FORMAT_R16G16B16A16_UINT
;
719 src_templ
.format
= PIPE_FORMAT_R16G16B16A16_UINT
;
722 dst_templ
.format
= PIPE_FORMAT_R32G32B32A32_UINT
;
723 src_templ
.format
= PIPE_FORMAT_R32G32B32A32_UINT
;
726 fprintf(stderr
, "Unhandled format %s with blocksize %u\n",
727 util_format_short_name(src
->format
), blocksize
);
733 dst_view
= r600_create_surface_custom(ctx
, dst
, &dst_templ
, dst_width
, dst_height
);
735 if (rctx
->b
.chip_class
>= EVERGREEN
) {
736 src_view
= evergreen_create_sampler_view_custom(ctx
, src
, &src_templ
,
737 src_width0
, src_height0
,
740 src_view
= r600_create_sampler_view_custom(ctx
, src
, &src_templ
,
741 src_widthFL
, src_heightFL
);
744 u_box_3d(dstx
, dsty
, dstz
, abs(src_box
->width
), abs(src_box
->height
),
745 abs(src_box
->depth
), &dstbox
);
748 r600_blitter_begin(ctx
, R600_COPY_TEXTURE
);
749 util_blitter_blit_generic(rctx
->blitter
, dst_view
, &dstbox
,
750 src_view
, src_box
, src_width0
, src_height0
,
751 PIPE_MASK_RGBAZS
, PIPE_TEX_FILTER_NEAREST
, NULL
,
753 r600_blitter_end(ctx
);
755 pipe_surface_reference(&dst_view
, NULL
);
756 pipe_sampler_view_reference(&src_view
, NULL
);
759 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
760 static enum pipe_format
int_to_norm_format(enum pipe_format format
)
763 #define REPLACE_FORMAT_SIGN(format,sign) \
764 case PIPE_FORMAT_##format##_##sign##INT: \
765 return PIPE_FORMAT_##format##_##sign##NORM
766 #define REPLACE_FORMAT(format) \
767 REPLACE_FORMAT_SIGN(format, U); \
768 REPLACE_FORMAT_SIGN(format, S)
770 REPLACE_FORMAT_SIGN(B10G10R10A2
, U
);
772 REPLACE_FORMAT(R8G8
);
773 REPLACE_FORMAT(R8G8B8X8
);
774 REPLACE_FORMAT(R8G8B8A8
);
778 REPLACE_FORMAT(L8A8
);
780 REPLACE_FORMAT(R16G16
);
781 REPLACE_FORMAT(R16G16B16X16
);
782 REPLACE_FORMAT(R16G16B16A16
);
786 REPLACE_FORMAT(L16A16
);
788 #undef REPLACE_FORMAT
789 #undef REPLACE_FORMAT_SIGN
795 static bool do_hardware_msaa_resolve(struct pipe_context
*ctx
,
796 const struct pipe_blit_info
*info
)
798 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
799 struct r600_texture
*dst
= (struct r600_texture
*)info
->dst
.resource
;
800 unsigned dst_width
= u_minify(info
->dst
.resource
->width0
, info
->dst
.level
);
801 unsigned dst_height
= u_minify(info
->dst
.resource
->height0
, info
->dst
.level
);
802 enum pipe_format format
= int_to_norm_format(info
->dst
.format
);
803 unsigned sample_mask
=
804 rctx
->b
.chip_class
== CAYMAN
? ~0 :
805 ((1ull << MAX2(1, info
->src
.resource
->nr_samples
)) - 1);
807 if (info
->src
.resource
->nr_samples
> 1 &&
808 info
->dst
.resource
->nr_samples
<= 1 &&
809 util_max_layer(info
->src
.resource
, 0) == 0 &&
810 util_max_layer(info
->dst
.resource
, info
->dst
.level
) == 0 &&
811 info
->dst
.format
== info
->src
.format
&&
812 !util_format_is_pure_integer(format
) &&
813 !util_format_is_depth_or_stencil(format
) &&
814 !info
->scissor_enable
&&
815 (info
->mask
& PIPE_MASK_RGBA
) == PIPE_MASK_RGBA
&&
816 dst_width
== info
->src
.resource
->width0
&&
817 dst_height
== info
->src
.resource
->height0
&&
818 info
->dst
.box
.x
== 0 &&
819 info
->dst
.box
.y
== 0 &&
820 info
->dst
.box
.width
== dst_width
&&
821 info
->dst
.box
.height
== dst_height
&&
822 info
->dst
.box
.depth
== 1 &&
823 info
->src
.box
.x
== 0 &&
824 info
->src
.box
.y
== 0 &&
825 info
->src
.box
.width
== dst_width
&&
826 info
->src
.box
.height
== dst_height
&&
827 info
->src
.box
.depth
== 1 &&
828 dst
->surface
.level
[info
->dst
.level
].mode
>= RADEON_SURF_MODE_1D
&&
829 (!dst
->cmask
.size
|| !dst
->dirty_level_mask
) /* dst cannot be fast-cleared */) {
830 r600_blitter_begin(ctx
, R600_COLOR_RESOLVE
|
831 (info
->render_condition_enable
? 0 : R600_DISABLE_RENDER_COND
));
832 util_blitter_custom_resolve_color(rctx
->blitter
,
833 info
->dst
.resource
, info
->dst
.level
,
835 info
->src
.resource
, info
->src
.box
.z
,
836 sample_mask
, rctx
->custom_blend_resolve
,
838 r600_blitter_end(ctx
);
844 static void r600_blit(struct pipe_context
*ctx
,
845 const struct pipe_blit_info
*info
)
847 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
849 if (do_hardware_msaa_resolve(ctx
, info
)) {
853 assert(util_blitter_is_blit_supported(rctx
->blitter
, info
));
855 /* The driver doesn't decompress resources automatically while
856 * u_blitter is rendering. */
857 if (!r600_decompress_subresource(ctx
, info
->src
.resource
, info
->src
.level
,
859 info
->src
.box
.z
+ info
->src
.box
.depth
- 1)) {
863 if (rctx
->screen
->b
.debug_flags
& DBG_FORCE_DMA
&&
864 util_try_blit_via_copy_region(ctx
, info
))
867 r600_blitter_begin(ctx
, R600_BLIT
|
868 (info
->render_condition_enable
? 0 : R600_DISABLE_RENDER_COND
));
869 util_blitter_blit(rctx
->blitter
, info
);
870 r600_blitter_end(ctx
);
873 static void r600_flush_resource(struct pipe_context
*ctx
,
874 struct pipe_resource
*res
)
876 struct r600_texture
*rtex
= (struct r600_texture
*)res
;
878 assert(res
->target
!= PIPE_BUFFER
);
880 if (!rtex
->is_depth
&& rtex
->cmask
.size
) {
881 r600_blit_decompress_color(ctx
, rtex
, 0, res
->last_level
,
882 0, util_max_layer(res
, 0));
886 void r600_init_blit_functions(struct r600_context
*rctx
)
888 rctx
->b
.b
.clear
= r600_clear
;
889 rctx
->b
.b
.clear_render_target
= r600_clear_render_target
;
890 rctx
->b
.b
.clear_depth_stencil
= r600_clear_depth_stencil
;
891 rctx
->b
.b
.resource_copy_region
= r600_resource_copy_region
;
892 rctx
->b
.b
.blit
= r600_blit
;
893 rctx
->b
.b
.flush_resource
= r600_flush_resource
;
894 rctx
->b
.clear_buffer
= r600_clear_buffer
;
895 rctx
->b
.blit_decompress_depth
= r600_blit_decompress_depth
;