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r600: Use DMA transfers in r600_copy_global_buffer
[mesa.git] / src / gallium / drivers / r600 / r600_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "r600_pipe.h"
24 #include "compute_memory_pool.h"
25 #include "evergreen_compute.h"
26 #include "util/u_surface.h"
27 #include "util/u_format.h"
28 #include "evergreend.h"
29
30 enum r600_blitter_op /* bitmask */
31 {
32 R600_SAVE_FRAGMENT_STATE = 1,
33 R600_SAVE_TEXTURES = 2,
34 R600_SAVE_FRAMEBUFFER = 4,
35 R600_DISABLE_RENDER_COND = 8,
36
37 R600_CLEAR = R600_SAVE_FRAGMENT_STATE,
38
39 R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER,
40
41 R600_COPY_BUFFER = R600_DISABLE_RENDER_COND,
42
43 R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
44 R600_DISABLE_RENDER_COND,
45
46 R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES,
47
48 R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
49
50 R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER
51 };
52
53 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
54 {
55 struct r600_context *rctx = (struct r600_context *)ctx;
56
57 r600_suspend_nontimer_queries(&rctx->b);
58
59 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb);
60 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
61 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
62 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
63 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
64 (struct pipe_stream_output_target**)rctx->b.streamout.targets);
65 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
66
67 if (op & R600_SAVE_FRAGMENT_STATE) {
68 util_blitter_save_viewport(rctx->blitter, &rctx->viewport[0].state);
69 util_blitter_save_scissor(rctx->blitter, &rctx->scissor[0].scissor);
70 util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
71 util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
72 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
73 util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state);
74 util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask);
75 }
76
77 if (op & R600_SAVE_FRAMEBUFFER)
78 util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state);
79
80 if (op & R600_SAVE_TEXTURES) {
81 util_blitter_save_fragment_sampler_states(
82 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask),
83 (void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states);
84
85 util_blitter_save_fragment_sampler_views(
86 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask),
87 (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
88 }
89
90 if ((op & R600_DISABLE_RENDER_COND) && rctx->b.current_render_cond) {
91 util_blitter_save_render_condition(rctx->blitter,
92 rctx->b.current_render_cond,
93 rctx->b.current_render_cond_cond,
94 rctx->b.current_render_cond_mode);
95 }
96 }
97
98 static void r600_blitter_end(struct pipe_context *ctx)
99 {
100 struct r600_context *rctx = (struct r600_context *)ctx;
101 r600_resume_nontimer_queries(&rctx->b);
102 }
103
104 static unsigned u_max_sample(struct pipe_resource *r)
105 {
106 return r->nr_samples ? r->nr_samples - 1 : 0;
107 }
108
109 static void r600_blit_decompress_depth(struct pipe_context *ctx,
110 struct r600_texture *texture,
111 struct r600_texture *staging,
112 unsigned first_level, unsigned last_level,
113 unsigned first_layer, unsigned last_layer,
114 unsigned first_sample, unsigned last_sample)
115 {
116 struct r600_context *rctx = (struct r600_context *)ctx;
117 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
118 struct r600_texture *flushed_depth_texture = staging ?
119 staging : texture->flushed_depth_texture;
120 const struct util_format_description *desc =
121 util_format_description(texture->resource.b.b.format);
122 float depth;
123
124 if (!staging && !texture->dirty_level_mask)
125 return;
126
127 max_sample = u_max_sample(&texture->resource.b.b);
128
129 /* XXX Decompressing MSAA depth textures is broken on R6xx.
130 * There is also a hardlock if CMASK and FMASK are not present.
131 * Just skip this until we find out how to fix it. */
132 if (rctx->b.chip_class == R600 && max_sample > 0) {
133 texture->dirty_level_mask = 0;
134 return;
135 }
136
137 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 ||
138 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635)
139 depth = 0.0f;
140 else
141 depth = 1.0f;
142
143 /* Enable decompression in DB_RENDER_CONTROL */
144 rctx->db_misc_state.flush_depthstencil_through_cb = true;
145 rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
146 rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
147 rctx->db_misc_state.copy_sample = first_sample;
148 rctx->db_misc_state.atom.dirty = true;
149
150 for (level = first_level; level <= last_level; level++) {
151 if (!staging && !(texture->dirty_level_mask & (1 << level)))
152 continue;
153
154 /* The smaller the mipmap level, the less layers there are
155 * as far as 3D textures are concerned. */
156 max_layer = util_max_layer(&texture->resource.b.b, level);
157 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
158
159 for (layer = first_layer; layer <= checked_last_layer; layer++) {
160 for (sample = first_sample; sample <= last_sample; sample++) {
161 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
162
163 if (sample != rctx->db_misc_state.copy_sample) {
164 rctx->db_misc_state.copy_sample = sample;
165 rctx->db_misc_state.atom.dirty = true;
166 }
167
168 surf_tmpl.format = texture->resource.b.b.format;
169 surf_tmpl.u.tex.level = level;
170 surf_tmpl.u.tex.first_layer = layer;
171 surf_tmpl.u.tex.last_layer = layer;
172
173 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
174
175 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
176 cbsurf = ctx->create_surface(ctx,
177 &flushed_depth_texture->resource.b.b, &surf_tmpl);
178
179 r600_blitter_begin(ctx, R600_DECOMPRESS);
180 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample,
181 rctx->custom_dsa_flush, depth);
182 r600_blitter_end(ctx);
183
184 pipe_surface_reference(&zsurf, NULL);
185 pipe_surface_reference(&cbsurf, NULL);
186 }
187 }
188
189 /* The texture will always be dirty if some layers or samples aren't flushed.
190 * I don't think this case occurs often though. */
191 if (!staging &&
192 first_layer == 0 && last_layer == max_layer &&
193 first_sample == 0 && last_sample == max_sample) {
194 texture->dirty_level_mask &= ~(1 << level);
195 }
196 }
197
198 /* reenable compression in DB_RENDER_CONTROL */
199 rctx->db_misc_state.flush_depthstencil_through_cb = false;
200 rctx->db_misc_state.atom.dirty = true;
201 }
202
203 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
204 struct r600_texture *texture,
205 unsigned first_level, unsigned last_level,
206 unsigned first_layer, unsigned last_layer)
207 {
208 struct pipe_surface *zsurf, surf_tmpl = {{0}};
209 unsigned layer, max_layer, checked_last_layer, level;
210
211 /* Enable decompression in DB_RENDER_CONTROL */
212 rctx->db_misc_state.flush_depthstencil_in_place = true;
213 rctx->db_misc_state.atom.dirty = true;
214
215 surf_tmpl.format = texture->resource.b.b.format;
216
217 for (level = first_level; level <= last_level; level++) {
218 if (!(texture->dirty_level_mask & (1 << level)))
219 continue;
220
221 surf_tmpl.u.tex.level = level;
222
223 /* The smaller the mipmap level, the less layers there are
224 * as far as 3D textures are concerned. */
225 max_layer = util_max_layer(&texture->resource.b.b, level);
226 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
227
228 for (layer = first_layer; layer <= checked_last_layer; layer++) {
229 surf_tmpl.u.tex.first_layer = layer;
230 surf_tmpl.u.tex.last_layer = layer;
231
232 zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl);
233
234 r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS);
235 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0,
236 rctx->custom_dsa_flush, 1.0f);
237 r600_blitter_end(&rctx->b.b);
238
239 pipe_surface_reference(&zsurf, NULL);
240 }
241
242 /* The texture will always be dirty if some layers or samples aren't flushed.
243 * I don't think this case occurs often though. */
244 if (first_layer == 0 && last_layer == max_layer) {
245 texture->dirty_level_mask &= ~(1 << level);
246 }
247 }
248
249 /* Disable decompression in DB_RENDER_CONTROL */
250 rctx->db_misc_state.flush_depthstencil_in_place = false;
251 rctx->db_misc_state.atom.dirty = true;
252 }
253
254 void r600_decompress_depth_textures(struct r600_context *rctx,
255 struct r600_samplerview_state *textures)
256 {
257 unsigned i;
258 unsigned depth_texture_mask = textures->compressed_depthtex_mask;
259
260 while (depth_texture_mask) {
261 struct pipe_sampler_view *view;
262 struct r600_texture *tex;
263
264 i = u_bit_scan(&depth_texture_mask);
265
266 view = &textures->views[i]->base;
267 assert(view);
268
269 tex = (struct r600_texture *)view->texture;
270 assert(tex->is_depth && !tex->is_flushing_texture);
271
272 if (rctx->b.chip_class >= EVERGREEN ||
273 r600_can_read_depth(tex)) {
274 r600_blit_decompress_depth_in_place(rctx, tex,
275 view->u.tex.first_level, view->u.tex.last_level,
276 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
277 } else {
278 r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
279 view->u.tex.first_level, view->u.tex.last_level,
280 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
281 0, u_max_sample(&tex->resource.b.b));
282 }
283 }
284 }
285
286 static void r600_blit_decompress_color(struct pipe_context *ctx,
287 struct r600_texture *rtex,
288 unsigned first_level, unsigned last_level,
289 unsigned first_layer, unsigned last_layer)
290 {
291 struct r600_context *rctx = (struct r600_context *)ctx;
292 unsigned layer, level, checked_last_layer, max_layer;
293
294 if (!rtex->dirty_level_mask)
295 return;
296
297 for (level = first_level; level <= last_level; level++) {
298 if (!(rtex->dirty_level_mask & (1 << level)))
299 continue;
300
301 /* The smaller the mipmap level, the less layers there are
302 * as far as 3D textures are concerned. */
303 max_layer = util_max_layer(&rtex->resource.b.b, level);
304 checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
305
306 for (layer = first_layer; layer <= checked_last_layer; layer++) {
307 struct pipe_surface *cbsurf, surf_tmpl;
308
309 surf_tmpl.format = rtex->resource.b.b.format;
310 surf_tmpl.u.tex.level = level;
311 surf_tmpl.u.tex.first_layer = layer;
312 surf_tmpl.u.tex.last_layer = layer;
313 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
314
315 r600_blitter_begin(ctx, R600_DECOMPRESS);
316 util_blitter_custom_color(rctx->blitter, cbsurf,
317 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear);
318 r600_blitter_end(ctx);
319
320 pipe_surface_reference(&cbsurf, NULL);
321 }
322
323 /* The texture will always be dirty if some layers aren't flushed.
324 * I don't think this case occurs often though. */
325 if (first_layer == 0 && last_layer == max_layer) {
326 rtex->dirty_level_mask &= ~(1 << level);
327 }
328 }
329 }
330
331 void r600_decompress_color_textures(struct r600_context *rctx,
332 struct r600_samplerview_state *textures)
333 {
334 unsigned i;
335 unsigned mask = textures->compressed_colortex_mask;
336
337 while (mask) {
338 struct pipe_sampler_view *view;
339 struct r600_texture *tex;
340
341 i = u_bit_scan(&mask);
342
343 view = &textures->views[i]->base;
344 assert(view);
345
346 tex = (struct r600_texture *)view->texture;
347 assert(tex->cmask.size);
348
349 r600_blit_decompress_color(&rctx->b.b, tex,
350 view->u.tex.first_level, view->u.tex.last_level,
351 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
352 }
353 }
354
355 /* Helper for decompressing a portion of a color or depth resource before
356 * blitting if any decompression is needed.
357 * The driver doesn't decompress resources automatically while u_blitter is
358 * rendering. */
359 static bool r600_decompress_subresource(struct pipe_context *ctx,
360 struct pipe_resource *tex,
361 unsigned level,
362 unsigned first_layer, unsigned last_layer)
363 {
364 struct r600_context *rctx = (struct r600_context *)ctx;
365 struct r600_texture *rtex = (struct r600_texture*)tex;
366
367 if (rtex->is_depth && !rtex->is_flushing_texture) {
368 if (rctx->b.chip_class >= EVERGREEN ||
369 r600_can_read_depth(rtex)) {
370 r600_blit_decompress_depth_in_place(rctx, rtex,
371 level, level,
372 first_layer, last_layer);
373 } else {
374 if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
375 return false; /* error */
376
377 r600_blit_decompress_depth(ctx, rtex, NULL,
378 level, level,
379 first_layer, last_layer,
380 0, u_max_sample(tex));
381 }
382 } else if (rtex->cmask.size) {
383 r600_blit_decompress_color(ctx, rtex, level, level,
384 first_layer, last_layer);
385 }
386 return true;
387 }
388
389 static void r600_clear(struct pipe_context *ctx, unsigned buffers,
390 const union pipe_color_union *color,
391 double depth, unsigned stencil)
392 {
393 struct r600_context *rctx = (struct r600_context *)ctx;
394 struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
395
396 if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
397 evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
398 &buffers, color);
399 }
400
401 if (buffers & PIPE_CLEAR_COLOR) {
402 int i;
403
404 /* These buffers cannot use fast clear, make sure to disable expansion. */
405 for (i = 0; i < fb->nr_cbufs; i++) {
406 struct r600_texture *tex;
407
408 /* If not clearing this buffer, skip. */
409 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
410 continue;
411
412 if (!fb->cbufs[i])
413 continue;
414
415 tex = (struct r600_texture *)fb->cbufs[i]->texture;
416 if (tex->fmask.size == 0)
417 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
418 }
419 }
420
421 /* if hyperz enabled just clear hyperz */
422 if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
423 struct r600_texture *rtex;
424 unsigned level = fb->zsbuf->u.tex.level;
425
426 rtex = (struct r600_texture*)fb->zsbuf->texture;
427
428 /* We can't use hyperz fast clear if each slice of a texture
429 * array are clear to different value. To simplify code just
430 * disable fast clear for texture array.
431 */
432 /* Only use htile for first level */
433 if (rtex->htile_buffer && !level &&
434 fb->zsbuf->u.tex.first_layer == 0 &&
435 fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) {
436 if (rtex->depth_clear_value != depth) {
437 rtex->depth_clear_value = depth;
438 rctx->db_state.atom.dirty = true;
439 }
440 rctx->db_misc_state.htile_clear = true;
441 rctx->db_misc_state.atom.dirty = true;
442 }
443 }
444
445 r600_blitter_begin(ctx, R600_CLEAR);
446 util_blitter_clear(rctx->blitter, fb->width, fb->height,
447 util_framebuffer_get_num_layers(fb),
448 buffers, color, depth, stencil);
449 r600_blitter_end(ctx);
450
451 /* disable fast clear */
452 if (rctx->db_misc_state.htile_clear) {
453 rctx->db_misc_state.htile_clear = false;
454 rctx->db_misc_state.atom.dirty = true;
455 }
456 }
457
458 static void r600_clear_render_target(struct pipe_context *ctx,
459 struct pipe_surface *dst,
460 const union pipe_color_union *color,
461 unsigned dstx, unsigned dsty,
462 unsigned width, unsigned height)
463 {
464 struct r600_context *rctx = (struct r600_context *)ctx;
465
466 r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
467 util_blitter_clear_render_target(rctx->blitter, dst, color,
468 dstx, dsty, width, height);
469 r600_blitter_end(ctx);
470 }
471
472 static void r600_clear_depth_stencil(struct pipe_context *ctx,
473 struct pipe_surface *dst,
474 unsigned clear_flags,
475 double depth,
476 unsigned stencil,
477 unsigned dstx, unsigned dsty,
478 unsigned width, unsigned height)
479 {
480 struct r600_context *rctx = (struct r600_context *)ctx;
481
482 r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
483 util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil,
484 dstx, dsty, width, height);
485 r600_blitter_end(ctx);
486 }
487
488 static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
489 struct pipe_resource *src, const struct pipe_box *src_box)
490 {
491 struct r600_context *rctx = (struct r600_context*)ctx;
492
493 if (rctx->screen->b.has_cp_dma) {
494 r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
495 }
496 else if (rctx->screen->b.has_streamout &&
497 /* Require 4-byte alignment. */
498 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
499
500 r600_blitter_begin(ctx, R600_COPY_BUFFER);
501 util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width);
502 r600_blitter_end(ctx);
503 } else {
504 util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
505 }
506
507 /* The index buffer (VGT) doesn't seem to see the result of the copying.
508 * Can we somehow flush the index buffer cache? Starting a new IB seems
509 * to do the trick. */
510 if (rctx->b.chip_class <= R700)
511 rctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
512 }
513
514 /**
515 * Global buffers are not really resources, they are are actually offsets
516 * into a single global resource (r600_screen::global_pool). The means
517 * they don't have their own cs_buf handle, so they cannot be passed
518 * to r600_copy_buffer() and must be handled separately.
519 */
520 static void r600_copy_global_buffer(struct pipe_context *ctx,
521 struct pipe_resource *dst, unsigned
522 dstx, struct pipe_resource *src,
523 const struct pipe_box *src_box)
524 {
525 struct r600_context *rctx = (struct r600_context*)ctx;
526 struct compute_memory_pool *pool = rctx->screen->global_pool;
527 struct pipe_box new_src_box = *src_box;
528
529 if (src->bind & PIPE_BIND_GLOBAL) {
530 struct r600_resource_global *rsrc =
531 (struct r600_resource_global *)src;
532 struct compute_memory_item *item = rsrc->chunk;
533
534 if (is_item_in_pool(item)) {
535 new_src_box.x += 4 * item->start_in_dw;
536 src = (struct pipe_resource *)pool->bo;
537 } else {
538 if (item->real_buffer == NULL) {
539 item->real_buffer = (struct r600_resource*)
540 r600_compute_buffer_alloc_vram(pool->screen,
541 item->size_in_dw * 4);
542 }
543 src = (struct pipe_resource*)item->real_buffer;
544 }
545 }
546 if (dst->bind & PIPE_BIND_GLOBAL) {
547 struct r600_resource_global *rdst =
548 (struct r600_resource_global *)dst;
549 struct compute_memory_item *item = rdst->chunk;
550
551 if (is_item_in_pool(item)) {
552 dstx += 4 * item->start_in_dw;
553 dst = (struct pipe_resource *)pool->bo;
554 } else {
555 if (item->real_buffer == NULL) {
556 item->real_buffer = (struct r600_resource*)
557 r600_compute_buffer_alloc_vram(pool->screen,
558 item->size_in_dw * 4);
559 }
560 dst = (struct pipe_resource*)item->real_buffer;
561 }
562 }
563
564 r600_copy_buffer(ctx, dst, dstx, src, &new_src_box);
565 }
566
567 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
568 unsigned offset, unsigned size, unsigned value)
569 {
570 struct r600_context *rctx = (struct r600_context*)ctx;
571
572 if (rctx->screen->b.has_cp_dma &&
573 rctx->b.chip_class >= EVERGREEN &&
574 offset % 4 == 0 && size % 4 == 0) {
575 evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value);
576 } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
577 union pipe_color_union clear_value;
578 clear_value.ui[0] = value;
579
580 r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND);
581 util_blitter_clear_buffer(rctx->blitter, dst, offset, size,
582 1, &clear_value);
583 r600_blitter_end(ctx);
584 } else {
585 uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
586 PIPE_TRANSFER_WRITE);
587 size /= 4;
588 for (unsigned i = 0; i < size; i++)
589 *map++ = value;
590 }
591 }
592
593 void r600_resource_copy_region(struct pipe_context *ctx,
594 struct pipe_resource *dst,
595 unsigned dst_level,
596 unsigned dstx, unsigned dsty, unsigned dstz,
597 struct pipe_resource *src,
598 unsigned src_level,
599 const struct pipe_box *src_box)
600 {
601 struct r600_context *rctx = (struct r600_context *)ctx;
602 struct pipe_surface *dst_view, dst_templ;
603 struct pipe_sampler_view src_templ, *src_view;
604 unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
605 unsigned src_force_level = 0;
606 struct pipe_box sbox, dstbox;
607
608 /* Handle buffers first. */
609 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
610 if ((src->bind & PIPE_BIND_GLOBAL) ||
611 (dst->bind & PIPE_BIND_GLOBAL)) {
612 r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
613 } else {
614 r600_copy_buffer(ctx, dst, dstx, src, src_box);
615 }
616 return;
617 }
618
619 assert(u_max_sample(dst) == u_max_sample(src));
620
621 /* The driver doesn't decompress resources automatically while
622 * u_blitter is rendering. */
623 if (!r600_decompress_subresource(ctx, src, src_level,
624 src_box->z, src_box->z + src_box->depth - 1)) {
625 return; /* error */
626 }
627
628 dst_width = u_minify(dst->width0, dst_level);
629 dst_height = u_minify(dst->height0, dst_level);
630 src_width0 = src->width0;
631 src_height0 = src->height0;
632 src_widthFL = u_minify(src->width0, src_level);
633 src_heightFL = u_minify(src->height0, src_level);
634
635 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
636 util_blitter_default_src_texture(&src_templ, src, src_level);
637
638 if (util_format_is_compressed(src->format)) {
639 unsigned blocksize = util_format_get_blocksize(src->format);
640
641 if (blocksize == 8)
642 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
643 else
644 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
645 dst_templ.format = src_templ.format;
646
647 dst_width = util_format_get_nblocksx(dst->format, dst_width);
648 dst_height = util_format_get_nblocksy(dst->format, dst_height);
649 src_width0 = util_format_get_nblocksx(src->format, src_width0);
650 src_height0 = util_format_get_nblocksy(src->format, src_height0);
651 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
652 src_heightFL = util_format_get_nblocksy(src->format, src_heightFL);
653
654 dstx = util_format_get_nblocksx(dst->format, dstx);
655 dsty = util_format_get_nblocksy(dst->format, dsty);
656
657 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
658 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
659 sbox.z = src_box->z;
660 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
661 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
662 sbox.depth = src_box->depth;
663 src_box = &sbox;
664
665 src_force_level = src_level;
666 } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
667 if (util_format_is_subsampled_422(src->format)) {
668
669 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
670 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
671
672 dst_width = util_format_get_nblocksx(dst->format, dst_width);
673 src_width0 = util_format_get_nblocksx(src->format, src_width0);
674 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
675
676 dstx = util_format_get_nblocksx(dst->format, dstx);
677
678 sbox = *src_box;
679 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
680 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
681 src_box = &sbox;
682 } else {
683 unsigned blocksize = util_format_get_blocksize(src->format);
684
685 switch (blocksize) {
686 case 1:
687 dst_templ.format = PIPE_FORMAT_R8_UNORM;
688 src_templ.format = PIPE_FORMAT_R8_UNORM;
689 break;
690 case 2:
691 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
692 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
693 break;
694 case 4:
695 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
696 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
697 break;
698 case 8:
699 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
700 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
701 break;
702 case 16:
703 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
704 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
705 break;
706 default:
707 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
708 util_format_short_name(src->format), blocksize);
709 assert(0);
710 }
711 }
712 }
713
714 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ, dst_width, dst_height);
715
716 if (rctx->b.chip_class >= EVERGREEN) {
717 src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ,
718 src_width0, src_height0,
719 src_force_level);
720 } else {
721 src_view = r600_create_sampler_view_custom(ctx, src, &src_templ,
722 src_widthFL, src_heightFL);
723 }
724
725 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
726 abs(src_box->depth), &dstbox);
727
728 /* Copy. */
729 r600_blitter_begin(ctx, R600_COPY_TEXTURE);
730 util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
731 src_view, src_box, src_width0, src_height0,
732 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL);
733 r600_blitter_end(ctx);
734
735 pipe_surface_reference(&dst_view, NULL);
736 pipe_sampler_view_reference(&src_view, NULL);
737 }
738
739 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
740 static enum pipe_format int_to_norm_format(enum pipe_format format)
741 {
742 switch (format) {
743 #define REPLACE_FORMAT_SIGN(format,sign) \
744 case PIPE_FORMAT_##format##_##sign##INT: \
745 return PIPE_FORMAT_##format##_##sign##NORM
746 #define REPLACE_FORMAT(format) \
747 REPLACE_FORMAT_SIGN(format, U); \
748 REPLACE_FORMAT_SIGN(format, S)
749
750 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
751 REPLACE_FORMAT(R8);
752 REPLACE_FORMAT(R8G8);
753 REPLACE_FORMAT(R8G8B8X8);
754 REPLACE_FORMAT(R8G8B8A8);
755 REPLACE_FORMAT(A8);
756 REPLACE_FORMAT(I8);
757 REPLACE_FORMAT(L8);
758 REPLACE_FORMAT(L8A8);
759 REPLACE_FORMAT(R16);
760 REPLACE_FORMAT(R16G16);
761 REPLACE_FORMAT(R16G16B16X16);
762 REPLACE_FORMAT(R16G16B16A16);
763 REPLACE_FORMAT(A16);
764 REPLACE_FORMAT(I16);
765 REPLACE_FORMAT(L16);
766 REPLACE_FORMAT(L16A16);
767
768 #undef REPLACE_FORMAT
769 #undef REPLACE_FORMAT_SIGN
770 default:
771 return format;
772 }
773 }
774
775 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
776 const struct pipe_blit_info *info)
777 {
778 struct r600_context *rctx = (struct r600_context*)ctx;
779 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
780 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
781 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
782 enum pipe_format format = int_to_norm_format(info->dst.format);
783 unsigned sample_mask =
784 rctx->b.chip_class == CAYMAN ? ~0 :
785 ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);
786
787 if (info->src.resource->nr_samples > 1 &&
788 info->dst.resource->nr_samples <= 1 &&
789 util_max_layer(info->src.resource, 0) == 0 &&
790 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
791 info->dst.format == info->src.format &&
792 !util_format_is_pure_integer(format) &&
793 !util_format_is_depth_or_stencil(format) &&
794 !info->scissor_enable &&
795 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
796 dst_width == info->src.resource->width0 &&
797 dst_height == info->src.resource->height0 &&
798 info->dst.box.x == 0 &&
799 info->dst.box.y == 0 &&
800 info->dst.box.width == dst_width &&
801 info->dst.box.height == dst_height &&
802 info->dst.box.depth == 1 &&
803 info->src.box.x == 0 &&
804 info->src.box.y == 0 &&
805 info->src.box.width == dst_width &&
806 info->src.box.height == dst_height &&
807 info->src.box.depth == 1 &&
808 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
809 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
810 r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
811 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
812 util_blitter_custom_resolve_color(rctx->blitter,
813 info->dst.resource, info->dst.level,
814 info->dst.box.z,
815 info->src.resource, info->src.box.z,
816 sample_mask, rctx->custom_blend_resolve,
817 format);
818 r600_blitter_end(ctx);
819 return true;
820 }
821 return false;
822 }
823
824 static void r600_blit(struct pipe_context *ctx,
825 const struct pipe_blit_info *info)
826 {
827 struct r600_context *rctx = (struct r600_context*)ctx;
828
829 if (do_hardware_msaa_resolve(ctx, info)) {
830 return;
831 }
832
833 assert(util_blitter_is_blit_supported(rctx->blitter, info));
834
835 /* The driver doesn't decompress resources automatically while
836 * u_blitter is rendering. */
837 if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level,
838 info->src.box.z,
839 info->src.box.z + info->src.box.depth - 1)) {
840 return; /* error */
841 }
842
843 if (rctx->screen->b.debug_flags & DBG_FORCE_DMA &&
844 util_try_blit_via_copy_region(ctx, info))
845 return;
846
847 r600_blitter_begin(ctx, R600_BLIT |
848 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
849 util_blitter_blit(rctx->blitter, info);
850 r600_blitter_end(ctx);
851 }
852
853 static void r600_flush_resource(struct pipe_context *ctx,
854 struct pipe_resource *res)
855 {
856 struct r600_texture *rtex = (struct r600_texture*)res;
857
858 assert(res->target != PIPE_BUFFER);
859
860 if (!rtex->is_depth && rtex->cmask.size) {
861 r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
862 0, util_max_layer(res, 0));
863 }
864 }
865
866 void r600_init_blit_functions(struct r600_context *rctx)
867 {
868 rctx->b.b.clear = r600_clear;
869 rctx->b.b.clear_render_target = r600_clear_render_target;
870 rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil;
871 rctx->b.b.resource_copy_region = r600_resource_copy_region;
872 rctx->b.b.blit = r600_blit;
873 rctx->b.b.flush_resource = r600_flush_resource;
874 rctx->b.clear_buffer = r600_clear_buffer;
875 rctx->b.blit_decompress_depth = r600_blit_decompress_depth;
876 }