2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Corbin Simpson <MostAwesomeDude@gmail.com>
27 #include "r600_pipe.h"
28 #include "util/u_upload_mgr.h"
29 #include "util/u_memory.h"
30 #include "util/u_surface.h"
32 static void r600_buffer_destroy(struct pipe_screen
*screen
,
33 struct pipe_resource
*buf
)
35 struct r600_resource
*rbuffer
= r600_resource(buf
);
37 util_range_destroy(&rbuffer
->valid_buffer_range
);
38 pb_reference(&rbuffer
->buf
, NULL
);
42 static void r600_set_constants_dirty_if_bound(struct r600_context
*rctx
,
43 struct r600_resource
*rbuffer
)
47 for (shader
= 0; shader
< PIPE_SHADER_TYPES
; shader
++) {
48 struct r600_constbuf_state
*state
= &rctx
->constbuf_state
[shader
];
50 uint32_t mask
= state
->enabled_mask
;
53 unsigned i
= u_bit_scan(&mask
);
54 if (state
->cb
[i
].buffer
== &rbuffer
->b
.b
) {
56 state
->dirty_mask
|= 1 << i
;
60 r600_constant_buffers_dirty(rctx
, state
);
65 static void *r600_buffer_get_transfer(struct pipe_context
*ctx
,
66 struct pipe_resource
*resource
,
69 const struct pipe_box
*box
,
70 struct pipe_transfer
**ptransfer
,
71 void *data
, struct r600_resource
*staging
,
74 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
75 struct r600_transfer
*transfer
= util_slab_alloc(&rctx
->pool_transfers
);
77 transfer
->transfer
.resource
= resource
;
78 transfer
->transfer
.level
= level
;
79 transfer
->transfer
.usage
= usage
;
80 transfer
->transfer
.box
= *box
;
81 transfer
->transfer
.stride
= 0;
82 transfer
->transfer
.layer_stride
= 0;
83 transfer
->offset
= offset
;
84 transfer
->staging
= staging
;
85 *ptransfer
= &transfer
->transfer
;
89 static void *r600_buffer_transfer_map(struct pipe_context
*ctx
,
90 struct pipe_resource
*resource
,
93 const struct pipe_box
*box
,
94 struct pipe_transfer
**ptransfer
)
96 struct r600_context
*rctx
= (struct r600_context
*)ctx
;
97 struct r600_resource
*rbuffer
= r600_resource(resource
);
100 assert(box
->x
+ box
->width
<= resource
->width0
);
102 /* See if the buffer range being mapped has never been initialized,
103 * in which case it can be mapped unsynchronized. */
104 if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) &&
105 usage
& PIPE_TRANSFER_WRITE
&&
106 !util_ranges_intersect(&rbuffer
->valid_buffer_range
, box
->x
, box
->x
+ box
->width
)) {
107 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
110 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
&&
111 !(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
112 assert(usage
& PIPE_TRANSFER_WRITE
);
114 /* Check if mapping this buffer would cause waiting for the GPU. */
115 if (r600_rings_is_buffer_referenced(&rctx
->b
, rbuffer
->cs_buf
, RADEON_USAGE_READWRITE
) ||
116 rctx
->b
.ws
->buffer_is_busy(rbuffer
->buf
, RADEON_USAGE_READWRITE
)) {
119 /* Discard the buffer. */
120 pb_reference(&rbuffer
->buf
, NULL
);
122 /* Create a new one in the same pipe_resource. */
123 /* XXX We probably want a different alignment for buffers and textures. */
124 r600_init_resource(&rctx
->screen
->b
, rbuffer
, rbuffer
->b
.b
.width0
, 4096,
125 TRUE
, rbuffer
->b
.b
.usage
);
127 /* We changed the buffer, now we need to bind it where the old one was bound. */
128 /* Vertex buffers. */
129 mask
= rctx
->vertex_buffer_state
.enabled_mask
;
131 i
= u_bit_scan(&mask
);
132 if (rctx
->vertex_buffer_state
.vb
[i
].buffer
== &rbuffer
->b
.b
) {
133 rctx
->vertex_buffer_state
.dirty_mask
|= 1 << i
;
134 r600_vertex_buffers_dirty(rctx
);
137 /* Streamout buffers. */
138 for (i
= 0; i
< rctx
->b
.streamout
.num_targets
; i
++) {
139 if (rctx
->b
.streamout
.targets
[i
]->b
.buffer
== &rbuffer
->b
.b
) {
140 if (rctx
->b
.streamout
.begin_emitted
) {
141 r600_emit_streamout_end(&rctx
->b
);
143 rctx
->b
.streamout
.append_bitmask
= rctx
->b
.streamout
.enabled_mask
;
144 r600_streamout_buffers_dirty(&rctx
->b
);
147 /* Constant buffers. */
148 r600_set_constants_dirty_if_bound(rctx
, rbuffer
);
151 else if ((usage
& PIPE_TRANSFER_DISCARD_RANGE
) &&
152 !(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) &&
153 !(rctx
->screen
->b
.debug_flags
& DBG_NO_DISCARD_RANGE
) &&
154 (rctx
->screen
->b
.has_cp_dma
||
155 (rctx
->screen
->b
.has_streamout
&&
156 /* The buffer range must be aligned to 4 with streamout. */
157 box
->x
% 4 == 0 && box
->width
% 4 == 0))) {
158 assert(usage
& PIPE_TRANSFER_WRITE
);
160 /* Check if mapping this buffer would cause waiting for the GPU. */
161 if (r600_rings_is_buffer_referenced(&rctx
->b
, rbuffer
->cs_buf
, RADEON_USAGE_READWRITE
) ||
162 rctx
->b
.ws
->buffer_is_busy(rbuffer
->buf
, RADEON_USAGE_READWRITE
)) {
163 /* Do a wait-free write-only transfer using a temporary buffer. */
165 struct r600_resource
*staging
= NULL
;
167 u_upload_alloc(rctx
->uploader
, 0, box
->width
+ (box
->x
% R600_MAP_BUFFER_ALIGNMENT
),
168 &offset
, (struct pipe_resource
**)&staging
, (void**)&data
);
171 data
+= box
->x
% R600_MAP_BUFFER_ALIGNMENT
;
172 return r600_buffer_get_transfer(ctx
, resource
, level
, usage
, box
,
173 ptransfer
, data
, staging
, offset
);
178 /* mmap and synchronize with rings */
179 data
= r600_buffer_map_sync_with_rings(&rctx
->b
, rbuffer
, usage
);
185 return r600_buffer_get_transfer(ctx
, resource
, level
, usage
, box
,
186 ptransfer
, data
, NULL
, 0);
189 static void r600_buffer_transfer_unmap(struct pipe_context
*pipe
,
190 struct pipe_transfer
*transfer
)
192 struct r600_context
*rctx
= (struct r600_context
*)pipe
;
193 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
194 struct r600_resource
*rbuffer
= r600_resource(transfer
->resource
);
196 if (rtransfer
->staging
) {
197 struct pipe_resource
*dst
, *src
;
198 unsigned soffset
, doffset
, size
;
201 dst
= transfer
->resource
;
202 src
= &rtransfer
->staging
->b
.b
;
203 size
= transfer
->box
.width
;
204 doffset
= transfer
->box
.x
;
205 soffset
= rtransfer
->offset
+ transfer
->box
.x
% R600_MAP_BUFFER_ALIGNMENT
;
207 u_box_1d(soffset
, size
, &box
);
209 /* Copy the staging buffer into the original one. */
210 if (!(size
% 4) && !(doffset
% 4) && !(soffset
% 4) &&
211 rctx
->b
.dma_copy(pipe
, dst
, 0, doffset
, 0, 0, src
, 0, &box
)) {
214 pipe
->resource_copy_region(pipe
, dst
, 0, doffset
, 0, 0, src
, 0, &box
);
216 pipe_resource_reference((struct pipe_resource
**)&rtransfer
->staging
, NULL
);
219 if (transfer
->usage
& PIPE_TRANSFER_WRITE
) {
220 util_range_add(&rbuffer
->valid_buffer_range
, transfer
->box
.x
,
221 transfer
->box
.x
+ transfer
->box
.width
);
223 util_slab_free(&rctx
->pool_transfers
, transfer
);
226 static const struct u_resource_vtbl r600_buffer_vtbl
=
228 u_default_resource_get_handle
, /* get_handle */
229 r600_buffer_destroy
, /* resource_destroy */
230 r600_buffer_transfer_map
, /* transfer_map */
231 NULL
, /* transfer_flush_region */
232 r600_buffer_transfer_unmap
, /* transfer_unmap */
233 NULL
/* transfer_inline_write */
236 struct pipe_resource
*r600_buffer_create(struct pipe_screen
*screen
,
237 const struct pipe_resource
*templ
,
240 struct r600_screen
*rscreen
= (struct r600_screen
*)screen
;
241 struct r600_resource
*rbuffer
;
243 rbuffer
= MALLOC_STRUCT(r600_resource
);
245 rbuffer
->b
.b
= *templ
;
246 pipe_reference_init(&rbuffer
->b
.b
.reference
, 1);
247 rbuffer
->b
.b
.screen
= screen
;
248 rbuffer
->b
.vtbl
= &r600_buffer_vtbl
;
249 util_range_init(&rbuffer
->valid_buffer_range
);
251 if (!r600_init_resource(&rscreen
->b
, rbuffer
, templ
->width0
, alignment
, TRUE
, templ
->usage
)) {
255 return &rbuffer
->b
.b
;