src/gallium/drivers/r600/r600_buffer.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  *      Corbin Simpson <MostAwesomeDude@gmail.com>
  26  */
  27 #include <pipe/p_screen.h>
  28 #include <util/u_format.h>
  29 #include <util/u_math.h>
  30 #include <util/u_inlines.h>
  31 #include <util/u_memory.h>
  32 #include "state_tracker/drm_driver.h"
  33 #include "r600_screen.h"
  34 #include "r600_context.h"
  35 #include "r600_resource.h"
  36
  37 extern struct u_resource_vtbl r600_buffer_vtbl;
  38
  39 u32 r600_domain_from_usage(unsigned usage)
  40 {
  41         u32 domain = RADEON_GEM_DOMAIN_GTT;
  42
  43         if (usage & PIPE_BIND_RENDER_TARGET) {
  44             domain |= RADEON_GEM_DOMAIN_VRAM;
  45         }
  46         if (usage & PIPE_BIND_DEPTH_STENCIL) {
  47             domain |= RADEON_GEM_DOMAIN_VRAM;
  48         }
  49         if (usage & PIPE_BIND_SAMPLER_VIEW) {
  50             domain |= RADEON_GEM_DOMAIN_VRAM;
  51         }
  52         /* also need BIND_BLIT_SOURCE/DESTINATION ? */
  53         if (usage & PIPE_BIND_VERTEX_BUFFER) {
  54             domain |= RADEON_GEM_DOMAIN_GTT;
  55         }
  56         if (usage & PIPE_BIND_INDEX_BUFFER) {
  57             domain |= RADEON_GEM_DOMAIN_GTT;
  58         }
  59         if (usage & PIPE_BIND_CONSTANT_BUFFER) {
  60             domain |= RADEON_GEM_DOMAIN_VRAM;
  61         }
  62
  63         return domain;
  64 }
  65
  66 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
  67                                          const struct pipe_resource *templ)
  68 {
  69         struct r600_screen *rscreen = r600_screen(screen);
  70         struct r600_resource *rbuffer;
  71         struct radeon_ws_bo *bo;
  72         /* XXX We probably want a different alignment for buffers and textures. */
  73         unsigned alignment = 4096;
  74
  75         rbuffer = CALLOC_STRUCT(r600_resource);
  76         if (rbuffer == NULL)
  77                 return NULL;
  78
  79         rbuffer->base.b = *templ;
  80         pipe_reference_init(&rbuffer->base.b.reference, 1);
  81         rbuffer->base.b.screen = screen;
  82         rbuffer->base.vtbl = &r600_buffer_vtbl;
  83         rbuffer->size = rbuffer->base.b.width0;
  84         rbuffer->domain = r600_domain_from_usage(rbuffer->base.b.bind);
  85         bo = radeon_ws_bo(rscreen->rw, rbuffer->base.b.width0, alignment, rbuffer->base.b.bind);
  86         if (bo == NULL) {
  87                 FREE(rbuffer);
  88                 return NULL;
  89         }
  90         rbuffer->bo = bo;
  91         return &rbuffer->base.b;
  92 }
  93
  94 struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
  95                                               void *ptr, unsigned bytes,
  96                                               unsigned bind)
  97 {
  98         struct r600_resource *rbuffer;
  99         struct r600_screen *rscreen = r600_screen(screen);
 100         struct pipe_resource templ;
 101         void *data;
 102
 103         memset(&templ, 0, sizeof(struct pipe_resource));
 104         templ.target = PIPE_BUFFER;
 105         templ.format = PIPE_FORMAT_R8_UNORM;
 106         templ.usage = PIPE_USAGE_IMMUTABLE;
 107         templ.bind = bind;
 108         templ.width0 = bytes;
 109         templ.height0 = 1;
 110         templ.depth0 = 1;
 111
 112         rbuffer = (struct r600_resource*)r600_buffer_create(screen, &templ);
 113         if (rbuffer == NULL) {
 114                 return NULL;
 115         }
 116         data = radeon_ws_bo_map(rscreen->rw, rbuffer->bo, 0, NULL);
 117         memcpy(data, ptr, bytes);
 118         radeon_ws_bo_unmap(rscreen->rw, rbuffer->bo);
 119         return &rbuffer->base.b;
 120 }
 121
 122 static void r600_buffer_destroy(struct pipe_screen *screen,
 123                                 struct pipe_resource *buf)
 124 {
 125         struct r600_resource *rbuffer = (struct r600_resource*)buf;
 126         struct r600_screen *rscreen = r600_screen(screen);
 127
 128         if (rbuffer->bo) {
 129                 radeon_ws_bo_reference(rscreen->rw, &rbuffer->bo, NULL);
 130         }
 131         FREE(rbuffer);
 132 }
 133
 134 static void *r600_buffer_transfer_map(struct pipe_context *pipe,
 135                                       struct pipe_transfer *transfer)
 136 {
 137         struct r600_resource *rbuffer = (struct r600_resource*)transfer->resource;
 138         struct r600_screen *rscreen = r600_screen(pipe->screen);
 139         int write = 0;
 140         uint8_t *data;
 141
 142         if (transfer->usage & PIPE_TRANSFER_DONTBLOCK) {
 143                 /* FIXME */
 144         }
 145         if (transfer->usage & PIPE_TRANSFER_WRITE) {
 146                 write = 1;
 147         }
 148         data = radeon_ws_bo_map(rscreen->rw, rbuffer->bo, transfer->usage, r600_context(pipe));
 149         if (!data)
 150                 return NULL;
 151
 152         return (uint8_t*)data + transfer->box.x;
 153 }
 154
 155 static void r600_buffer_transfer_unmap(struct pipe_context *pipe,
 156                                         struct pipe_transfer *transfer)
 157 {
 158         struct r600_resource *rbuffer = (struct r600_resource*)transfer->resource;
 159         struct r600_screen *rscreen = r600_screen(pipe->screen);
 160
 161         radeon_ws_bo_unmap(rscreen->rw, rbuffer->bo);
 162 }
 163
 164 static void r600_buffer_transfer_flush_region(struct pipe_context *pipe,
 165                                               struct pipe_transfer *transfer,
 166                                               const struct pipe_box *box)
 167 {
 168 }
 169
 170 unsigned r600_buffer_is_referenced_by_cs(struct pipe_context *context,
 171                                          struct pipe_resource *buf,
 172                                          unsigned face, unsigned level)
 173 {
 174         /* FIXME */
 175         return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
 176 }
 177
 178 struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen,
 179                                               struct winsys_handle *whandle)
 180 {
 181         struct radeon *rw = (struct radeon*)screen->winsys;
 182         struct r600_resource *rbuffer;
 183         struct radeon_ws_bo *bo = NULL;
 184
 185         bo = radeon_ws_bo_handle(rw, whandle->handle);
 186         if (bo == NULL) {
 187                 return NULL;
 188         }
 189
 190         rbuffer = CALLOC_STRUCT(r600_resource);
 191         if (rbuffer == NULL) {
 192                 radeon_ws_bo_reference(rw, &bo, NULL);
 193                 return NULL;
 194         }
 195
 196         pipe_reference_init(&rbuffer->base.b.reference, 1);
 197         rbuffer->base.b.target = PIPE_BUFFER;
 198         rbuffer->base.b.screen = screen;
 199         rbuffer->base.vtbl = &r600_buffer_vtbl;
 200         rbuffer->bo = bo;
 201         return &rbuffer->base.b;
 202 }
 203
 204 struct u_resource_vtbl r600_buffer_vtbl =
 205 {
 206         u_default_resource_get_handle,          /* get_handle */
 207         r600_buffer_destroy,                    /* resource_destroy */
 208         r600_buffer_is_referenced_by_cs,        /* is_buffer_referenced */
 209         u_default_get_transfer,                 /* get_transfer */
 210         u_default_transfer_destroy,             /* transfer_destroy */
 211         r600_buffer_transfer_map,               /* transfer_map */
 212         r600_buffer_transfer_flush_region,      /* transfer_flush_region */
 213         r600_buffer_transfer_unmap,             /* transfer_unmap */
 214         u_default_transfer_inline_write         /* transfer_inline_write */
 215 };