Merge remote branch 'origin/master' into pipe-video
[mesa.git] / src / gallium / drivers / r600 / r600_buffer.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 * Corbin Simpson <MostAwesomeDude@gmail.com>
26 */
27 #include <pipe/p_screen.h>
28 #include <util/u_format.h>
29 #include <util/u_math.h>
30 #include <util/u_inlines.h>
31 #include <util/u_memory.h>
32 #include <util/u_upload_mgr.h>
33 #include "state_tracker/drm_driver.h"
34 #include <xf86drm.h>
35 #include "radeon_drm.h"
36 #include "r600.h"
37 #include "r600_pipe.h"
38
39 extern struct u_resource_vtbl r600_buffer_vtbl;
40
41
42 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
43 const struct pipe_resource *templ)
44 {
45 struct r600_resource_buffer *rbuffer;
46 struct r600_bo *bo;
47 /* XXX We probably want a different alignment for buffers and textures. */
48 unsigned alignment = 4096;
49
50 rbuffer = CALLOC_STRUCT(r600_resource_buffer);
51 if (rbuffer == NULL)
52 return NULL;
53
54 rbuffer->magic = R600_BUFFER_MAGIC;
55 rbuffer->user_buffer = NULL;
56 rbuffer->num_ranges = 0;
57 rbuffer->r.base.b = *templ;
58 pipe_reference_init(&rbuffer->r.base.b.reference, 1);
59 rbuffer->r.base.b.screen = screen;
60 rbuffer->r.base.vtbl = &r600_buffer_vtbl;
61 rbuffer->r.size = rbuffer->r.base.b.width0;
62 bo = r600_bo((struct radeon*)screen->winsys, rbuffer->r.base.b.width0, alignment, rbuffer->r.base.b.bind, rbuffer->r.base.b.usage);
63 if (bo == NULL) {
64 FREE(rbuffer);
65 return NULL;
66 }
67 rbuffer->r.bo = bo;
68 return &rbuffer->r.base.b;
69 }
70
71 struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
72 void *ptr, unsigned bytes,
73 unsigned bind)
74 {
75 struct r600_resource_buffer *rbuffer;
76
77 rbuffer = CALLOC_STRUCT(r600_resource_buffer);
78 if (rbuffer == NULL)
79 return NULL;
80
81 rbuffer->magic = R600_BUFFER_MAGIC;
82 pipe_reference_init(&rbuffer->r.base.b.reference, 1);
83 rbuffer->r.base.vtbl = &r600_buffer_vtbl;
84 rbuffer->r.base.b.screen = screen;
85 rbuffer->r.base.b.target = PIPE_BUFFER;
86 rbuffer->r.base.b.format = PIPE_FORMAT_R8_UNORM;
87 rbuffer->r.base.b.usage = PIPE_USAGE_IMMUTABLE;
88 rbuffer->r.base.b.bind = bind;
89 rbuffer->r.base.b.width0 = bytes;
90 rbuffer->r.base.b.height0 = 1;
91 rbuffer->r.base.b.depth0 = 1;
92 rbuffer->r.base.b.flags = 0;
93 rbuffer->num_ranges = 0;
94 rbuffer->r.bo = NULL;
95 rbuffer->user_buffer = ptr;
96 return &rbuffer->r.base.b;
97 }
98
99 static void r600_buffer_destroy(struct pipe_screen *screen,
100 struct pipe_resource *buf)
101 {
102 struct r600_resource_buffer *rbuffer = r600_buffer(buf);
103
104 if (rbuffer->r.bo) {
105 r600_bo_reference((struct radeon*)screen->winsys, &rbuffer->r.bo, NULL);
106 }
107 FREE(rbuffer);
108 }
109
110 static void *r600_buffer_transfer_map(struct pipe_context *pipe,
111 struct pipe_transfer *transfer)
112 {
113 struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
114 int write = 0;
115 uint8_t *data;
116 int i;
117 boolean flush = FALSE;
118
119 if (rbuffer->user_buffer)
120 return (uint8_t*)rbuffer->user_buffer + transfer->box.x;
121
122 if (transfer->usage & PIPE_TRANSFER_DISCARD) {
123 for (i = 0; i < rbuffer->num_ranges; i++) {
124 if ((transfer->box.x >= rbuffer->ranges[i].start) &&
125 (transfer->box.x < rbuffer->ranges[i].end))
126 flush = TRUE;
127
128 if (flush) {
129 r600_bo_reference((struct radeon*)pipe->winsys, &rbuffer->r.bo, NULL);
130 rbuffer->num_ranges = 0;
131 rbuffer->r.bo = r600_bo((struct radeon*)pipe->winsys,
132 rbuffer->r.base.b.width0, 0,
133 rbuffer->r.base.b.bind,
134 rbuffer->r.base.b.usage);
135 break;
136 }
137 }
138 }
139 if (transfer->usage & PIPE_TRANSFER_DONTBLOCK) {
140 /* FIXME */
141 }
142 if (transfer->usage & PIPE_TRANSFER_WRITE) {
143 write = 1;
144 }
145 data = r600_bo_map((struct radeon*)pipe->winsys, rbuffer->r.bo, transfer->usage, pipe);
146 if (!data)
147 return NULL;
148
149 return (uint8_t*)data + transfer->box.x;
150 }
151
152 static void r600_buffer_transfer_unmap(struct pipe_context *pipe,
153 struct pipe_transfer *transfer)
154 {
155 struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
156
157 if (rbuffer->r.bo)
158 r600_bo_unmap((struct radeon*)pipe->winsys, rbuffer->r.bo);
159 }
160
161 static void r600_buffer_transfer_flush_region(struct pipe_context *pipe,
162 struct pipe_transfer *transfer,
163 const struct pipe_box *box)
164 {
165 struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
166 unsigned i;
167 unsigned offset = transfer->box.x + box->x;
168 unsigned length = box->width;
169
170 assert(box->x + box->width <= transfer->box.width);
171
172 if (rbuffer->user_buffer)
173 return;
174
175 /* mark the range as used */
176 for(i = 0; i < rbuffer->num_ranges; ++i) {
177 if(offset <= rbuffer->ranges[i].end && rbuffer->ranges[i].start <= (offset+box->width)) {
178 rbuffer->ranges[i].start = MIN2(rbuffer->ranges[i].start, offset);
179 rbuffer->ranges[i].end = MAX2(rbuffer->ranges[i].end, (offset+length));
180 return;
181 }
182 }
183
184 rbuffer->ranges[rbuffer->num_ranges].start = offset;
185 rbuffer->ranges[rbuffer->num_ranges].end = offset+length;
186 rbuffer->num_ranges++;
187 }
188
189 unsigned r600_buffer_is_referenced_by_cs(struct pipe_context *context,
190 struct pipe_resource *buf,
191 unsigned face, unsigned level)
192 {
193 /* FIXME */
194 return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
195 }
196
197 struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen,
198 struct winsys_handle *whandle)
199 {
200 struct radeon *rw = (struct radeon*)screen->winsys;
201 struct r600_resource *rbuffer;
202 struct r600_bo *bo = NULL;
203
204 bo = r600_bo_handle(rw, whandle->handle, NULL);
205 if (bo == NULL) {
206 return NULL;
207 }
208
209 rbuffer = CALLOC_STRUCT(r600_resource);
210 if (rbuffer == NULL) {
211 r600_bo_reference(rw, &bo, NULL);
212 return NULL;
213 }
214
215 pipe_reference_init(&rbuffer->base.b.reference, 1);
216 rbuffer->base.b.target = PIPE_BUFFER;
217 rbuffer->base.b.screen = screen;
218 rbuffer->base.vtbl = &r600_buffer_vtbl;
219 rbuffer->bo = bo;
220 return &rbuffer->base.b;
221 }
222
223 struct u_resource_vtbl r600_buffer_vtbl =
224 {
225 u_default_resource_get_handle, /* get_handle */
226 r600_buffer_destroy, /* resource_destroy */
227 r600_buffer_is_referenced_by_cs, /* is_buffer_referenced */
228 u_default_get_transfer, /* get_transfer */
229 u_default_transfer_destroy, /* transfer_destroy */
230 r600_buffer_transfer_map, /* transfer_map */
231 r600_buffer_transfer_flush_region, /* transfer_flush_region */
232 r600_buffer_transfer_unmap, /* transfer_unmap */
233 u_default_transfer_inline_write /* transfer_inline_write */
234 };
235
236 int r600_upload_index_buffer(struct r600_pipe_context *rctx, struct r600_drawl *draw)
237 {
238 struct pipe_resource *upload_buffer = NULL;
239 unsigned index_offset = draw->index_buffer_offset;
240 int ret = 0;
241
242 if (r600_buffer_is_user_buffer(draw->index_buffer)) {
243 ret = u_upload_buffer(rctx->upload_ib,
244 index_offset,
245 draw->count * draw->index_size,
246 draw->index_buffer,
247 &index_offset,
248 &upload_buffer);
249 if (ret) {
250 goto done;
251 }
252 draw->index_buffer_offset = index_offset;
253
254 /* Transfer ownership. */
255 pipe_resource_reference(&draw->index_buffer, upload_buffer);
256 pipe_resource_reference(&upload_buffer, NULL);
257 }
258
259 done:
260 return ret;
261 }
262
263 int r600_upload_user_buffers(struct r600_pipe_context *rctx)
264 {
265 enum pipe_error ret = PIPE_OK;
266 int i, nr;
267
268 nr = rctx->vertex_elements->count;
269
270 for (i = 0; i < nr; i++) {
271 struct pipe_vertex_buffer *vb =
272 &rctx->vertex_buffer[rctx->vertex_elements->elements[i].vertex_buffer_index];
273
274 if (r600_buffer_is_user_buffer(vb->buffer)) {
275 struct pipe_resource *upload_buffer = NULL;
276 unsigned offset = 0; /*vb->buffer_offset * 4;*/
277 unsigned size = vb->buffer->width0;
278 unsigned upload_offset;
279 ret = u_upload_buffer(rctx->upload_vb,
280 offset, size,
281 vb->buffer,
282 &upload_offset, &upload_buffer);
283 if (ret)
284 return ret;
285
286 pipe_resource_reference(&vb->buffer, NULL);
287 vb->buffer = upload_buffer;
288 vb->buffer_offset = upload_offset;
289 }
290 }
291 return ret;
292 }