src/gallium/drivers/r600/r600_buffer.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  *      Corbin Simpson <MostAwesomeDude@gmail.com>
  26  */
  27 #include <pipe/p_screen.h>
  28 #include <util/u_format.h>
  29 #include <util/u_math.h>
  30 #include <util/u_inlines.h>
  31 #include <util/u_memory.h>
  32 #include "state_tracker/drm_driver.h"
  33 #include "r600_screen.h"
  34 #include "r600_context.h"
  35 #include "r600_resource.h"
  36
  37 extern struct u_resource_vtbl r600_buffer_vtbl;
  38
  39 u32 r600_domain_from_usage(unsigned usage)
  40 {
  41         u32 domain = RADEON_GEM_DOMAIN_GTT;
  42
  43         if (usage & PIPE_BIND_RENDER_TARGET) {
  44             domain |= RADEON_GEM_DOMAIN_VRAM;
  45         }
  46         if (usage & PIPE_BIND_DEPTH_STENCIL) {
  47             domain |= RADEON_GEM_DOMAIN_VRAM;
  48         }
  49         if (usage & PIPE_BIND_SAMPLER_VIEW) {
  50             domain |= RADEON_GEM_DOMAIN_VRAM;
  51         }
  52         /* also need BIND_BLIT_SOURCE/DESTINATION ? */
  53         if (usage & PIPE_BIND_VERTEX_BUFFER) {
  54             domain |= RADEON_GEM_DOMAIN_GTT;
  55         }
  56         if (usage & PIPE_BIND_INDEX_BUFFER) {
  57             domain |= RADEON_GEM_DOMAIN_GTT;
  58         }
  59
  60         return domain;
  61 }
  62
  63 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
  64                                          const struct pipe_resource *templ)
  65 {
  66         struct r600_screen *rscreen = r600_screen(screen);
  67         struct r600_resource *rbuffer;
  68         struct radeon_bo *bo;
  69         struct pb_desc desc;
  70         /* XXX We probably want a different alignment for buffers and textures. */
  71         unsigned alignment = 4096;
  72
  73         rbuffer = CALLOC_STRUCT(r600_resource);
  74         if (rbuffer == NULL)
  75                 return NULL;
  76
  77         rbuffer->base.b = *templ;
  78         pipe_reference_init(&rbuffer->base.b.reference, 1);
  79         rbuffer->base.b.screen = screen;
  80         rbuffer->base.vtbl = &r600_buffer_vtbl;
  81
  82         if (rbuffer->base.b.bind & PIPE_BIND_CONSTANT_BUFFER) {
  83                 desc.alignment = alignment;
  84                 desc.usage = rbuffer->base.b.bind;
  85                 rbuffer->pb = pb_malloc_buffer_create(rbuffer->base.b.width0,
  86                                                       &desc);
  87                 if (rbuffer->pb == NULL) {
  88                         free(rbuffer);
  89                         return NULL;
  90                 }
  91                 return &rbuffer->base.b;
  92         }
  93         rbuffer->domain = r600_domain_from_usage(rbuffer->base.b.bind);
  94         bo = radeon_bo(rscreen->rw, 0, rbuffer->base.b.width0, alignment, NULL);
  95         if (bo == NULL) {
  96                 FREE(rbuffer);
  97                 return NULL;
  98         }
  99         rbuffer->bo = bo;
 100         return &rbuffer->base.b;
 101 }
 102
 103 struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
 104                                               void *ptr, unsigned bytes,
 105                                               unsigned bind)
 106 {
 107         struct r600_resource *rbuffer;
 108         struct r600_screen *rscreen = r600_screen(screen);
 109         struct pipe_resource templ;
 110
 111         memset(&templ, 0, sizeof(struct pipe_resource));
 112         templ.target = PIPE_BUFFER;
 113         templ.format = PIPE_FORMAT_R8_UNORM;
 114         templ.usage = PIPE_USAGE_IMMUTABLE;
 115         templ.bind = bind;
 116         templ.width0 = bytes;
 117         templ.height0 = 1;
 118         templ.depth0 = 1;
 119
 120         rbuffer = (struct r600_resource*)r600_buffer_create(screen, &templ);
 121         if (rbuffer == NULL) {
 122                 return NULL;
 123         }
 124         radeon_bo_map(rscreen->rw, rbuffer->bo);
 125         memcpy(rbuffer->bo->data, ptr, bytes);
 126         radeon_bo_unmap(rscreen->rw, rbuffer->bo);
 127         return &rbuffer->base.b;
 128 }
 129
 130 static void r600_buffer_destroy(struct pipe_screen *screen,
 131                                 struct pipe_resource *buf)
 132 {
 133         struct r600_resource *rbuffer = (struct r600_resource*)buf;
 134         struct r600_screen *rscreen = r600_screen(screen);
 135
 136         if (rbuffer->pb) {
 137                 pipe_reference_init(&rbuffer->pb->base.reference, 0);
 138                 pb_destroy(rbuffer->pb);
 139                 rbuffer->pb = NULL;
 140         }
 141         if (rbuffer->bo) {
 142                 radeon_bo_decref(rscreen->rw, rbuffer->bo);
 143         }
 144         memset(rbuffer, 0, sizeof(struct r600_resource));
 145         FREE(rbuffer);
 146 }
 147
 148 static void *r600_buffer_transfer_map(struct pipe_context *pipe,
 149                                       struct pipe_transfer *transfer)
 150 {
 151         struct r600_resource *rbuffer = (struct r600_resource*)transfer->resource;
 152         struct r600_screen *rscreen = r600_screen(pipe->screen);
 153         int write = 0;
 154
 155         if (rbuffer->pb) {
 156                 return (uint8_t*)pb_map(rbuffer->pb, transfer->usage) + transfer->box.x;
 157         }
 158         if (transfer->usage & PIPE_TRANSFER_DONTBLOCK) {
 159                 /* FIXME */
 160         }
 161         if (transfer->usage & PIPE_TRANSFER_WRITE) {
 162                 write = 1;
 163         }
 164         if (radeon_bo_map(rscreen->rw, rbuffer->bo)) {
 165                 return NULL;
 166         }
 167         return (uint8_t*)rbuffer->bo->data + transfer->box.x;
 168 }
 169
 170 static void r600_buffer_transfer_unmap(struct pipe_context *pipe,
 171                                         struct pipe_transfer *transfer)
 172 {
 173         struct r600_resource *rbuffer = (struct r600_resource*)transfer->resource;
 174         struct r600_screen *rscreen = r600_screen(pipe->screen);
 175
 176         if (rbuffer->pb) {
 177                 pb_unmap(rbuffer->pb);
 178         } else {
 179                 radeon_bo_unmap(rscreen->rw, rbuffer->bo);
 180         }
 181 }
 182
 183 static void r600_buffer_transfer_flush_region(struct pipe_context *pipe,
 184                                               struct pipe_transfer *transfer,
 185                                               const struct pipe_box *box)
 186 {
 187 }
 188
 189 unsigned r600_buffer_is_referenced_by_cs(struct pipe_context *context,
 190                                          struct pipe_resource *buf,
 191                                          unsigned face, unsigned level)
 192 {
 193         /* FIXME */
 194         return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
 195 }
 196
 197 struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen,
 198                                               struct winsys_handle *whandle)
 199 {
 200         struct radeon *rw = (struct radeon*)screen->winsys;
 201         struct r600_resource *rbuffer;
 202         struct radeon_bo *bo = NULL;
 203
 204         bo = radeon_bo(rw, whandle->handle, 0, 0, NULL);
 205         if (bo == NULL) {
 206                 return NULL;
 207         }
 208
 209         rbuffer = CALLOC_STRUCT(r600_resource);
 210         if (rbuffer == NULL) {
 211                 radeon_bo_decref(rw, bo);
 212                 return NULL;
 213         }
 214
 215         pipe_reference_init(&rbuffer->base.b.reference, 1);
 216         rbuffer->base.b.target = PIPE_BUFFER;
 217         rbuffer->base.b.screen = screen;
 218         rbuffer->base.vtbl = &r600_buffer_vtbl;
 219         rbuffer->bo = bo;
 220         return &rbuffer->base.b;
 221 }
 222
 223 struct u_resource_vtbl r600_buffer_vtbl =
 224 {
 225         u_default_resource_get_handle,          /* get_handle */
 226         r600_buffer_destroy,                    /* resource_destroy */
 227         r600_buffer_is_referenced_by_cs,        /* is_buffer_referenced */
 228         u_default_get_transfer,                 /* get_transfer */
 229         u_default_transfer_destroy,             /* transfer_destroy */
 230         r600_buffer_transfer_map,               /* transfer_map */
 231         r600_buffer_transfer_flush_region,      /* transfer_flush_region */
 232         r600_buffer_transfer_unmap,             /* transfer_unmap */
 233         u_default_transfer_inline_write         /* transfer_inline_write */
 234 };