r600g: add upload manager support.
[mesa.git] / src / gallium / drivers / r600 / r600_draw.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 * Corbin Simpson
26 */
27 #include <stdio.h>
28 #include <errno.h>
29 #include <pipe/p_screen.h>
30 #include <util/u_format.h>
31 #include <util/u_math.h>
32 #include <util/u_inlines.h>
33 #include <util/u_memory.h>
34 #include "radeon.h"
35 #include "r600_screen.h"
36 #include "r600_context.h"
37 #include "r600_resource.h"
38 #include "r600_state_inlines.h"
39
40 static int r600_draw_common(struct r600_draw *draw)
41 {
42 struct r600_context *rctx = r600_context(draw->ctx);
43 struct r600_screen *rscreen = rctx->screen;
44 /* FIXME vs_resource */
45 struct radeon_state *vs_resource;
46 struct r600_resource *rbuffer;
47 unsigned i, j, offset, format, prim;
48 u32 vgt_dma_index_type, vgt_draw_initiator;
49 struct pipe_vertex_buffer *vertex_buffer;
50 int r;
51
52 r = r600_context_hw_states(draw->ctx);
53 if (r)
54 return r;
55 switch (draw->index_size) {
56 case 2:
57 vgt_draw_initiator = S_0287F0_SOURCE_SELECT(V_0287F0_DI_SRC_SEL_DMA);
58 vgt_dma_index_type = 0;
59 break;
60 case 4:
61 vgt_draw_initiator = S_0287F0_SOURCE_SELECT(V_0287F0_DI_SRC_SEL_DMA);
62 vgt_dma_index_type = 1;
63 break;
64 case 0:
65 vgt_draw_initiator = S_0287F0_SOURCE_SELECT(V_0287F0_DI_SRC_SEL_AUTO_INDEX);
66 vgt_dma_index_type = 0;
67 break;
68 default:
69 fprintf(stderr, "%s %d unsupported index size %d\n", __func__, __LINE__, draw->index_size);
70 return -EINVAL;
71 }
72 r = r600_conv_pipe_prim(draw->mode, &prim);
73 if (r)
74 return r;
75
76 /* rebuild vertex shader if input format changed */
77 r = r600_pipe_shader_update(draw->ctx, rctx->vs_shader);
78 if (r)
79 return r;
80 r = r600_pipe_shader_update(draw->ctx, rctx->ps_shader);
81 if (r)
82 return r;
83 radeon_draw_bind(&rctx->draw, &rctx->vs_shader->rstate[0]);
84 radeon_draw_bind(&rctx->draw, &rctx->ps_shader->rstate[0]);
85
86 for (i = 0 ; i < rctx->vs_nresource; i++) {
87 radeon_state_fini(&rctx->vs_resource[i]);
88 }
89 for (i = 0 ; i < rctx->vertex_elements->count; i++) {
90 vs_resource = &rctx->vs_resource[i];
91 j = rctx->vertex_elements->elements[i].vertex_buffer_index;
92 vertex_buffer = &rctx->vertex_buffer[j];
93 rbuffer = (struct r600_resource*)vertex_buffer->buffer;
94 offset = rctx->vertex_elements->elements[i].src_offset + vertex_buffer->buffer_offset;
95 format = r600_translate_colorformat(rctx->vertex_elements->elements[i].src_format);
96
97 rctx->vtbl->vs_resource(rctx, i, rbuffer, offset, vertex_buffer->stride, format);
98 radeon_draw_bind(&rctx->draw, vs_resource);
99 }
100 rctx->vs_nresource = rctx->vertex_elements->count;
101 /* FIXME start need to change winsys */
102 rctx->vtbl->vgt_init(draw, vgt_draw_initiator);
103 radeon_draw_bind(&rctx->draw, &draw->draw);
104
105 rctx->vtbl->vgt_prim(draw, prim, vgt_dma_index_type);
106 radeon_draw_bind(&rctx->draw, &draw->vgt);
107
108 r = radeon_ctx_set_draw(rctx->ctx, &rctx->draw);
109 if (r == -EBUSY) {
110 r600_flush(draw->ctx, 0, NULL);
111 r = radeon_ctx_set_draw(rctx->ctx, &rctx->draw);
112 }
113
114 radeon_state_fini(&draw->draw);
115
116 return r;
117 }
118
119 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
120 {
121 struct r600_context *rctx = r600_context(ctx);
122 struct r600_draw draw;
123 int r;
124
125 assert(info->index_bias == 0);
126
127 memset(&draw, 0, sizeof(draw));
128
129 if (rctx->any_user_vbs) {
130 r600_upload_user_buffers(rctx);
131 rctx->any_user_vbs = false;
132 }
133
134 draw.ctx = ctx;
135 draw.mode = info->mode;
136 draw.start = info->start;
137 draw.count = info->count;
138 if (info->indexed && rctx->index_buffer.buffer) {
139 draw.min_index = info->min_index;
140 draw.max_index = info->max_index;
141 draw.index_size = rctx->index_buffer.index_size;
142 draw.index_buffer = rctx->index_buffer.buffer;
143 draw.index_buffer_offset = rctx->index_buffer.offset;
144
145 assert(rctx->index_buffer.offset %
146 rctx->index_buffer.index_size == 0);
147 r600_upload_index_buffer(rctx, &draw);
148 }
149 else {
150 draw.index_size = 0;
151 draw.index_buffer = NULL;
152 draw.min_index = 0;
153 draw.max_index = 0xffffff;
154 draw.index_buffer_offset = 0;
155 }
156 r = r600_draw_common(&draw);
157 if (r)
158 fprintf(stderr,"draw common failed %d\n", r);
159 }