r600g: Silence uninitialized variable warning.
[mesa.git] / src / gallium / drivers / r600 / r600_draw.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 * Corbin Simpson
26 */
27 #include <stdio.h>
28 #include <errno.h>
29 #include <pipe/p_screen.h>
30 #include <util/u_format.h>
31 #include <util/u_math.h>
32 #include <util/u_inlines.h>
33 #include <util/u_memory.h>
34 #include "radeon.h"
35 #include "r600_screen.h"
36 #include "r600_context.h"
37 #include "r600_resource.h"
38 #include "r600_state_inlines.h"
39
40 struct r600_draw {
41 struct pipe_context *ctx;
42 struct radeon_state draw;
43 struct radeon_state vgt;
44 unsigned mode;
45 unsigned start;
46 unsigned count;
47 unsigned index_size;
48 struct pipe_resource *index_buffer;
49 };
50
51 static int r600_draw_common(struct r600_draw *draw)
52 {
53 struct r600_context *rctx = r600_context(draw->ctx);
54 struct r600_screen *rscreen = rctx->screen;
55 /* FIXME vs_resource */
56 struct radeon_state *vs_resource;
57 struct r600_resource *rbuffer;
58 unsigned i, j, offset, format, prim;
59 u32 vgt_dma_index_type, vgt_draw_initiator;
60 struct pipe_vertex_buffer *vertex_buffer;
61 int r;
62
63 r = r600_context_hw_states(draw->ctx);
64 if (r)
65 return r;
66 switch (draw->index_size) {
67 case 2:
68 vgt_draw_initiator = 0;
69 vgt_dma_index_type = 0;
70 break;
71 case 4:
72 vgt_draw_initiator = 0;
73 vgt_dma_index_type = 1;
74 break;
75 case 0:
76 vgt_draw_initiator = 2;
77 vgt_dma_index_type = 0;
78 break;
79 default:
80 fprintf(stderr, "%s %d unsupported index size %d\n", __func__, __LINE__, draw->index_size);
81 return -EINVAL;
82 }
83 r = r600_conv_pipe_prim(draw->mode, &prim);
84 if (r)
85 return r;
86
87 /* rebuild vertex shader if input format changed */
88 r = r600_pipe_shader_update(draw->ctx, rctx->vs_shader);
89 if (r)
90 return r;
91 r = r600_pipe_shader_update(draw->ctx, rctx->ps_shader);
92 if (r)
93 return r;
94 radeon_draw_bind(&rctx->draw, &rctx->vs_shader->rstate[0]);
95 radeon_draw_bind(&rctx->draw, &rctx->ps_shader->rstate[0]);
96
97 for (i = 0 ; i < rctx->vs_nresource; i++) {
98 radeon_state_fini(&rctx->vs_resource[i]);
99 }
100 for (i = 0 ; i < rctx->vertex_elements->count; i++) {
101 vs_resource = &rctx->vs_resource[i];
102 j = rctx->vertex_elements->elements[i].vertex_buffer_index;
103 vertex_buffer = &rctx->vertex_buffer[j];
104 rbuffer = (struct r600_resource*)vertex_buffer->buffer;
105 offset = rctx->vertex_elements->elements[i].src_offset + vertex_buffer->buffer_offset;
106 format = r600_translate_colorformat(rctx->vertex_elements->elements[i].src_format);
107
108 rctx->vtbl->vs_resource(rctx, i, rbuffer, offset, vertex_buffer->stride, format);
109 radeon_draw_bind(&rctx->draw, vs_resource);
110 }
111 rctx->vs_nresource = rctx->vertex_elements->count;
112 /* FIXME start need to change winsys */
113 rctx->vtbl->vgt_init(rctx, &draw->draw, (struct r600_resource *)draw->index_buffer,
114 draw->count, vgt_draw_initiator);
115 radeon_draw_bind(&rctx->draw, &draw->draw);
116
117 rctx->vtbl->vgt_prim(rctx, &draw->vgt, prim, draw->start, vgt_dma_index_type);
118 radeon_draw_bind(&rctx->draw, &draw->vgt);
119
120 r = radeon_ctx_set_draw(&rctx->ctx, &rctx->draw);
121 if (r == -EBUSY) {
122 r600_flush(draw->ctx, 0, NULL);
123 r = radeon_ctx_set_draw(&rctx->ctx, &rctx->draw);
124 }
125
126 radeon_state_fini(&draw->draw);
127
128 return r;
129 }
130
131 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
132 {
133 struct r600_context *rctx = r600_context(ctx);
134 struct r600_draw draw;
135 int r;
136
137 assert(info->index_bias == 0);
138
139 memset(&draw, 0, sizeof(draw));
140
141 draw.ctx = ctx;
142 draw.mode = info->mode;
143 draw.start = info->start;
144 draw.count = info->count;
145 if (info->indexed && rctx->index_buffer.buffer) {
146 draw.index_size = rctx->index_buffer.index_size;
147 draw.index_buffer = rctx->index_buffer.buffer;
148
149 assert(rctx->index_buffer.offset %
150 rctx->index_buffer.index_size == 0);
151 draw.start += rctx->index_buffer.offset /
152 rctx->index_buffer.index_size;
153 }
154 else {
155 draw.index_size = 0;
156 draw.index_buffer = NULL;
157 }
158 r = r600_draw_common(&draw);
159 if (r)
160 fprintf(stderr,"draw common failed %d\n", r);
161 }