src/gallium/drivers/r600/r600_formats.h

   1 #ifndef R600_FORMATS_H
   2 #define R600_FORMATS_H
   3
   4 #include "r600_pipe.h"
   5
   6 /* list of formats from R700 ISA document - apply across GPUs in different registers */
   7 #define     FMT_INVALID                     0x00000000
   8 #define     FMT_8                           0x00000001
   9 #define     FMT_4_4                         0x00000002
  10 #define     FMT_3_3_2                       0x00000003
  11 #define     FMT_16                          0x00000005
  12 #define     FMT_16_FLOAT                    0x00000006
  13 #define     FMT_8_8                         0x00000007
  14 #define     FMT_5_6_5                       0x00000008
  15 #define     FMT_6_5_5                       0x00000009
  16 #define     FMT_1_5_5_5                     0x0000000A
  17 #define     FMT_4_4_4_4                     0x0000000B
  18 #define     FMT_5_5_5_1                     0x0000000C
  19 #define     FMT_32                          0x0000000D
  20 #define     FMT_32_FLOAT                    0x0000000E
  21 #define     FMT_16_16                       0x0000000F
  22 #define     FMT_16_16_FLOAT                 0x00000010
  23 #define     FMT_8_24                        0x00000011
  24 #define     FMT_8_24_FLOAT                  0x00000012
  25 #define     FMT_24_8                        0x00000013
  26 #define     FMT_24_8_FLOAT                  0x00000014
  27 #define     FMT_10_11_11                    0x00000015
  28 #define     FMT_10_11_11_FLOAT              0x00000016
  29 #define     FMT_11_11_10                    0x00000017
  30 #define     FMT_11_11_10_FLOAT              0x00000018
  31 #define     FMT_2_10_10_10                  0x00000019
  32 #define     FMT_8_8_8_8                     0x0000001A
  33 #define     FMT_10_10_10_2                  0x0000001B
  34 #define     FMT_X24_8_32_FLOAT              0x0000001C
  35 #define     FMT_32_32                       0x0000001D
  36 #define     FMT_32_32_FLOAT                 0x0000001E
  37 #define     FMT_16_16_16_16                 0x0000001F
  38 #define     FMT_16_16_16_16_FLOAT           0x00000020
  39 #define     FMT_32_32_32_32                 0x00000022
  40 #define     FMT_32_32_32_32_FLOAT           0x00000023
  41 #define     FMT_1                           0x00000025
  42 #define     FMT_GB_GR                       0x00000027
  43 #define     FMT_BG_RG                       0x00000028
  44 #define     FMT_32_AS_8                     0x00000029
  45 #define     FMT_32_AS_8_8                   0x0000002a
  46 #define     FMT_5_9_9_9_SHAREDEXP           0x0000002b
  47 #define     FMT_8_8_8                       0x0000002c
  48 #define     FMT_16_16_16                    0x0000002d
  49 #define     FMT_16_16_16_FLOAT              0x0000002e
  50 #define     FMT_32_32_32                    0x0000002f
  51 #define     FMT_32_32_32_FLOAT              0x00000030
  52 #define     FMT_BC1                         0x00000031
  53 #define     FMT_BC2                         0x00000032
  54 #define     FMT_BC3                         0x00000033
  55 #define     FMT_BC4                         0x00000034
  56 #define     FMT_BC5                         0x00000035
  57
  58 #define     ENDIAN_NONE                     0
  59 #define     ENDIAN_8IN16                    1
  60 #define     ENDIAN_8IN32                    2
  61 #define     ENDIAN_8IN64                    3
  62
  63 static INLINE unsigned r600_endian_swap(unsigned size)
  64 {
  65         if (R600_BIG_ENDIAN) {
  66                 switch (size) {
  67                 case 64:
  68                         return ENDIAN_8IN64;
  69                 case 32:
  70                         return ENDIAN_8IN32;
  71                 case 16:
  72                         return ENDIAN_8IN16;
  73                 default:
  74                         return ENDIAN_NONE;
  75                 }
  76         } else {
  77                 return ENDIAN_NONE;
  78         }
  79 }
  80
  81 #endif