src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include "util/u_format.h"
  34 #include <util/u_format_s3tc.h>
  35 #include <util/u_transfer.h>
  36 #include <util/u_surface.h>
  37 #include <util/u_pack_color.h>
  38 #include <util/u_memory.h>
  39 #include <util/u_inlines.h>
  40 #include "util/u_upload_mgr.h"
  41 #include <vl/vl_decoder.h>
  42 #include <vl/vl_video_buffer.h>
  43 #include "os/os_time.h"
  44 #include <pipebuffer/pb_buffer.h>
  45 #include "r600.h"
  46 #include "r600d.h"
  47 #include "r600_resource.h"
  48 #include "r600_shader.h"
  49 #include "r600_pipe.h"
  50
  51 /*
  52  * pipe_context
  53  */
  54 static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
  55 {
  56         struct r600_fence *fence = NULL;
  57
  58         if (!ctx->fences.bo) {
  59                 /* Create the shared buffer object */
  60                 ctx->fences.bo = r600_bo(ctx->radeon, 4096, 0, 0, 0);
  61                 if (!ctx->fences.bo) {
  62                         R600_ERR("r600: failed to create bo for fence objects\n");
  63                         return NULL;
  64                 }
  65                 ctx->fences.data = r600_bo_map(ctx->radeon, ctx->fences.bo, PIPE_TRANSFER_UNSYNCHRONIZED, NULL);
  66         }
  67
  68         if (!LIST_IS_EMPTY(&ctx->fences.pool)) {
  69                 struct r600_fence *entry;
  70
  71                 /* Try to find a freed fence that has been signalled */
  72                 LIST_FOR_EACH_ENTRY(entry, &ctx->fences.pool, head) {
  73                         if (ctx->fences.data[entry->index] != 0) {
  74                                 LIST_DELINIT(&entry->head);
  75                                 fence = entry;
  76                                 break;
  77                         }
  78                 }
  79         }
  80
  81         if (!fence) {
  82                 /* Allocate a new fence */
  83                 struct r600_fence_block *block;
  84                 unsigned index;
  85
  86                 if ((ctx->fences.next_index + 1) >= 1024) {
  87                         R600_ERR("r600: too many concurrent fences\n");
  88                         return NULL;
  89                 }
  90
  91                 index = ctx->fences.next_index++;
  92
  93                 if (!(index % FENCE_BLOCK_SIZE)) {
  94                         /* Allocate a new block */
  95                         block = CALLOC_STRUCT(r600_fence_block);
  96                         if (block == NULL)
  97                                 return NULL;
  98
  99                         LIST_ADD(&block->head, &ctx->fences.blocks);
 100                 } else {
 101                         block = LIST_ENTRY(struct r600_fence_block, ctx->fences.blocks.next, head);
 102                 }
 103
 104                 fence = &block->fences[index % FENCE_BLOCK_SIZE];
 105                 fence->ctx = ctx;
 106                 fence->index = index;
 107         }
 108
 109         pipe_reference_init(&fence->reference, 1);
 110
 111         ctx->fences.data[fence->index] = 0;
 112         r600_context_emit_fence(&ctx->ctx, ctx->fences.bo, fence->index, 1);
 113         return fence;
 114 }
 115
 116 static void r600_flush(struct pipe_context *ctx,
 117                         struct pipe_fence_handle **fence)
 118 {
 119         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 120         struct r600_fence **rfence = (struct r600_fence**)fence;
 121
 122         if (rfence)
 123                 *rfence = r600_create_fence(rctx);
 124
 125         r600_context_flush(&rctx->ctx);
 126 }
 127
 128 static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
 129 {
 130         pipe_mutex_lock(rscreen->mutex_num_contexts);
 131         if (diff > 0) {
 132                 rscreen->num_contexts++;
 133
 134                 if (rscreen->num_contexts > 1)
 135                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 136                                                     UTIL_SLAB_MULTITHREADED);
 137         } else {
 138                 rscreen->num_contexts--;
 139
 140                 if (rscreen->num_contexts <= 1)
 141                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 142                                                     UTIL_SLAB_SINGLETHREADED);
 143         }
 144         pipe_mutex_unlock(rscreen->mutex_num_contexts);
 145 }
 146
 147 static void r600_destroy_context(struct pipe_context *context)
 148 {
 149         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 150
 151         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 152         util_unreference_framebuffer_state(&rctx->framebuffer);
 153
 154         r600_context_fini(&rctx->ctx);
 155
 156         util_blitter_destroy(rctx->blitter);
 157
 158         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 159                 free(rctx->states[i]);
 160         }
 161
 162         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 163         util_slab_destroy(&rctx->pool_transfers);
 164
 165         if (rctx->fences.bo) {
 166                 struct r600_fence_block *entry, *tmp;
 167
 168                 LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rctx->fences.blocks, head) {
 169                         LIST_DEL(&entry->head);
 170                         FREE(entry);
 171                 }
 172
 173                 r600_bo_unmap(rctx->radeon, rctx->fences.bo);
 174                 r600_bo_reference(rctx->radeon, &rctx->fences.bo, NULL);
 175         }
 176
 177         r600_update_num_contexts(rctx->screen, -1);
 178
 179         FREE(rctx);
 180 }
 181
 182 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 183 {
 184         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 185         struct r600_screen* rscreen = (struct r600_screen *)screen;
 186
 187         if (rctx == NULL)
 188                 return NULL;
 189
 190         r600_update_num_contexts(rscreen, 1);
 191
 192         rctx->context.winsys = rscreen->screen.winsys;
 193         rctx->context.screen = screen;
 194         rctx->context.priv = priv;
 195         rctx->context.destroy = r600_destroy_context;
 196         rctx->context.flush = r600_flush;
 197
 198         /* Easy accessing of screen/winsys. */
 199         rctx->screen = rscreen;
 200         rctx->radeon = rscreen->radeon;
 201         rctx->family = r600_get_family(rctx->radeon);
 202         rctx->chip_class = r600_get_family_class(rctx->radeon);
 203
 204         rctx->fences.bo = NULL;
 205         rctx->fences.data = NULL;
 206         rctx->fences.next_index = 0;
 207         LIST_INITHEAD(&rctx->fences.pool);
 208         LIST_INITHEAD(&rctx->fences.blocks);
 209
 210         r600_init_blit_functions(rctx);
 211         r600_init_query_functions(rctx);
 212         r600_init_context_resource_functions(rctx);
 213         r600_init_surface_functions(rctx);
 214         rctx->context.draw_vbo = r600_draw_vbo;
 215
 216         rctx->context.create_video_decoder = vl_create_decoder;
 217         rctx->context.create_video_buffer = vl_video_buffer_create;
 218
 219         switch (rctx->chip_class) {
 220         case R600:
 221         case R700:
 222                 r600_init_state_functions(rctx);
 223                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 224                         r600_destroy_context(&rctx->context);
 225                         return NULL;
 226                 }
 227                 r600_init_config(rctx);
 228                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 229                 break;
 230         case EVERGREEN:
 231         case CAYMAN:
 232                 evergreen_init_state_functions(rctx);
 233                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 234                         r600_destroy_context(&rctx->context);
 235                         return NULL;
 236                 }
 237                 evergreen_init_config(rctx);
 238                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 239                 break;
 240         default:
 241                 R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
 242                 r600_destroy_context(&rctx->context);
 243                 return NULL;
 244         }
 245
 246         util_slab_create(&rctx->pool_transfers,
 247                          sizeof(struct pipe_transfer), 64,
 248                          UTIL_SLAB_SINGLETHREADED);
 249
 250         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 251                                            PIPE_BIND_VERTEX_BUFFER |
 252                                            PIPE_BIND_INDEX_BUFFER |
 253                                            PIPE_BIND_CONSTANT_BUFFER,
 254                                            U_VERTEX_FETCH_DWORD_ALIGNED);
 255         if (!rctx->vbuf_mgr) {
 256                 r600_destroy_context(&rctx->context);
 257                 return NULL;
 258         }
 259
 260         rctx->blitter = util_blitter_create(&rctx->context);
 261         if (rctx->blitter == NULL) {
 262                 r600_destroy_context(&rctx->context);
 263                 return NULL;
 264         }
 265
 266         return &rctx->context;
 267 }
 268
 269 /*
 270  * pipe_screen
 271  */
 272 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 273 {
 274         return "X.Org";
 275 }
 276
 277 static const char *r600_get_family_name(enum radeon_family family)
 278 {
 279         switch(family) {
 280         case CHIP_R600: return "AMD R600";
 281         case CHIP_RV610: return "AMD RV610";
 282         case CHIP_RV630: return "AMD RV630";
 283         case CHIP_RV670: return "AMD RV670";
 284         case CHIP_RV620: return "AMD RV620";
 285         case CHIP_RV635: return "AMD RV635";
 286         case CHIP_RS780: return "AMD RS780";
 287         case CHIP_RS880: return "AMD RS880";
 288         case CHIP_RV770: return "AMD RV770";
 289         case CHIP_RV730: return "AMD RV730";
 290         case CHIP_RV710: return "AMD RV710";
 291         case CHIP_RV740: return "AMD RV740";
 292         case CHIP_CEDAR: return "AMD CEDAR";
 293         case CHIP_REDWOOD: return "AMD REDWOOD";
 294         case CHIP_JUNIPER: return "AMD JUNIPER";
 295         case CHIP_CYPRESS: return "AMD CYPRESS";
 296         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 297         case CHIP_PALM: return "AMD PALM";
 298         case CHIP_SUMO: return "AMD SUMO";
 299         case CHIP_SUMO2: return "AMD SUMO2";
 300         case CHIP_BARTS: return "AMD BARTS";
 301         case CHIP_TURKS: return "AMD TURKS";
 302         case CHIP_CAICOS: return "AMD CAICOS";
 303         case CHIP_CAYMAN: return "AMD CAYMAN";
 304         default: return "AMD unknown";
 305         }
 306 }
 307
 308 static const char* r600_get_name(struct pipe_screen* pscreen)
 309 {
 310         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 311         enum radeon_family family = r600_get_family(rscreen->radeon);
 312
 313         return r600_get_family_name(family);
 314 }
 315
 316 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 317 {
 318         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 319         enum radeon_family family = r600_get_family(rscreen->radeon);
 320
 321         switch (param) {
 322         /* Supported features (boolean caps). */
 323         case PIPE_CAP_NPOT_TEXTURES:
 324         case PIPE_CAP_TWO_SIDED_STENCIL:
 325         case PIPE_CAP_GLSL:
 326         case PIPE_CAP_DUAL_SOURCE_BLEND:
 327         case PIPE_CAP_ANISOTROPIC_FILTER:
 328         case PIPE_CAP_POINT_SPRITE:
 329         case PIPE_CAP_OCCLUSION_QUERY:
 330         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 331         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 332         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 333         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 334         case PIPE_CAP_TEXTURE_SWIZZLE:
 335         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 336         case PIPE_CAP_DEPTH_CLAMP:
 337         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 338         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 339         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 340         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 341         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 342         case PIPE_CAP_SM3:
 343         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 344         case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
 345                 return 1;
 346
 347         /* Supported except the original R600. */
 348         case PIPE_CAP_INDEP_BLEND_ENABLE:
 349         case PIPE_CAP_INDEP_BLEND_FUNC:
 350                 /* R600 doesn't support per-MRT blends */
 351                 return family == CHIP_R600 ? 0 : 1;
 352
 353         /* Supported on Evergreen. */
 354         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 355                 return family >= CHIP_CEDAR ? 1 : 0;
 356
 357         /* Unsupported features. */
 358         case PIPE_CAP_STREAM_OUTPUT:
 359         case PIPE_CAP_PRIMITIVE_RESTART:
 360         case PIPE_CAP_TGSI_INSTANCEID:
 361         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 362         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 363                 return 0;
 364
 365         case PIPE_CAP_ARRAY_TEXTURES:
 366                 /* fix once the CS checker upstream is fixed */
 367                 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 368
 369         /* Texturing. */
 370         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 371         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 372         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 373                 if (family >= CHIP_CEDAR)
 374                         return 15;
 375                 else
 376                         return 14;
 377         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 378         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 379                 return 16;
 380         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 381                 return 32;
 382
 383         /* Render targets. */
 384         case PIPE_CAP_MAX_RENDER_TARGETS:
 385                 /* FIXME some r6xx are buggy and can only do 4 */
 386                 return 8;
 387
 388         /* Timer queries, present when the clock frequency is non zero. */
 389         case PIPE_CAP_TIMER_QUERY:
 390                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 391
 392         default:
 393                 R600_ERR("r600: unknown param %d\n", param);
 394                 return 0;
 395         }
 396 }
 397
 398 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 399 {
 400         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 401         enum radeon_family family = r600_get_family(rscreen->radeon);
 402
 403         switch (param) {
 404         case PIPE_CAP_MAX_LINE_WIDTH:
 405         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 406         case PIPE_CAP_MAX_POINT_WIDTH:
 407         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 408                 if (family >= CHIP_CEDAR)
 409                         return 16384.0f;
 410                 else
 411                         return 8192.0f;
 412         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 413                 return 16.0f;
 414         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 415                 return 16.0f;
 416         default:
 417                 R600_ERR("r600: unsupported paramf %d\n", param);
 418                 return 0.0f;
 419         }
 420 }
 421
 422 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 423 {
 424         switch(shader)
 425         {
 426         case PIPE_SHADER_FRAGMENT:
 427         case PIPE_SHADER_VERTEX:
 428                 break;
 429         case PIPE_SHADER_GEOMETRY:
 430                 /* TODO: support and enable geometry programs */
 431                 return 0;
 432         default:
 433                 /* TODO: support tessellation on Evergreen */
 434                 return 0;
 435         }
 436
 437         /* TODO: all these should be fixed, since r600 surely supports much more! */
 438         switch (param) {
 439         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 440         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 441         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 442         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 443                 return 16384;
 444         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 445                 return 8; /* FIXME */
 446         case PIPE_SHADER_CAP_MAX_INPUTS:
 447                 if(shader == PIPE_SHADER_FRAGMENT)
 448                         return 34;
 449                 else
 450                         return 32;
 451         case PIPE_SHADER_CAP_MAX_TEMPS:
 452                 return 256; /* Max native temporaries. */
 453         case PIPE_SHADER_CAP_MAX_ADDRS:
 454                 /* FIXME Isn't this equal to TEMPS? */
 455                 return 1; /* Max native address registers */
 456         case PIPE_SHADER_CAP_MAX_CONSTS:
 457                 return R600_MAX_CONST_BUFFER_SIZE;
 458         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 459                 return R600_MAX_CONST_BUFFERS;
 460         case PIPE_SHADER_CAP_MAX_PREDS:
 461                 return 0; /* FIXME */
 462         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 463                 return 1;
 464         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 465         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 466         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 467         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 468                 return 1;
 469         case PIPE_SHADER_CAP_SUBROUTINES:
 470                 return 0;
 471         case PIPE_SHADER_CAP_INTEGERS:
 472                 return 0;
 473         default:
 474                 return 0;
 475         }
 476 }
 477
 478 static int r600_get_video_param(struct pipe_screen *screen,
 479                                 enum pipe_video_profile profile,
 480                                 enum pipe_video_cap param)
 481 {
 482         switch (param) {
 483         case PIPE_VIDEO_CAP_SUPPORTED:
 484                 return vl_profile_supported(screen, profile);
 485         case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 486                 return 1;
 487         case PIPE_VIDEO_CAP_MAX_WIDTH:
 488         case PIPE_VIDEO_CAP_MAX_HEIGHT:
 489                 return vl_video_buffer_max_size(screen);
 490         default:
 491                 return 0;
 492         }
 493 }
 494
 495 static void r600_destroy_screen(struct pipe_screen* pscreen)
 496 {
 497         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 498
 499         if (rscreen == NULL)
 500                 return;
 501
 502         radeon_decref(rscreen->radeon);
 503
 504         util_slab_destroy(&rscreen->pool_buffers);
 505         pipe_mutex_destroy(rscreen->mutex_num_contexts);
 506         FREE(rscreen);
 507 }
 508
 509 static void r600_fence_reference(struct pipe_screen *pscreen,
 510                                  struct pipe_fence_handle **ptr,
 511                                  struct pipe_fence_handle *fence)
 512 {
 513         struct r600_fence **oldf = (struct r600_fence**)ptr;
 514         struct r600_fence *newf = (struct r600_fence*)fence;
 515
 516         if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
 517                 struct r600_pipe_context *ctx = (*oldf)->ctx;
 518                 LIST_ADDTAIL(&(*oldf)->head, &ctx->fences.pool);
 519         }
 520
 521         *ptr = fence;
 522 }
 523
 524 static boolean r600_fence_signalled(struct pipe_screen *pscreen,
 525                                     struct pipe_fence_handle *fence)
 526 {
 527         struct r600_fence *rfence = (struct r600_fence*)fence;
 528         struct r600_pipe_context *ctx = rfence->ctx;
 529
 530         return ctx->fences.data[rfence->index];
 531 }
 532
 533 static boolean r600_fence_finish(struct pipe_screen *pscreen,
 534                                  struct pipe_fence_handle *fence,
 535                                  uint64_t timeout)
 536 {
 537         struct r600_fence *rfence = (struct r600_fence*)fence;
 538         struct r600_pipe_context *ctx = rfence->ctx;
 539         int64_t start_time = 0;
 540         unsigned spins = 0;
 541
 542         if (timeout != PIPE_TIMEOUT_INFINITE) {
 543                 start_time = os_time_get();
 544
 545                 /* Convert to microseconds. */
 546                 timeout /= 1000;
 547         }
 548
 549         while (ctx->fences.data[rfence->index] == 0) {
 550                 if (++spins % 256)
 551                         continue;
 552 #ifdef PIPE_OS_UNIX
 553                 sched_yield();
 554 #else
 555                 os_time_sleep(10);
 556 #endif
 557                 if (timeout != PIPE_TIMEOUT_INFINITE &&
 558                     os_time_get() - start_time >= timeout) {
 559                         return FALSE;
 560                 }
 561         }
 562
 563         return TRUE;
 564 }
 565
 566 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 567 {
 568         struct r600_screen *rscreen;
 569
 570         rscreen = CALLOC_STRUCT(r600_screen);
 571         if (rscreen == NULL) {
 572                 return NULL;
 573         }
 574
 575         rscreen->radeon = radeon;
 576         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 577         rscreen->screen.destroy = r600_destroy_screen;
 578         rscreen->screen.get_name = r600_get_name;
 579         rscreen->screen.get_vendor = r600_get_vendor;
 580         rscreen->screen.get_param = r600_get_param;
 581         rscreen->screen.get_shader_param = r600_get_shader_param;
 582         rscreen->screen.get_paramf = r600_get_paramf;
 583         rscreen->screen.get_video_param = r600_get_video_param;
 584         if (r600_get_family_class(radeon) >= EVERGREEN) {
 585                 rscreen->screen.is_format_supported = evergreen_is_format_supported;
 586         } else {
 587                 rscreen->screen.is_format_supported = r600_is_format_supported;
 588         }
 589         rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 590         rscreen->screen.context_create = r600_create_context;
 591         rscreen->screen.fence_reference = r600_fence_reference;
 592         rscreen->screen.fence_signalled = r600_fence_signalled;
 593         rscreen->screen.fence_finish = r600_fence_finish;
 594         r600_init_screen_resource_functions(&rscreen->screen);
 595
 596         rscreen->tiling_info = r600_get_tiling_info(radeon);
 597         util_format_s3tc_init();
 598
 599         util_slab_create(&rscreen->pool_buffers,
 600                          sizeof(struct r600_resource_buffer), 64,
 601                          UTIL_SLAB_SINGLETHREADED);
 602
 603         pipe_mutex_init(rscreen->mutex_num_contexts);
 604
 605         return &rscreen->screen;
 606 }