src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_transfer.h>
  34 #include <util/u_surface.h>
  35 #include <util/u_pack_color.h>
  36 #include <util/u_memory.h>
  37 #include <util/u_inlines.h>
  38 #include "util/u_upload_mgr.h"
  39 #include <pipebuffer/pb_buffer.h>
  40 #include "r600.h"
  41 #include "r600d.h"
  42 #include "r600_resource.h"
  43 #include "r600_shader.h"
  44 #include "r600_pipe.h"
  45 #include "r600_state_inlines.h"
  46
  47 /*
  48  * pipe_context
  49  */
  50 static void r600_flush(struct pipe_context *ctx, unsigned flags,
  51                         struct pipe_fence_handle **fence)
  52 {
  53         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  54 #if 0
  55         static int dc = 0;
  56         char dname[256];
  57 #endif
  58
  59         if (!rctx->ctx.pm4_cdwords)
  60                 return;
  61
  62 #if 0
  63         sprintf(dname, "gallium-%08d.bof", dc);
  64         if (dc < 20) {
  65                 r600_context_dump_bof(&rctx->ctx, dname);
  66                 R600_ERR("dumped %s\n", dname);
  67         }
  68         dc++;
  69 #endif
  70         r600_context_flush(&rctx->ctx);
  71 }
  72
  73 static void r600_destroy_context(struct pipe_context *context)
  74 {
  75         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
  76
  77         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
  78
  79         r600_context_fini(&rctx->ctx);
  80
  81         util_blitter_destroy(rctx->blitter);
  82
  83         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
  84                 free(rctx->states[i]);
  85         }
  86
  87         u_upload_destroy(rctx->upload_ib);
  88         u_upload_destroy(rctx->upload_const);
  89         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
  90
  91         FREE(rctx);
  92 }
  93
  94 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
  95 {
  96         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
  97         struct r600_screen* rscreen = (struct r600_screen *)screen;
  98         enum chip_class class;
  99
 100         if (rctx == NULL)
 101                 return NULL;
 102         rctx->context.winsys = rscreen->screen.winsys;
 103         rctx->context.screen = screen;
 104         rctx->context.priv = priv;
 105         rctx->context.destroy = r600_destroy_context;
 106         rctx->context.flush = r600_flush;
 107
 108         /* Easy accessing of screen/winsys. */
 109         rctx->screen = rscreen;
 110         rctx->radeon = rscreen->radeon;
 111         rctx->family = r600_get_family(rctx->radeon);
 112
 113         r600_init_blit_functions(rctx);
 114         r600_init_query_functions(rctx);
 115         r600_init_context_resource_functions(rctx);
 116         r600_init_surface_functions(rctx);
 117         rctx->context.draw_vbo = r600_draw_vbo;
 118
 119         switch (r600_get_family(rctx->radeon)) {
 120         case CHIP_R600:
 121         case CHIP_RV610:
 122         case CHIP_RV630:
 123         case CHIP_RV670:
 124         case CHIP_RV620:
 125         case CHIP_RV635:
 126         case CHIP_RS780:
 127         case CHIP_RS880:
 128         case CHIP_RV770:
 129         case CHIP_RV730:
 130         case CHIP_RV710:
 131         case CHIP_RV740:
 132                 r600_init_state_functions(rctx);
 133                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 134                         r600_destroy_context(&rctx->context);
 135                         return NULL;
 136                 }
 137                 r600_init_config(rctx);
 138                 break;
 139         case CHIP_CEDAR:
 140         case CHIP_REDWOOD:
 141         case CHIP_JUNIPER:
 142         case CHIP_CYPRESS:
 143         case CHIP_HEMLOCK:
 144         case CHIP_PALM:
 145         case CHIP_BARTS:
 146         case CHIP_TURKS:
 147         case CHIP_CAICOS:
 148                 evergreen_init_state_functions(rctx);
 149                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 150                         r600_destroy_context(&rctx->context);
 151                         return NULL;
 152                 }
 153                 evergreen_init_config(rctx);
 154                 break;
 155         default:
 156                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 157                 r600_destroy_context(&rctx->context);
 158                 return NULL;
 159         }
 160
 161         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 16,
 162                                            U_VERTEX_FETCH_BYTE_ALIGNED);
 163         if (!rctx->vbuf_mgr) {
 164                 r600_destroy_context(&rctx->context);
 165                 return NULL;
 166         }
 167
 168         rctx->upload_ib = u_upload_create(&rctx->context, 128 * 1024, 16,
 169                                           PIPE_BIND_INDEX_BUFFER);
 170         if (rctx->upload_ib == NULL) {
 171                 r600_destroy_context(&rctx->context);
 172                 return NULL;
 173         }
 174
 175         rctx->upload_const = u_upload_create(&rctx->context, 1024 * 1024, 256,
 176                                              PIPE_BIND_CONSTANT_BUFFER);
 177         if (rctx->upload_const == NULL) {
 178                 r600_destroy_context(&rctx->context);
 179                 return NULL;
 180         }
 181
 182         rctx->blitter = util_blitter_create(&rctx->context);
 183         if (rctx->blitter == NULL) {
 184                 FREE(rctx);
 185                 return NULL;
 186         }
 187
 188         class = r600_get_family_class(rctx->radeon);
 189         if (class == R600 || class == R700)
 190                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 191         else
 192                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 193
 194         return &rctx->context;
 195 }
 196
 197 /*
 198  * pipe_screen
 199  */
 200 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 201 {
 202         return "X.Org";
 203 }
 204
 205 static const char *r600_get_family_name(enum radeon_family family)
 206 {
 207         switch(family) {
 208         case CHIP_R600: return "AMD R600";
 209         case CHIP_RV610: return "AMD RV610";
 210         case CHIP_RV630: return "AMD RV630";
 211         case CHIP_RV670: return "AMD RV670";
 212         case CHIP_RV620: return "AMD RV620";
 213         case CHIP_RV635: return "AMD RV635";
 214         case CHIP_RS780: return "AMD RS780";
 215         case CHIP_RS880: return "AMD RS880";
 216         case CHIP_RV770: return "AMD RV770";
 217         case CHIP_RV730: return "AMD RV730";
 218         case CHIP_RV710: return "AMD RV710";
 219         case CHIP_RV740: return "AMD RV740";
 220         case CHIP_CEDAR: return "AMD CEDAR";
 221         case CHIP_REDWOOD: return "AMD REDWOOD";
 222         case CHIP_JUNIPER: return "AMD JUNIPER";
 223         case CHIP_CYPRESS: return "AMD CYPRESS";
 224         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 225         case CHIP_PALM: return "AMD PALM";
 226         case CHIP_BARTS: return "AMD BARTS";
 227         case CHIP_TURKS: return "AMD TURKS";
 228         case CHIP_CAICOS: return "AMD CAICOS";
 229         default: return "AMD unknown";
 230         }
 231 }
 232
 233 static const char* r600_get_name(struct pipe_screen* pscreen)
 234 {
 235         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 236         enum radeon_family family = r600_get_family(rscreen->radeon);
 237
 238         return r600_get_family_name(family);
 239 }
 240
 241 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 242 {
 243         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 244         enum radeon_family family = r600_get_family(rscreen->radeon);
 245
 246         switch (param) {
 247         /* Supported features (boolean caps). */
 248         case PIPE_CAP_NPOT_TEXTURES:
 249         case PIPE_CAP_TWO_SIDED_STENCIL:
 250         case PIPE_CAP_GLSL:
 251         case PIPE_CAP_DUAL_SOURCE_BLEND:
 252         case PIPE_CAP_ANISOTROPIC_FILTER:
 253         case PIPE_CAP_POINT_SPRITE:
 254         case PIPE_CAP_OCCLUSION_QUERY:
 255         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 256         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 257         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 258         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 259         case PIPE_CAP_SM3:
 260         case PIPE_CAP_TEXTURE_SWIZZLE:
 261         case PIPE_CAP_INDEP_BLEND_ENABLE:
 262         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 263         case PIPE_CAP_DEPTH_CLAMP:
 264         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 265                 return 1;
 266
 267         /* Unsupported features (boolean caps). */
 268         case PIPE_CAP_STREAM_OUTPUT:
 269         case PIPE_CAP_PRIMITIVE_RESTART:
 270         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 271         case PIPE_CAP_INSTANCED_DRAWING:
 272         case PIPE_CAP_ARRAY_TEXTURES:
 273                 return 0;
 274
 275         /* Texturing. */
 276         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 277         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 278         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 279                 if (family >= CHIP_CEDAR)
 280                         return 15;
 281                 else
 282                         return 14;
 283         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 284                 /* FIXME allow this once infrastructure is there */
 285                 return 16;
 286         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 287         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 288                 return 16;
 289
 290         /* Render targets. */
 291         case PIPE_CAP_MAX_RENDER_TARGETS:
 292                 /* FIXME some r6xx are buggy and can only do 4 */
 293                 return 8;
 294
 295         /* Fragment coordinate conventions. */
 296         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 297         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 298                 return 1;
 299         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 300         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 301                 return 0;
 302
 303         /* Timer queries, present when the clock frequency is non zero. */
 304         case PIPE_CAP_TIMER_QUERY:
 305                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 306
 307         default:
 308                 R600_ERR("r600: unknown param %d\n", param);
 309                 return 0;
 310         }
 311 }
 312
 313 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 314 {
 315         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 316         enum radeon_family family = r600_get_family(rscreen->radeon);
 317
 318         switch (param) {
 319         case PIPE_CAP_MAX_LINE_WIDTH:
 320         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 321         case PIPE_CAP_MAX_POINT_WIDTH:
 322         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 323                 if (family >= CHIP_CEDAR)
 324                         return 16384.0f;
 325                 else
 326                         return 8192.0f;
 327         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 328                 return 16.0f;
 329         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 330                 return 16.0f;
 331         default:
 332                 R600_ERR("r600: unsupported paramf %d\n", param);
 333                 return 0.0f;
 334         }
 335 }
 336
 337 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 338 {
 339         switch(shader)
 340         {
 341         case PIPE_SHADER_FRAGMENT:
 342         case PIPE_SHADER_VERTEX:
 343                 break;
 344         case PIPE_SHADER_GEOMETRY:
 345                 /* TODO: support and enable geometry programs */
 346                 return 0;
 347         default:
 348                 /* TODO: support tessellation on Evergreen */
 349                 return 0;
 350         }
 351
 352         /* TODO: all these should be fixed, since r600 surely supports much more! */
 353         switch (param) {
 354         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 355         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 356         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 357         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 358                 return 16384;
 359         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 360                 return 8; /* FIXME */
 361         case PIPE_SHADER_CAP_MAX_INPUTS:
 362                 if(shader == PIPE_SHADER_FRAGMENT)
 363                         return 10;
 364                 else
 365                         return 16;
 366         case PIPE_SHADER_CAP_MAX_TEMPS:
 367                 return 256; //max native temporaries
 368         case PIPE_SHADER_CAP_MAX_ADDRS:
 369                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 370         case PIPE_SHADER_CAP_MAX_CONSTS:
 371                 return 256; //max native parameters
 372         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 373                 return 1;
 374         case PIPE_SHADER_CAP_MAX_PREDS:
 375                 return 0; /* FIXME */
 376         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 377                 return 1;
 378         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 379         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 380         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 381         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 382                 return 1;
 383         case PIPE_SHADER_CAP_SUBROUTINES:
 384                 return 0;
 385         default:
 386                 return 0;
 387         }
 388 }
 389
 390 static boolean r600_is_format_supported(struct pipe_screen* screen,
 391                                         enum pipe_format format,
 392                                         enum pipe_texture_target target,
 393                                         unsigned sample_count,
 394                                         unsigned usage,
 395                                         unsigned geom_flags)
 396 {
 397         unsigned retval = 0;
 398         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 399                 R600_ERR("r600: unsupported texture type %d\n", target);
 400                 return FALSE;
 401         }
 402
 403         /* Multisample */
 404         if (sample_count > 1)
 405                 return FALSE;
 406
 407         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 408             r600_is_sampler_format_supported(format)) {
 409                 retval |= PIPE_BIND_SAMPLER_VIEW;
 410         }
 411
 412         if ((usage & (PIPE_BIND_RENDER_TARGET |
 413                         PIPE_BIND_DISPLAY_TARGET |
 414                         PIPE_BIND_SCANOUT |
 415                         PIPE_BIND_SHARED)) &&
 416                         r600_is_colorbuffer_format_supported(format)) {
 417                 retval |= usage &
 418                         (PIPE_BIND_RENDER_TARGET |
 419                          PIPE_BIND_DISPLAY_TARGET |
 420                          PIPE_BIND_SCANOUT |
 421                          PIPE_BIND_SHARED);
 422         }
 423
 424         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 425             r600_is_zs_format_supported(format)) {
 426                 retval |= PIPE_BIND_DEPTH_STENCIL;
 427         }
 428
 429         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 430                 struct r600_screen *rscreen = (struct r600_screen *)screen;
 431                 enum radeon_family family = r600_get_family(rscreen->radeon);
 432
 433                 if (r600_is_vertex_format_supported(format, family)) {
 434                         retval |= PIPE_BIND_VERTEX_BUFFER;
 435                 }
 436         }
 437
 438         if (usage & PIPE_BIND_TRANSFER_READ)
 439                 retval |= PIPE_BIND_TRANSFER_READ;
 440         if (usage & PIPE_BIND_TRANSFER_WRITE)
 441                 retval |= PIPE_BIND_TRANSFER_WRITE;
 442
 443         return retval == usage;
 444 }
 445
 446 static void r600_destroy_screen(struct pipe_screen* pscreen)
 447 {
 448         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 449
 450         if (rscreen == NULL)
 451                 return;
 452
 453         radeon_decref(rscreen->radeon);
 454
 455         FREE(rscreen);
 456 }
 457
 458
 459 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 460 {
 461         struct r600_screen *rscreen;
 462
 463         rscreen = CALLOC_STRUCT(r600_screen);
 464         if (rscreen == NULL) {
 465                 return NULL;
 466         }
 467
 468         rscreen->radeon = radeon;
 469         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 470         rscreen->screen.destroy = r600_destroy_screen;
 471         rscreen->screen.get_name = r600_get_name;
 472         rscreen->screen.get_vendor = r600_get_vendor;
 473         rscreen->screen.get_param = r600_get_param;
 474         rscreen->screen.get_shader_param = r600_get_shader_param;
 475         rscreen->screen.get_paramf = r600_get_paramf;
 476         rscreen->screen.is_format_supported = r600_is_format_supported;
 477         rscreen->screen.context_create = r600_create_context;
 478         r600_init_screen_resource_functions(&rscreen->screen);
 479
 480         rscreen->tiling_info = r600_get_tiling_info(radeon);
 481
 482         return &rscreen->screen;
 483 }