src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include "util/u_format.h"
  34 #include <util/u_format_s3tc.h>
  35 #include <util/u_transfer.h>
  36 #include <util/u_surface.h>
  37 #include <util/u_pack_color.h>
  38 #include <util/u_memory.h>
  39 #include <util/u_inlines.h>
  40 #include "util/u_upload_mgr.h"
  41 #include <vl/vl_decoder.h>
  42 #include <vl/vl_video_buffer.h>
  43 #include "os/os_time.h"
  44 #include <pipebuffer/pb_buffer.h>
  45 #include "r600.h"
  46 #include "r600d.h"
  47 #include "r600_resource.h"
  48 #include "r600_shader.h"
  49 #include "r600_pipe.h"
  50 #include "../../winsys/r600/drm/r600_drm_public.h"
  51
  52 /*
  53  * pipe_context
  54  */
  55 static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
  56 {
  57         struct r600_fence *fence = NULL;
  58
  59         if (!ctx->fences.bo) {
  60                 /* Create the shared buffer object */
  61                 ctx->fences.bo = r600_bo(ctx->radeon, 4096, 0, 0, 0);
  62                 if (!ctx->fences.bo) {
  63                         R600_ERR("r600: failed to create bo for fence objects\n");
  64                         return NULL;
  65                 }
  66                 ctx->fences.data = r600_bo_map(ctx->radeon, ctx->fences.bo, PIPE_TRANSFER_UNSYNCHRONIZED, NULL);
  67         }
  68
  69         if (!LIST_IS_EMPTY(&ctx->fences.pool)) {
  70                 struct r600_fence *entry;
  71
  72                 /* Try to find a freed fence that has been signalled */
  73                 LIST_FOR_EACH_ENTRY(entry, &ctx->fences.pool, head) {
  74                         if (ctx->fences.data[entry->index] != 0) {
  75                                 LIST_DELINIT(&entry->head);
  76                                 fence = entry;
  77                                 break;
  78                         }
  79                 }
  80         }
  81
  82         if (!fence) {
  83                 /* Allocate a new fence */
  84                 struct r600_fence_block *block;
  85                 unsigned index;
  86
  87                 if ((ctx->fences.next_index + 1) >= 1024) {
  88                         R600_ERR("r600: too many concurrent fences\n");
  89                         return NULL;
  90                 }
  91
  92                 index = ctx->fences.next_index++;
  93
  94                 if (!(index % FENCE_BLOCK_SIZE)) {
  95                         /* Allocate a new block */
  96                         block = CALLOC_STRUCT(r600_fence_block);
  97                         if (block == NULL)
  98                                 return NULL;
  99
 100                         LIST_ADD(&block->head, &ctx->fences.blocks);
 101                 } else {
 102                         block = LIST_ENTRY(struct r600_fence_block, ctx->fences.blocks.next, head);
 103                 }
 104
 105                 fence = &block->fences[index % FENCE_BLOCK_SIZE];
 106                 fence->ctx = ctx;
 107                 fence->index = index;
 108         }
 109
 110         pipe_reference_init(&fence->reference, 1);
 111
 112         ctx->fences.data[fence->index] = 0;
 113         r600_context_emit_fence(&ctx->ctx, ctx->fences.bo, fence->index, 1);
 114         return fence;
 115 }
 116
 117 static void r600_flush(struct pipe_context *ctx,
 118                         struct pipe_fence_handle **fence)
 119 {
 120         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 121         struct r600_fence **rfence = (struct r600_fence**)fence;
 122
 123         if (rfence)
 124                 *rfence = r600_create_fence(rctx);
 125
 126         r600_context_flush(&rctx->ctx);
 127 }
 128
 129 static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
 130 {
 131         pipe_mutex_lock(rscreen->mutex_num_contexts);
 132         if (diff > 0) {
 133                 rscreen->num_contexts++;
 134
 135                 if (rscreen->num_contexts > 1)
 136                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 137                                                     UTIL_SLAB_MULTITHREADED);
 138         } else {
 139                 rscreen->num_contexts--;
 140
 141                 if (rscreen->num_contexts <= 1)
 142                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 143                                                     UTIL_SLAB_SINGLETHREADED);
 144         }
 145         pipe_mutex_unlock(rscreen->mutex_num_contexts);
 146 }
 147
 148 static void r600_destroy_context(struct pipe_context *context)
 149 {
 150         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 151
 152         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 153         util_unreference_framebuffer_state(&rctx->framebuffer);
 154
 155         r600_context_fini(&rctx->ctx);
 156
 157         util_blitter_destroy(rctx->blitter);
 158
 159         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 160                 free(rctx->states[i]);
 161         }
 162
 163         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 164         util_slab_destroy(&rctx->pool_transfers);
 165
 166         if (rctx->fences.bo) {
 167                 struct r600_fence_block *entry, *tmp;
 168
 169                 LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rctx->fences.blocks, head) {
 170                         LIST_DEL(&entry->head);
 171                         FREE(entry);
 172                 }
 173
 174                 r600_bo_unmap(rctx->radeon, rctx->fences.bo);
 175                 r600_bo_reference(rctx->radeon, &rctx->fences.bo, NULL);
 176         }
 177
 178         r600_update_num_contexts(rctx->screen, -1);
 179
 180         FREE(rctx);
 181 }
 182
 183 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 184 {
 185         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 186         struct r600_screen* rscreen = (struct r600_screen *)screen;
 187
 188         if (rctx == NULL)
 189                 return NULL;
 190
 191         r600_update_num_contexts(rscreen, 1);
 192
 193         rctx->context.winsys = rscreen->screen.winsys;
 194         rctx->context.screen = screen;
 195         rctx->context.priv = priv;
 196         rctx->context.destroy = r600_destroy_context;
 197         rctx->context.flush = r600_flush;
 198
 199         /* Easy accessing of screen/winsys. */
 200         rctx->screen = rscreen;
 201         rctx->radeon = rscreen->radeon;
 202         rctx->family = r600_get_family(rctx->radeon);
 203         rctx->chip_class = r600_get_family_class(rctx->radeon);
 204
 205         rctx->fences.bo = NULL;
 206         rctx->fences.data = NULL;
 207         rctx->fences.next_index = 0;
 208         LIST_INITHEAD(&rctx->fences.pool);
 209         LIST_INITHEAD(&rctx->fences.blocks);
 210
 211         r600_init_blit_functions(rctx);
 212         r600_init_query_functions(rctx);
 213         r600_init_context_resource_functions(rctx);
 214         r600_init_surface_functions(rctx);
 215         rctx->context.draw_vbo = r600_draw_vbo;
 216
 217         rctx->context.create_video_decoder = vl_create_decoder;
 218         rctx->context.create_video_buffer = vl_video_buffer_create;
 219
 220         switch (rctx->chip_class) {
 221         case R600:
 222         case R700:
 223                 r600_init_state_functions(rctx);
 224                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 225                         r600_destroy_context(&rctx->context);
 226                         return NULL;
 227                 }
 228                 r600_init_config(rctx);
 229                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 230                 break;
 231         case EVERGREEN:
 232         case CAYMAN:
 233                 evergreen_init_state_functions(rctx);
 234                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 235                         r600_destroy_context(&rctx->context);
 236                         return NULL;
 237                 }
 238                 evergreen_init_config(rctx);
 239                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 240                 break;
 241         default:
 242                 R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
 243                 r600_destroy_context(&rctx->context);
 244                 return NULL;
 245         }
 246
 247         util_slab_create(&rctx->pool_transfers,
 248                          sizeof(struct pipe_transfer), 64,
 249                          UTIL_SLAB_SINGLETHREADED);
 250
 251         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 252                                            PIPE_BIND_VERTEX_BUFFER |
 253                                            PIPE_BIND_INDEX_BUFFER |
 254                                            PIPE_BIND_CONSTANT_BUFFER,
 255                                            U_VERTEX_FETCH_DWORD_ALIGNED);
 256         if (!rctx->vbuf_mgr) {
 257                 r600_destroy_context(&rctx->context);
 258                 return NULL;
 259         }
 260
 261         rctx->blitter = util_blitter_create(&rctx->context);
 262         if (rctx->blitter == NULL) {
 263                 r600_destroy_context(&rctx->context);
 264                 return NULL;
 265         }
 266
 267         return &rctx->context;
 268 }
 269
 270 /*
 271  * pipe_screen
 272  */
 273 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 274 {
 275         return "X.Org";
 276 }
 277
 278 static const char *r600_get_family_name(enum radeon_family family)
 279 {
 280         switch(family) {
 281         case CHIP_R600: return "AMD R600";
 282         case CHIP_RV610: return "AMD RV610";
 283         case CHIP_RV630: return "AMD RV630";
 284         case CHIP_RV670: return "AMD RV670";
 285         case CHIP_RV620: return "AMD RV620";
 286         case CHIP_RV635: return "AMD RV635";
 287         case CHIP_RS780: return "AMD RS780";
 288         case CHIP_RS880: return "AMD RS880";
 289         case CHIP_RV770: return "AMD RV770";
 290         case CHIP_RV730: return "AMD RV730";
 291         case CHIP_RV710: return "AMD RV710";
 292         case CHIP_RV740: return "AMD RV740";
 293         case CHIP_CEDAR: return "AMD CEDAR";
 294         case CHIP_REDWOOD: return "AMD REDWOOD";
 295         case CHIP_JUNIPER: return "AMD JUNIPER";
 296         case CHIP_CYPRESS: return "AMD CYPRESS";
 297         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 298         case CHIP_PALM: return "AMD PALM";
 299         case CHIP_SUMO: return "AMD SUMO";
 300         case CHIP_SUMO2: return "AMD SUMO2";
 301         case CHIP_BARTS: return "AMD BARTS";
 302         case CHIP_TURKS: return "AMD TURKS";
 303         case CHIP_CAICOS: return "AMD CAICOS";
 304         case CHIP_CAYMAN: return "AMD CAYMAN";
 305         default: return "AMD unknown";
 306         }
 307 }
 308
 309 static const char* r600_get_name(struct pipe_screen* pscreen)
 310 {
 311         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 312         enum radeon_family family = r600_get_family(rscreen->radeon);
 313
 314         return r600_get_family_name(family);
 315 }
 316
 317 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 318 {
 319         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 320         enum radeon_family family = r600_get_family(rscreen->radeon);
 321
 322         switch (param) {
 323         /* Supported features (boolean caps). */
 324         case PIPE_CAP_NPOT_TEXTURES:
 325         case PIPE_CAP_TWO_SIDED_STENCIL:
 326         case PIPE_CAP_GLSL:
 327         case PIPE_CAP_DUAL_SOURCE_BLEND:
 328         case PIPE_CAP_ANISOTROPIC_FILTER:
 329         case PIPE_CAP_POINT_SPRITE:
 330         case PIPE_CAP_OCCLUSION_QUERY:
 331         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 332         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 333         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 334         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 335         case PIPE_CAP_TEXTURE_SWIZZLE:
 336         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 337         case PIPE_CAP_DEPTH_CLAMP:
 338         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 339         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 340         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 341         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 342         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 343         case PIPE_CAP_SM3:
 344         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 345         case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
 346                 return 1;
 347
 348         /* Supported except the original R600. */
 349         case PIPE_CAP_INDEP_BLEND_ENABLE:
 350         case PIPE_CAP_INDEP_BLEND_FUNC:
 351                 /* R600 doesn't support per-MRT blends */
 352                 return family == CHIP_R600 ? 0 : 1;
 353
 354         /* Supported on Evergreen. */
 355         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 356                 return family >= CHIP_CEDAR ? 1 : 0;
 357
 358         /* Unsupported features. */
 359         case PIPE_CAP_STREAM_OUTPUT:
 360         case PIPE_CAP_PRIMITIVE_RESTART:
 361         case PIPE_CAP_TGSI_INSTANCEID:
 362         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 363         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 364                 return 0;
 365
 366         case PIPE_CAP_ARRAY_TEXTURES:
 367                 /* fix once the CS checker upstream is fixed */
 368                 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 369
 370         /* Texturing. */
 371         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 372         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 373         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 374                 if (family >= CHIP_CEDAR)
 375                         return 15;
 376                 else
 377                         return 14;
 378         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 379         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 380                 return 16;
 381         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 382                 return 32;
 383
 384         /* Render targets. */
 385         case PIPE_CAP_MAX_RENDER_TARGETS:
 386                 /* FIXME some r6xx are buggy and can only do 4 */
 387                 return 8;
 388
 389         /* Timer queries, present when the clock frequency is non zero. */
 390         case PIPE_CAP_TIMER_QUERY:
 391                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 392
 393         default:
 394                 R600_ERR("r600: unknown param %d\n", param);
 395                 return 0;
 396         }
 397 }
 398
 399 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 400 {
 401         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 402         enum radeon_family family = r600_get_family(rscreen->radeon);
 403
 404         switch (param) {
 405         case PIPE_CAP_MAX_LINE_WIDTH:
 406         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 407         case PIPE_CAP_MAX_POINT_WIDTH:
 408         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 409                 if (family >= CHIP_CEDAR)
 410                         return 16384.0f;
 411                 else
 412                         return 8192.0f;
 413         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 414                 return 16.0f;
 415         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 416                 return 16.0f;
 417         default:
 418                 R600_ERR("r600: unsupported paramf %d\n", param);
 419                 return 0.0f;
 420         }
 421 }
 422
 423 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 424 {
 425         switch(shader)
 426         {
 427         case PIPE_SHADER_FRAGMENT:
 428         case PIPE_SHADER_VERTEX:
 429                 break;
 430         case PIPE_SHADER_GEOMETRY:
 431                 /* TODO: support and enable geometry programs */
 432                 return 0;
 433         default:
 434                 /* TODO: support tessellation on Evergreen */
 435                 return 0;
 436         }
 437
 438         /* TODO: all these should be fixed, since r600 surely supports much more! */
 439         switch (param) {
 440         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 441         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 442         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 443         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 444                 return 16384;
 445         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 446                 return 8; /* FIXME */
 447         case PIPE_SHADER_CAP_MAX_INPUTS:
 448                 if(shader == PIPE_SHADER_FRAGMENT)
 449                         return 34;
 450                 else
 451                         return 32;
 452         case PIPE_SHADER_CAP_MAX_TEMPS:
 453                 return 256; /* Max native temporaries. */
 454         case PIPE_SHADER_CAP_MAX_ADDRS:
 455                 /* FIXME Isn't this equal to TEMPS? */
 456                 return 1; /* Max native address registers */
 457         case PIPE_SHADER_CAP_MAX_CONSTS:
 458                 return R600_MAX_CONST_BUFFER_SIZE;
 459         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 460                 return R600_MAX_CONST_BUFFERS;
 461         case PIPE_SHADER_CAP_MAX_PREDS:
 462                 return 0; /* FIXME */
 463         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 464                 return 1;
 465         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 466         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 467         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 468         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 469                 return 1;
 470         case PIPE_SHADER_CAP_SUBROUTINES:
 471                 return 0;
 472         case PIPE_SHADER_CAP_INTEGERS:
 473                 return 0;
 474         default:
 475                 return 0;
 476         }
 477 }
 478
 479 static int r600_get_video_param(struct pipe_screen *screen,
 480                                 enum pipe_video_profile profile,
 481                                 enum pipe_video_cap param)
 482 {
 483         switch (param) {
 484         case PIPE_VIDEO_CAP_SUPPORTED:
 485                 return vl_profile_supported(screen, profile);
 486         case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 487                 return 1;
 488         case PIPE_VIDEO_CAP_MAX_WIDTH:
 489         case PIPE_VIDEO_CAP_MAX_HEIGHT:
 490                 return vl_video_buffer_max_size(screen);
 491         default:
 492                 return 0;
 493         }
 494 }
 495
 496 static void r600_destroy_screen(struct pipe_screen* pscreen)
 497 {
 498         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 499
 500         if (rscreen == NULL)
 501                 return;
 502
 503         radeon_decref(rscreen->radeon);
 504
 505         util_slab_destroy(&rscreen->pool_buffers);
 506         pipe_mutex_destroy(rscreen->mutex_num_contexts);
 507         FREE(rscreen);
 508 }
 509
 510 static void r600_fence_reference(struct pipe_screen *pscreen,
 511                                  struct pipe_fence_handle **ptr,
 512                                  struct pipe_fence_handle *fence)
 513 {
 514         struct r600_fence **oldf = (struct r600_fence**)ptr;
 515         struct r600_fence *newf = (struct r600_fence*)fence;
 516
 517         if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
 518                 struct r600_pipe_context *ctx = (*oldf)->ctx;
 519                 LIST_ADDTAIL(&(*oldf)->head, &ctx->fences.pool);
 520         }
 521
 522         *ptr = fence;
 523 }
 524
 525 static boolean r600_fence_signalled(struct pipe_screen *pscreen,
 526                                     struct pipe_fence_handle *fence)
 527 {
 528         struct r600_fence *rfence = (struct r600_fence*)fence;
 529         struct r600_pipe_context *ctx = rfence->ctx;
 530
 531         return ctx->fences.data[rfence->index];
 532 }
 533
 534 static boolean r600_fence_finish(struct pipe_screen *pscreen,
 535                                  struct pipe_fence_handle *fence,
 536                                  uint64_t timeout)
 537 {
 538         struct r600_fence *rfence = (struct r600_fence*)fence;
 539         struct r600_pipe_context *ctx = rfence->ctx;
 540         int64_t start_time = 0;
 541         unsigned spins = 0;
 542
 543         if (timeout != PIPE_TIMEOUT_INFINITE) {
 544                 start_time = os_time_get();
 545
 546                 /* Convert to microseconds. */
 547                 timeout /= 1000;
 548         }
 549
 550         while (ctx->fences.data[rfence->index] == 0) {
 551                 if (++spins % 256)
 552                         continue;
 553 #ifdef PIPE_OS_UNIX
 554                 sched_yield();
 555 #else
 556                 os_time_sleep(10);
 557 #endif
 558                 if (timeout != PIPE_TIMEOUT_INFINITE &&
 559                     os_time_get() - start_time >= timeout) {
 560                         return FALSE;
 561                 }
 562         }
 563
 564         return TRUE;
 565 }
 566
 567 struct pipe_screen *r600_screen_create(struct radeon_winsys *rw)
 568 {
 569         struct r600_screen *rscreen;
 570         struct radeon *radeon = r600_drm_winsys_create(rw);
 571
 572         rscreen = CALLOC_STRUCT(r600_screen);
 573         if (rscreen == NULL) {
 574                 return NULL;
 575         }
 576
 577         rscreen->radeon = radeon;
 578         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 579         rscreen->screen.destroy = r600_destroy_screen;
 580         rscreen->screen.get_name = r600_get_name;
 581         rscreen->screen.get_vendor = r600_get_vendor;
 582         rscreen->screen.get_param = r600_get_param;
 583         rscreen->screen.get_shader_param = r600_get_shader_param;
 584         rscreen->screen.get_paramf = r600_get_paramf;
 585         rscreen->screen.get_video_param = r600_get_video_param;
 586         if (r600_get_family_class(radeon) >= EVERGREEN) {
 587                 rscreen->screen.is_format_supported = evergreen_is_format_supported;
 588         } else {
 589                 rscreen->screen.is_format_supported = r600_is_format_supported;
 590         }
 591         rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 592         rscreen->screen.context_create = r600_create_context;
 593         rscreen->screen.fence_reference = r600_fence_reference;
 594         rscreen->screen.fence_signalled = r600_fence_signalled;
 595         rscreen->screen.fence_finish = r600_fence_finish;
 596         r600_init_screen_resource_functions(&rscreen->screen);
 597
 598         rscreen->tiling_info = r600_get_tiling_info(radeon);
 599         util_format_s3tc_init();
 600
 601         util_slab_create(&rscreen->pool_buffers,
 602                          sizeof(struct r600_resource_buffer), 64,
 603                          UTIL_SLAB_SINGLETHREADED);
 604
 605         pipe_mutex_init(rscreen->mutex_num_contexts);
 606
 607         return &rscreen->screen;
 608 }