src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_format_s3tc.h>
  34 #include <util/u_transfer.h>
  35 #include <util/u_surface.h>
  36 #include <util/u_pack_color.h>
  37 #include <util/u_memory.h>
  38 #include <util/u_inlines.h>
  39 #include "util/u_upload_mgr.h"
  40 #include <pipebuffer/pb_buffer.h>
  41 #include "r600.h"
  42 #include "r600d.h"
  43 #include "r600_resource.h"
  44 #include "r600_shader.h"
  45 #include "r600_pipe.h"
  46 #include "r600_state_inlines.h"
  47
  48 /*
  49  * pipe_context
  50  */
  51 static void r600_flush(struct pipe_context *ctx,
  52                         struct pipe_fence_handle **fence)
  53 {
  54         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  55 #if 0
  56         static int dc = 0;
  57         char dname[256];
  58 #endif
  59
  60         if (!rctx->ctx.pm4_cdwords)
  61                 return;
  62
  63 #if 0
  64         sprintf(dname, "gallium-%08d.bof", dc);
  65         if (dc < 20) {
  66                 r600_context_dump_bof(&rctx->ctx, dname);
  67                 R600_ERR("dumped %s\n", dname);
  68         }
  69         dc++;
  70 #endif
  71         r600_context_flush(&rctx->ctx);
  72
  73         /* XXX This shouldn't be really necessary, but removing it breaks some tests.
  74          * Needless buffer reallocations may significantly increase memory consumption,
  75          * so getting rid of this call is important. */
  76         u_upload_flush(rctx->vbuf_mgr->uploader);
  77 }
  78
  79 static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
  80 {
  81         pipe_mutex_lock(rscreen->mutex_num_contexts);
  82         if (diff > 0) {
  83                 rscreen->num_contexts++;
  84
  85                 if (rscreen->num_contexts > 1)
  86                         util_slab_set_thread_safety(&rscreen->pool_buffers,
  87                                                     UTIL_SLAB_MULTITHREADED);
  88         } else {
  89                 rscreen->num_contexts--;
  90
  91                 if (rscreen->num_contexts <= 1)
  92                         util_slab_set_thread_safety(&rscreen->pool_buffers,
  93                                                     UTIL_SLAB_SINGLETHREADED);
  94         }
  95         pipe_mutex_unlock(rscreen->mutex_num_contexts);
  96 }
  97
  98 static void r600_destroy_context(struct pipe_context *context)
  99 {
 100         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 101
 102         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 103
 104         r600_context_fini(&rctx->ctx);
 105
 106         util_blitter_destroy(rctx->blitter);
 107
 108         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 109                 free(rctx->states[i]);
 110         }
 111
 112         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 113         util_slab_destroy(&rctx->pool_transfers);
 114
 115         r600_update_num_contexts(rctx->screen, -1);
 116
 117         FREE(rctx);
 118 }
 119
 120 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 121 {
 122         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 123         struct r600_screen* rscreen = (struct r600_screen *)screen;
 124         enum chip_class class;
 125
 126         if (rctx == NULL)
 127                 return NULL;
 128
 129         r600_update_num_contexts(rscreen, 1);
 130
 131         rctx->context.winsys = rscreen->screen.winsys;
 132         rctx->context.screen = screen;
 133         rctx->context.priv = priv;
 134         rctx->context.destroy = r600_destroy_context;
 135         rctx->context.flush = r600_flush;
 136
 137         /* Easy accessing of screen/winsys. */
 138         rctx->screen = rscreen;
 139         rctx->radeon = rscreen->radeon;
 140         rctx->family = r600_get_family(rctx->radeon);
 141
 142         r600_init_blit_functions(rctx);
 143         r600_init_query_functions(rctx);
 144         r600_init_context_resource_functions(rctx);
 145         r600_init_surface_functions(rctx);
 146         rctx->context.draw_vbo = r600_draw_vbo;
 147
 148         switch (r600_get_family(rctx->radeon)) {
 149         case CHIP_R600:
 150         case CHIP_RV610:
 151         case CHIP_RV630:
 152         case CHIP_RV670:
 153         case CHIP_RV620:
 154         case CHIP_RV635:
 155         case CHIP_RS780:
 156         case CHIP_RS880:
 157         case CHIP_RV770:
 158         case CHIP_RV730:
 159         case CHIP_RV710:
 160         case CHIP_RV740:
 161                 r600_init_state_functions(rctx);
 162                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 163                         r600_destroy_context(&rctx->context);
 164                         return NULL;
 165                 }
 166                 r600_init_config(rctx);
 167                 break;
 168         case CHIP_CEDAR:
 169         case CHIP_REDWOOD:
 170         case CHIP_JUNIPER:
 171         case CHIP_CYPRESS:
 172         case CHIP_HEMLOCK:
 173         case CHIP_PALM:
 174         case CHIP_BARTS:
 175         case CHIP_TURKS:
 176         case CHIP_CAICOS:
 177                 evergreen_init_state_functions(rctx);
 178                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 179                         r600_destroy_context(&rctx->context);
 180                         return NULL;
 181                 }
 182                 evergreen_init_config(rctx);
 183                 break;
 184         default:
 185                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 186                 r600_destroy_context(&rctx->context);
 187                 return NULL;
 188         }
 189
 190         util_slab_create(&rctx->pool_transfers,
 191                          sizeof(struct pipe_transfer), 64,
 192                          UTIL_SLAB_SINGLETHREADED);
 193
 194         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 195                                            PIPE_BIND_VERTEX_BUFFER |
 196                                            PIPE_BIND_INDEX_BUFFER |
 197                                            PIPE_BIND_CONSTANT_BUFFER,
 198                                            U_VERTEX_FETCH_DWORD_ALIGNED);
 199         if (!rctx->vbuf_mgr) {
 200                 r600_destroy_context(&rctx->context);
 201                 return NULL;
 202         }
 203
 204         rctx->blitter = util_blitter_create(&rctx->context);
 205         if (rctx->blitter == NULL) {
 206                 r600_destroy_context(&rctx->context);
 207                 return NULL;
 208         }
 209
 210         class = r600_get_family_class(rctx->radeon);
 211         if (class == R600 || class == R700)
 212                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 213         else
 214                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 215
 216         return &rctx->context;
 217 }
 218
 219 /*
 220  * pipe_screen
 221  */
 222 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 223 {
 224         return "X.Org";
 225 }
 226
 227 static const char *r600_get_family_name(enum radeon_family family)
 228 {
 229         switch(family) {
 230         case CHIP_R600: return "AMD R600";
 231         case CHIP_RV610: return "AMD RV610";
 232         case CHIP_RV630: return "AMD RV630";
 233         case CHIP_RV670: return "AMD RV670";
 234         case CHIP_RV620: return "AMD RV620";
 235         case CHIP_RV635: return "AMD RV635";
 236         case CHIP_RS780: return "AMD RS780";
 237         case CHIP_RS880: return "AMD RS880";
 238         case CHIP_RV770: return "AMD RV770";
 239         case CHIP_RV730: return "AMD RV730";
 240         case CHIP_RV710: return "AMD RV710";
 241         case CHIP_RV740: return "AMD RV740";
 242         case CHIP_CEDAR: return "AMD CEDAR";
 243         case CHIP_REDWOOD: return "AMD REDWOOD";
 244         case CHIP_JUNIPER: return "AMD JUNIPER";
 245         case CHIP_CYPRESS: return "AMD CYPRESS";
 246         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 247         case CHIP_PALM: return "AMD PALM";
 248         case CHIP_BARTS: return "AMD BARTS";
 249         case CHIP_TURKS: return "AMD TURKS";
 250         case CHIP_CAICOS: return "AMD CAICOS";
 251         default: return "AMD unknown";
 252         }
 253 }
 254
 255 static const char* r600_get_name(struct pipe_screen* pscreen)
 256 {
 257         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 258         enum radeon_family family = r600_get_family(rscreen->radeon);
 259
 260         return r600_get_family_name(family);
 261 }
 262
 263 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 264 {
 265         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 266         enum radeon_family family = r600_get_family(rscreen->radeon);
 267
 268         switch (param) {
 269         /* Supported features (boolean caps). */
 270         case PIPE_CAP_NPOT_TEXTURES:
 271         case PIPE_CAP_TWO_SIDED_STENCIL:
 272         case PIPE_CAP_GLSL:
 273         case PIPE_CAP_DUAL_SOURCE_BLEND:
 274         case PIPE_CAP_ANISOTROPIC_FILTER:
 275         case PIPE_CAP_POINT_SPRITE:
 276         case PIPE_CAP_OCCLUSION_QUERY:
 277         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 278         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 279         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 280         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 281         case PIPE_CAP_SM3:
 282         case PIPE_CAP_TEXTURE_SWIZZLE:
 283         case PIPE_CAP_INDEP_BLEND_ENABLE:
 284         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 285         case PIPE_CAP_DEPTH_CLAMP:
 286         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 287         case PIPE_CAP_TGSI_INSTANCEID:
 288         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 289                 return 1;
 290
 291         /* Unsupported features (boolean caps). */
 292         case PIPE_CAP_STREAM_OUTPUT:
 293         case PIPE_CAP_PRIMITIVE_RESTART:
 294         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 295                 return 0;
 296
 297         case PIPE_CAP_ARRAY_TEXTURES:
 298                 /* fix once the CS checker upstream is fixed */
 299                 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 300
 301         /* Texturing. */
 302         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 303         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 304         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 305                 if (family >= CHIP_CEDAR)
 306                         return 15;
 307                 else
 308                         return 14;
 309         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 310                 /* FIXME allow this once infrastructure is there */
 311                 return 16;
 312         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 313         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 314                 return 16;
 315
 316         /* Render targets. */
 317         case PIPE_CAP_MAX_RENDER_TARGETS:
 318                 /* FIXME some r6xx are buggy and can only do 4 */
 319                 return 8;
 320
 321         /* Fragment coordinate conventions. */
 322         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 323         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 324                 return 1;
 325         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 326         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 327                 return 0;
 328
 329         /* Timer queries, present when the clock frequency is non zero. */
 330         case PIPE_CAP_TIMER_QUERY:
 331                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 332
 333         default:
 334                 R600_ERR("r600: unknown param %d\n", param);
 335                 return 0;
 336         }
 337 }
 338
 339 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 340 {
 341         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 342         enum radeon_family family = r600_get_family(rscreen->radeon);
 343
 344         switch (param) {
 345         case PIPE_CAP_MAX_LINE_WIDTH:
 346         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 347         case PIPE_CAP_MAX_POINT_WIDTH:
 348         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 349                 if (family >= CHIP_CEDAR)
 350                         return 16384.0f;
 351                 else
 352                         return 8192.0f;
 353         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 354                 return 16.0f;
 355         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 356                 return 16.0f;
 357         default:
 358                 R600_ERR("r600: unsupported paramf %d\n", param);
 359                 return 0.0f;
 360         }
 361 }
 362
 363 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 364 {
 365         switch(shader)
 366         {
 367         case PIPE_SHADER_FRAGMENT:
 368         case PIPE_SHADER_VERTEX:
 369                 break;
 370         case PIPE_SHADER_GEOMETRY:
 371                 /* TODO: support and enable geometry programs */
 372                 return 0;
 373         default:
 374                 /* TODO: support tessellation on Evergreen */
 375                 return 0;
 376         }
 377
 378         /* TODO: all these should be fixed, since r600 surely supports much more! */
 379         switch (param) {
 380         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 381         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 382         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 383         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 384                 return 16384;
 385         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 386                 return 8; /* FIXME */
 387         case PIPE_SHADER_CAP_MAX_INPUTS:
 388                 if(shader == PIPE_SHADER_FRAGMENT)
 389                         return 10;
 390                 else
 391                         return 16;
 392         case PIPE_SHADER_CAP_MAX_TEMPS:
 393                 return 256; //max native temporaries
 394         case PIPE_SHADER_CAP_MAX_ADDRS:
 395                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 396         case PIPE_SHADER_CAP_MAX_CONSTS:
 397                 return R600_MAX_CONST_BUFFER_SIZE;
 398         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 399                 return R600_MAX_CONST_BUFFERS;
 400         case PIPE_SHADER_CAP_MAX_PREDS:
 401                 return 0; /* FIXME */
 402         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 403                 return 1;
 404         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 405         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 406         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 407         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 408                 return 1;
 409         case PIPE_SHADER_CAP_SUBROUTINES:
 410                 return 0;
 411         default:
 412                 return 0;
 413         }
 414 }
 415
 416 static boolean r600_is_format_supported(struct pipe_screen* screen,
 417                                         enum pipe_format format,
 418                                         enum pipe_texture_target target,
 419                                         unsigned sample_count,
 420                                         unsigned usage)
 421 {
 422         unsigned retval = 0;
 423         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 424                 R600_ERR("r600: unsupported texture type %d\n", target);
 425                 return FALSE;
 426         }
 427
 428         /* Multisample */
 429         if (sample_count > 1)
 430                 return FALSE;
 431
 432         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 433             r600_is_sampler_format_supported(screen, format)) {
 434                 retval |= PIPE_BIND_SAMPLER_VIEW;
 435         }
 436
 437         if ((usage & (PIPE_BIND_RENDER_TARGET |
 438                         PIPE_BIND_DISPLAY_TARGET |
 439                         PIPE_BIND_SCANOUT |
 440                         PIPE_BIND_SHARED)) &&
 441                         r600_is_colorbuffer_format_supported(format)) {
 442                 retval |= usage &
 443                         (PIPE_BIND_RENDER_TARGET |
 444                          PIPE_BIND_DISPLAY_TARGET |
 445                          PIPE_BIND_SCANOUT |
 446                          PIPE_BIND_SHARED);
 447         }
 448
 449         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 450             r600_is_zs_format_supported(format)) {
 451                 retval |= PIPE_BIND_DEPTH_STENCIL;
 452         }
 453
 454         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 455                 struct r600_screen *rscreen = (struct r600_screen *)screen;
 456                 enum radeon_family family = r600_get_family(rscreen->radeon);
 457
 458                 if (r600_is_vertex_format_supported(format, family)) {
 459                         retval |= PIPE_BIND_VERTEX_BUFFER;
 460                 }
 461         }
 462
 463         if (usage & PIPE_BIND_TRANSFER_READ)
 464                 retval |= PIPE_BIND_TRANSFER_READ;
 465         if (usage & PIPE_BIND_TRANSFER_WRITE)
 466                 retval |= PIPE_BIND_TRANSFER_WRITE;
 467
 468         return retval == usage;
 469 }
 470
 471 static void r600_destroy_screen(struct pipe_screen* pscreen)
 472 {
 473         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 474
 475         if (rscreen == NULL)
 476                 return;
 477
 478         radeon_decref(rscreen->radeon);
 479
 480         util_slab_destroy(&rscreen->pool_buffers);
 481         pipe_mutex_destroy(rscreen->mutex_num_contexts);
 482         FREE(rscreen);
 483 }
 484
 485
 486 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 487 {
 488         struct r600_screen *rscreen;
 489
 490         rscreen = CALLOC_STRUCT(r600_screen);
 491         if (rscreen == NULL) {
 492                 return NULL;
 493         }
 494
 495         rscreen->radeon = radeon;
 496         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 497         rscreen->screen.destroy = r600_destroy_screen;
 498         rscreen->screen.get_name = r600_get_name;
 499         rscreen->screen.get_vendor = r600_get_vendor;
 500         rscreen->screen.get_param = r600_get_param;
 501         rscreen->screen.get_shader_param = r600_get_shader_param;
 502         rscreen->screen.get_paramf = r600_get_paramf;
 503         rscreen->screen.is_format_supported = r600_is_format_supported;
 504         rscreen->screen.context_create = r600_create_context;
 505         r600_init_screen_resource_functions(&rscreen->screen);
 506
 507         rscreen->tiling_info = r600_get_tiling_info(radeon);
 508         util_format_s3tc_init();
 509
 510         util_slab_create(&rscreen->pool_buffers,
 511                          sizeof(struct r600_resource_buffer), 64,
 512                          UTIL_SLAB_SINGLETHREADED);
 513
 514         pipe_mutex_init(rscreen->mutex_num_contexts);
 515
 516         return &rscreen->screen;
 517 }