2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <pipe/p_defines.h>
26 #include <pipe/p_state.h>
27 #include <pipe/p_context.h>
28 #include <tgsi/tgsi_scan.h>
29 #include <tgsi/tgsi_parse.h>
30 #include <tgsi/tgsi_util.h>
31 #include <util/u_blitter.h>
32 #include <util/u_double_list.h>
33 #include "util/u_format.h"
34 #include <util/u_format_s3tc.h>
35 #include <util/u_transfer.h>
36 #include <util/u_surface.h>
37 #include <util/u_pack_color.h>
38 #include <util/u_memory.h>
39 #include <util/u_inlines.h>
40 #include "util/u_upload_mgr.h"
41 #include <vl/vl_context.h>
42 #include <vl/vl_video_buffer.h>
43 #include "os/os_time.h"
44 #include <pipebuffer/pb_buffer.h>
47 #include "r600_resource.h"
48 #include "r600_shader.h"
49 #include "r600_pipe.h"
50 #include "r600_state_inlines.h"
55 static struct r600_fence
*r600_create_fence(struct r600_pipe_context
*ctx
)
57 struct r600_fence
*fence
= NULL
;
59 if (!ctx
->fences
.bo
) {
60 /* Create the shared buffer object */
61 ctx
->fences
.bo
= r600_bo(ctx
->radeon
, 4096, 0, 0, 0);
62 if (!ctx
->fences
.bo
) {
63 R600_ERR("r600: failed to create bo for fence objects\n");
66 ctx
->fences
.data
= r600_bo_map(ctx
->radeon
, ctx
->fences
.bo
, PB_USAGE_UNSYNCHRONIZED
, NULL
);
69 if (!LIST_IS_EMPTY(&ctx
->fences
.pool
)) {
70 struct r600_fence
*entry
;
72 /* Try to find a freed fence that has been signalled */
73 LIST_FOR_EACH_ENTRY(entry
, &ctx
->fences
.pool
, head
) {
74 if (ctx
->fences
.data
[entry
->index
] != 0) {
75 LIST_DELINIT(&entry
->head
);
83 /* Allocate a new fence */
84 struct r600_fence_block
*block
;
87 if ((ctx
->fences
.next_index
+ 1) >= 1024) {
88 R600_ERR("r600: too many concurrent fences\n");
92 index
= ctx
->fences
.next_index
++;
94 if (!(index
% FENCE_BLOCK_SIZE
)) {
95 /* Allocate a new block */
96 block
= CALLOC_STRUCT(r600_fence_block
);
100 LIST_ADD(&block
->head
, &ctx
->fences
.blocks
);
102 block
= LIST_ENTRY(struct r600_fence_block
, ctx
->fences
.blocks
.next
, head
);
105 fence
= &block
->fences
[index
% FENCE_BLOCK_SIZE
];
107 fence
->index
= index
;
110 pipe_reference_init(&fence
->reference
, 1);
112 ctx
->fences
.data
[fence
->index
] = 0;
113 r600_context_emit_fence(&ctx
->ctx
, ctx
->fences
.bo
, fence
->index
, 1);
117 static void r600_flush(struct pipe_context
*ctx
,
118 struct pipe_fence_handle
**fence
)
120 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)ctx
;
121 struct r600_fence
**rfence
= (struct r600_fence
**)fence
;
129 *rfence
= r600_create_fence(rctx
);
132 sprintf(dname
, "gallium-%08d.bof", dc
);
134 r600_context_dump_bof(&rctx
->ctx
, dname
);
135 R600_ERR("dumped %s\n", dname
);
139 r600_context_flush(&rctx
->ctx
);
142 static void r600_update_num_contexts(struct r600_screen
*rscreen
, int diff
)
144 pipe_mutex_lock(rscreen
->mutex_num_contexts
);
146 rscreen
->num_contexts
++;
148 if (rscreen
->num_contexts
> 1)
149 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
150 UTIL_SLAB_MULTITHREADED
);
152 rscreen
->num_contexts
--;
154 if (rscreen
->num_contexts
<= 1)
155 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
156 UTIL_SLAB_SINGLETHREADED
);
158 pipe_mutex_unlock(rscreen
->mutex_num_contexts
);
161 static void r600_destroy_context(struct pipe_context
*context
)
163 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)context
;
165 rctx
->context
.delete_depth_stencil_alpha_state(&rctx
->context
, rctx
->custom_dsa_flush
);
166 util_unreference_framebuffer_state(&rctx
->framebuffer
);
168 r600_context_fini(&rctx
->ctx
);
170 util_blitter_destroy(rctx
->blitter
);
172 for (int i
= 0; i
< R600_PIPE_NSTATES
; i
++) {
173 free(rctx
->states
[i
]);
176 u_vbuf_mgr_destroy(rctx
->vbuf_mgr
);
177 util_slab_destroy(&rctx
->pool_transfers
);
179 if (rctx
->fences
.bo
) {
180 struct r600_fence_block
*entry
, *tmp
;
182 LIST_FOR_EACH_ENTRY_SAFE(entry
, tmp
, &rctx
->fences
.blocks
, head
) {
183 LIST_DEL(&entry
->head
);
187 r600_bo_unmap(rctx
->radeon
, rctx
->fences
.bo
);
188 r600_bo_reference(rctx
->radeon
, &rctx
->fences
.bo
, NULL
);
191 r600_update_num_contexts(rctx
->screen
, -1);
196 static struct pipe_context
*r600_create_context(struct pipe_screen
*screen
, void *priv
)
198 struct r600_pipe_context
*rctx
= CALLOC_STRUCT(r600_pipe_context
);
199 struct r600_screen
* rscreen
= (struct r600_screen
*)screen
;
200 enum chip_class
class;
205 r600_update_num_contexts(rscreen
, 1);
207 rctx
->context
.winsys
= rscreen
->screen
.winsys
;
208 rctx
->context
.screen
= screen
;
209 rctx
->context
.priv
= priv
;
210 rctx
->context
.destroy
= r600_destroy_context
;
211 rctx
->context
.flush
= r600_flush
;
213 /* Easy accessing of screen/winsys. */
214 rctx
->screen
= rscreen
;
215 rctx
->radeon
= rscreen
->radeon
;
216 rctx
->family
= r600_get_family(rctx
->radeon
);
218 rctx
->fences
.bo
= NULL
;
219 rctx
->fences
.data
= NULL
;
220 rctx
->fences
.next_index
= 0;
221 LIST_INITHEAD(&rctx
->fences
.pool
);
222 LIST_INITHEAD(&rctx
->fences
.blocks
);
224 r600_init_blit_functions(rctx
);
225 r600_init_query_functions(rctx
);
226 r600_init_context_resource_functions(rctx
);
227 r600_init_surface_functions(rctx
);
228 rctx
->context
.draw_vbo
= r600_draw_vbo
;
230 switch (r600_get_family(rctx
->radeon
)) {
243 r600_init_state_functions(rctx
);
244 if (r600_context_init(&rctx
->ctx
, rctx
->radeon
)) {
245 r600_destroy_context(&rctx
->context
);
248 r600_init_config(rctx
);
262 evergreen_init_state_functions(rctx
);
263 if (evergreen_context_init(&rctx
->ctx
, rctx
->radeon
)) {
264 r600_destroy_context(&rctx
->context
);
267 evergreen_init_config(rctx
);
270 R600_ERR("unsupported family %d\n", r600_get_family(rctx
->radeon
));
271 r600_destroy_context(&rctx
->context
);
275 util_slab_create(&rctx
->pool_transfers
,
276 sizeof(struct pipe_transfer
), 64,
277 UTIL_SLAB_SINGLETHREADED
);
279 rctx
->vbuf_mgr
= u_vbuf_mgr_create(&rctx
->context
, 1024 * 1024, 256,
280 PIPE_BIND_VERTEX_BUFFER
|
281 PIPE_BIND_INDEX_BUFFER
|
282 PIPE_BIND_CONSTANT_BUFFER
,
283 U_VERTEX_FETCH_DWORD_ALIGNED
);
284 if (!rctx
->vbuf_mgr
) {
285 r600_destroy_context(&rctx
->context
);
289 rctx
->blitter
= util_blitter_create(&rctx
->context
);
290 if (rctx
->blitter
== NULL
) {
291 r600_destroy_context(&rctx
->context
);
295 class = r600_get_family_class(rctx
->radeon
);
296 if (class == R600
|| class == R700
)
297 rctx
->custom_dsa_flush
= r600_create_db_flush_dsa(rctx
);
299 rctx
->custom_dsa_flush
= evergreen_create_db_flush_dsa(rctx
);
301 return &rctx
->context
;
304 static struct pipe_video_context
*
305 r600_video_create(struct pipe_screen
*screen
, struct pipe_context
*pipe
, void *priv
)
307 assert(screen
&& pipe
);
309 return vl_create_context(pipe
);
315 static const char* r600_get_vendor(struct pipe_screen
* pscreen
)
320 static const char *r600_get_family_name(enum radeon_family family
)
323 case CHIP_R600
: return "AMD R600";
324 case CHIP_RV610
: return "AMD RV610";
325 case CHIP_RV630
: return "AMD RV630";
326 case CHIP_RV670
: return "AMD RV670";
327 case CHIP_RV620
: return "AMD RV620";
328 case CHIP_RV635
: return "AMD RV635";
329 case CHIP_RS780
: return "AMD RS780";
330 case CHIP_RS880
: return "AMD RS880";
331 case CHIP_RV770
: return "AMD RV770";
332 case CHIP_RV730
: return "AMD RV730";
333 case CHIP_RV710
: return "AMD RV710";
334 case CHIP_RV740
: return "AMD RV740";
335 case CHIP_CEDAR
: return "AMD CEDAR";
336 case CHIP_REDWOOD
: return "AMD REDWOOD";
337 case CHIP_JUNIPER
: return "AMD JUNIPER";
338 case CHIP_CYPRESS
: return "AMD CYPRESS";
339 case CHIP_HEMLOCK
: return "AMD HEMLOCK";
340 case CHIP_PALM
: return "AMD PALM";
341 case CHIP_SUMO
: return "AMD SUMO";
342 case CHIP_SUMO2
: return "AMD SUMO2";
343 case CHIP_BARTS
: return "AMD BARTS";
344 case CHIP_TURKS
: return "AMD TURKS";
345 case CHIP_CAICOS
: return "AMD CAICOS";
346 case CHIP_CAYMAN
: return "AMD CAYMAN";
347 default: return "AMD unknown";
351 static const char* r600_get_name(struct pipe_screen
* pscreen
)
353 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
354 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
356 return r600_get_family_name(family
);
359 static int r600_get_param(struct pipe_screen
* pscreen
, enum pipe_cap param
)
361 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
362 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
365 /* Supported features (boolean caps). */
366 case PIPE_CAP_NPOT_TEXTURES
:
367 case PIPE_CAP_TWO_SIDED_STENCIL
:
369 case PIPE_CAP_DUAL_SOURCE_BLEND
:
370 case PIPE_CAP_ANISOTROPIC_FILTER
:
371 case PIPE_CAP_POINT_SPRITE
:
372 case PIPE_CAP_OCCLUSION_QUERY
:
373 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
374 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
375 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
376 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
377 case PIPE_CAP_TEXTURE_SWIZZLE
:
378 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
:
379 case PIPE_CAP_DEPTH_CLAMP
:
380 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
381 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
382 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
383 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
384 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
386 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
387 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL
:
390 /* Supported except the original R600. */
391 case PIPE_CAP_INDEP_BLEND_ENABLE
:
392 case PIPE_CAP_INDEP_BLEND_FUNC
:
393 /* R600 doesn't support per-MRT blends */
394 return family
== CHIP_R600
? 0 : 1;
396 /* Supported on Evergreen. */
397 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
398 return family
>= CHIP_CEDAR
? 1 : 0;
400 /* Unsupported features. */
401 case PIPE_CAP_STREAM_OUTPUT
:
402 case PIPE_CAP_PRIMITIVE_RESTART
:
403 case PIPE_CAP_TGSI_INSTANCEID
:
404 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
405 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
408 case PIPE_CAP_ARRAY_TEXTURES
:
409 /* fix once the CS checker upstream is fixed */
410 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE
);
413 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
414 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
415 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
416 if (family
>= CHIP_CEDAR
)
420 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
421 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
423 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
426 /* Render targets. */
427 case PIPE_CAP_MAX_RENDER_TARGETS
:
428 /* FIXME some r6xx are buggy and can only do 4 */
431 /* Timer queries, present when the clock frequency is non zero. */
432 case PIPE_CAP_TIMER_QUERY
:
433 return r600_get_clock_crystal_freq(rscreen
->radeon
) != 0;
436 R600_ERR("r600: unknown param %d\n", param
);
441 static float r600_get_paramf(struct pipe_screen
* pscreen
, enum pipe_cap param
)
443 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
444 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
447 case PIPE_CAP_MAX_LINE_WIDTH
:
448 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
449 case PIPE_CAP_MAX_POINT_WIDTH
:
450 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
451 if (family
>= CHIP_CEDAR
)
455 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
457 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
460 R600_ERR("r600: unsupported paramf %d\n", param
);
465 static int r600_get_shader_param(struct pipe_screen
* pscreen
, unsigned shader
, enum pipe_shader_cap param
)
469 case PIPE_SHADER_FRAGMENT
:
470 case PIPE_SHADER_VERTEX
:
472 case PIPE_SHADER_GEOMETRY
:
473 /* TODO: support and enable geometry programs */
476 /* TODO: support tessellation on Evergreen */
480 /* TODO: all these should be fixed, since r600 surely supports much more! */
482 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
483 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
484 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
485 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
487 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
488 return 8; /* FIXME */
489 case PIPE_SHADER_CAP_MAX_INPUTS
:
490 if(shader
== PIPE_SHADER_FRAGMENT
)
494 case PIPE_SHADER_CAP_MAX_TEMPS
:
495 return 256; /* Max native temporaries. */
496 case PIPE_SHADER_CAP_MAX_ADDRS
:
497 /* FIXME Isn't this equal to TEMPS? */
498 return 1; /* Max native address registers */
499 case PIPE_SHADER_CAP_MAX_CONSTS
:
500 return R600_MAX_CONST_BUFFER_SIZE
;
501 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
502 return R600_MAX_CONST_BUFFERS
;
503 case PIPE_SHADER_CAP_MAX_PREDS
:
504 return 0; /* FIXME */
505 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
507 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
508 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
509 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
510 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
512 case PIPE_SHADER_CAP_SUBROUTINES
:
519 static int r600_get_video_param(struct pipe_screen
*screen
,
520 enum pipe_video_profile profile
,
521 enum pipe_video_cap param
)
524 case PIPE_VIDEO_CAP_NPOT_TEXTURES
:
531 static boolean
r600_is_format_supported(struct pipe_screen
* screen
,
532 enum pipe_format format
,
533 enum pipe_texture_target target
,
534 unsigned sample_count
,
538 if (target
>= PIPE_MAX_TEXTURE_TYPES
) {
539 R600_ERR("r600: unsupported texture type %d\n", target
);
543 if (!util_format_is_supported(format
, usage
))
547 if (sample_count
> 1)
550 if ((usage
& PIPE_BIND_SAMPLER_VIEW
) &&
551 r600_is_sampler_format_supported(screen
, format
)) {
552 retval
|= PIPE_BIND_SAMPLER_VIEW
;
555 if ((usage
& (PIPE_BIND_RENDER_TARGET
|
556 PIPE_BIND_DISPLAY_TARGET
|
558 PIPE_BIND_SHARED
)) &&
559 r600_is_colorbuffer_format_supported(format
)) {
561 (PIPE_BIND_RENDER_TARGET
|
562 PIPE_BIND_DISPLAY_TARGET
|
567 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
568 r600_is_zs_format_supported(format
)) {
569 retval
|= PIPE_BIND_DEPTH_STENCIL
;
572 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
573 struct r600_screen
*rscreen
= (struct r600_screen
*)screen
;
574 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
576 if (r600_is_vertex_format_supported(format
, family
)) {
577 retval
|= PIPE_BIND_VERTEX_BUFFER
;
581 if (usage
& PIPE_BIND_TRANSFER_READ
)
582 retval
|= PIPE_BIND_TRANSFER_READ
;
583 if (usage
& PIPE_BIND_TRANSFER_WRITE
)
584 retval
|= PIPE_BIND_TRANSFER_WRITE
;
586 return retval
== usage
;
589 static void r600_destroy_screen(struct pipe_screen
* pscreen
)
591 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
596 radeon_decref(rscreen
->radeon
);
598 util_slab_destroy(&rscreen
->pool_buffers
);
599 pipe_mutex_destroy(rscreen
->mutex_num_contexts
);
603 static void r600_fence_reference(struct pipe_screen
*pscreen
,
604 struct pipe_fence_handle
**ptr
,
605 struct pipe_fence_handle
*fence
)
607 struct r600_fence
**oldf
= (struct r600_fence
**)ptr
;
608 struct r600_fence
*newf
= (struct r600_fence
*)fence
;
610 if (pipe_reference(&(*oldf
)->reference
, &newf
->reference
)) {
611 struct r600_pipe_context
*ctx
= (*oldf
)->ctx
;
612 LIST_ADDTAIL(&(*oldf
)->head
, &ctx
->fences
.pool
);
618 static boolean
r600_fence_signalled(struct pipe_screen
*pscreen
,
619 struct pipe_fence_handle
*fence
)
621 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
622 struct r600_pipe_context
*ctx
= rfence
->ctx
;
624 return ctx
->fences
.data
[rfence
->index
];
627 static boolean
r600_fence_finish(struct pipe_screen
*pscreen
,
628 struct pipe_fence_handle
*fence
,
631 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
632 struct r600_pipe_context
*ctx
= rfence
->ctx
;
633 int64_t start_time
= 0;
636 if (timeout
!= PIPE_TIMEOUT_INFINITE
) {
637 start_time
= os_time_get();
639 /* Convert to microseconds. */
643 while (ctx
->fences
.data
[rfence
->index
] == 0) {
651 if (timeout
!= PIPE_TIMEOUT_INFINITE
&&
652 os_time_get() - start_time
>= timeout
) {
660 struct pipe_screen
*r600_screen_create(struct radeon
*radeon
)
662 struct r600_screen
*rscreen
;
664 rscreen
= CALLOC_STRUCT(r600_screen
);
665 if (rscreen
== NULL
) {
669 rscreen
->radeon
= radeon
;
670 rscreen
->screen
.winsys
= (struct pipe_winsys
*)radeon
;
671 rscreen
->screen
.destroy
= r600_destroy_screen
;
672 rscreen
->screen
.get_name
= r600_get_name
;
673 rscreen
->screen
.get_vendor
= r600_get_vendor
;
674 rscreen
->screen
.get_param
= r600_get_param
;
675 rscreen
->screen
.get_shader_param
= r600_get_shader_param
;
676 rscreen
->screen
.get_paramf
= r600_get_paramf
;
677 rscreen
->screen
.get_video_param
= r600_get_video_param
;
678 rscreen
->screen
.is_format_supported
= r600_is_format_supported
;
679 rscreen
->screen
.is_video_format_supported
= vl_video_buffer_is_format_supported
;
680 rscreen
->screen
.context_create
= r600_create_context
;
681 rscreen
->screen
.video_context_create
= r600_video_create
;
682 rscreen
->screen
.fence_reference
= r600_fence_reference
;
683 rscreen
->screen
.fence_signalled
= r600_fence_signalled
;
684 rscreen
->screen
.fence_finish
= r600_fence_finish
;
685 r600_init_screen_resource_functions(&rscreen
->screen
);
687 rscreen
->tiling_info
= r600_get_tiling_info(radeon
);
688 util_format_s3tc_init();
690 util_slab_create(&rscreen
->pool_buffers
,
691 sizeof(struct r600_resource_buffer
), 64,
692 UTIL_SLAB_SINGLETHREADED
);
694 pipe_mutex_init(rscreen
->mutex_num_contexts
);
696 return &rscreen
->screen
;