src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_transfer.h>
  34 #include <util/u_surface.h>
  35 #include <util/u_pack_color.h>
  36 #include <util/u_memory.h>
  37 #include <util/u_inlines.h>
  38 #include <util/u_upload_mgr.h>
  39 #include <pipebuffer/pb_buffer.h>
  40 #include "r600.h"
  41 #include "r600d.h"
  42 #include "r600_resource.h"
  43 #include "r600_shader.h"
  44 #include "r600_pipe.h"
  45 #include "r600_state_inlines.h"
  46
  47 /*
  48  * pipe_context
  49  */
  50 static void r600_flush(struct pipe_context *ctx, unsigned flags,
  51                         struct pipe_fence_handle **fence)
  52 {
  53         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  54 #if 0
  55         static int dc = 0;
  56         char dname[256];
  57 #endif
  58
  59         if (!rctx->ctx.pm4_cdwords)
  60                 return;
  61
  62         u_upload_flush(rctx->upload_vb);
  63         u_upload_flush(rctx->upload_ib);
  64
  65 #if 0
  66         sprintf(dname, "gallium-%08d.bof", dc);
  67         if (dc < 20) {
  68                 r600_context_dump_bof(&rctx->ctx, dname);
  69                 R600_ERR("dumped %s\n", dname);
  70         }
  71         dc++;
  72 #endif
  73         r600_context_flush(&rctx->ctx);
  74 }
  75
  76 static void r600_destroy_context(struct pipe_context *context)
  77 {
  78         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
  79
  80         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
  81
  82         r600_context_fini(&rctx->ctx);
  83
  84         util_blitter_destroy(rctx->blitter);
  85
  86         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
  87                 free(rctx->states[i]);
  88         }
  89
  90         u_upload_destroy(rctx->upload_vb);
  91         u_upload_destroy(rctx->upload_ib);
  92
  93         if (rctx->tran.translate_cache)
  94                 translate_cache_destroy(rctx->tran.translate_cache);
  95
  96         FREE(rctx->ps_resource);
  97         FREE(rctx->vs_resource);
  98         FREE(rctx);
  99 }
 100
 101 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 102 {
 103         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 104         struct r600_screen* rscreen = (struct r600_screen *)screen;
 105         enum chip_class class;
 106
 107         if (rctx == NULL)
 108                 return NULL;
 109         rctx->context.winsys = rscreen->screen.winsys;
 110         rctx->context.screen = screen;
 111         rctx->context.priv = priv;
 112         rctx->context.destroy = r600_destroy_context;
 113         rctx->context.flush = r600_flush;
 114
 115         /* Easy accessing of screen/winsys. */
 116         rctx->screen = rscreen;
 117         rctx->radeon = rscreen->radeon;
 118         rctx->family = r600_get_family(rctx->radeon);
 119
 120         r600_init_blit_functions(rctx);
 121         r600_init_query_functions(rctx);
 122         r600_init_context_resource_functions(rctx);
 123         r600_init_surface_functions(rctx);
 124
 125         switch (r600_get_family(rctx->radeon)) {
 126         case CHIP_R600:
 127         case CHIP_RV610:
 128         case CHIP_RV630:
 129         case CHIP_RV670:
 130         case CHIP_RV620:
 131         case CHIP_RV635:
 132         case CHIP_RS780:
 133         case CHIP_RS880:
 134         case CHIP_RV770:
 135         case CHIP_RV730:
 136         case CHIP_RV710:
 137         case CHIP_RV740:
 138                 rctx->context.draw_vbo = r600_draw_vbo;
 139                 r600_init_state_functions(rctx);
 140                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 141                         r600_destroy_context(&rctx->context);
 142                         return NULL;
 143                 }
 144                 r600_init_config(rctx);
 145                 break;
 146         case CHIP_CEDAR:
 147         case CHIP_REDWOOD:
 148         case CHIP_JUNIPER:
 149         case CHIP_CYPRESS:
 150         case CHIP_HEMLOCK:
 151         case CHIP_PALM:
 152                 rctx->context.draw_vbo = evergreen_draw;
 153                 evergreen_init_state_functions(rctx);
 154                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 155                         r600_destroy_context(&rctx->context);
 156                         return NULL;
 157                 }
 158                 evergreen_init_config(rctx);
 159                 break;
 160         default:
 161                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 162                 r600_destroy_context(&rctx->context);
 163                 return NULL;
 164         }
 165
 166         rctx->upload_ib = u_upload_create(&rctx->context, 32 * 1024, 16,
 167                                           PIPE_BIND_INDEX_BUFFER);
 168         if (rctx->upload_ib == NULL) {
 169                 r600_destroy_context(&rctx->context);
 170                 return NULL;
 171         }
 172
 173         rctx->upload_vb = u_upload_create(&rctx->context, 128 * 1024, 16,
 174                                           PIPE_BIND_VERTEX_BUFFER);
 175         if (rctx->upload_vb == NULL) {
 176                 r600_destroy_context(&rctx->context);
 177                 return NULL;
 178         }
 179
 180         rctx->blitter = util_blitter_create(&rctx->context);
 181         if (rctx->blitter == NULL) {
 182                 FREE(rctx);
 183                 return NULL;
 184         }
 185
 186         rctx->tran.translate_cache = translate_cache_create();
 187         if (rctx->tran.translate_cache == NULL) {
 188                 FREE(rctx);
 189                 return NULL;
 190         }
 191
 192         rctx->vs_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 193         if (!rctx->vs_resource) {
 194                 FREE(rctx);
 195                 return NULL;
 196         }
 197
 198         rctx->ps_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 199         if (!rctx->ps_resource) {
 200                 FREE(rctx);
 201                 return NULL;
 202         }
 203
 204         class = r600_get_family_class(rctx->radeon);
 205         if (class == R600 || class == R700)
 206                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 207         else
 208                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 209
 210         r600_blit_uncompress_depth_ptr = r600_blit_uncompress_depth;
 211
 212         return &rctx->context;
 213 }
 214
 215 /*
 216  * pipe_screen
 217  */
 218 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 219 {
 220         return "X.Org";
 221 }
 222
 223 static const char *r600_get_family_name(enum radeon_family family)
 224 {
 225         switch(family) {
 226         case CHIP_R600: return "AMD R600";
 227         case CHIP_RV610: return "AMD RV610";
 228         case CHIP_RV630: return "AMD RV630";
 229         case CHIP_RV670: return "AMD RV670";
 230         case CHIP_RV620: return "AMD RV620";
 231         case CHIP_RV635: return "AMD RV635";
 232         case CHIP_RS780: return "AMD RS780";
 233         case CHIP_RS880: return "AMD RS880";
 234         case CHIP_RV770: return "AMD RV770";
 235         case CHIP_RV730: return "AMD RV730";
 236         case CHIP_RV710: return "AMD RV710";
 237         case CHIP_RV740: return "AMD RV740";
 238         case CHIP_CEDAR: return "AMD CEDAR";
 239         case CHIP_REDWOOD: return "AMD REDWOOD";
 240         case CHIP_JUNIPER: return "AMD JUNIPER";
 241         case CHIP_CYPRESS: return "AMD CYPRESS";
 242         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 243         case CHIP_PALM: return "AMD PALM";
 244         default: return "AMD unknown";
 245         }
 246 }
 247
 248 static const char* r600_get_name(struct pipe_screen* pscreen)
 249 {
 250         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 251         enum radeon_family family = r600_get_family(rscreen->radeon);
 252
 253         return r600_get_family_name(family);
 254 }
 255
 256 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 257 {
 258         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 259         enum radeon_family family = r600_get_family(rscreen->radeon);
 260
 261         switch (param) {
 262         /* Supported features (boolean caps). */
 263         case PIPE_CAP_NPOT_TEXTURES:
 264         case PIPE_CAP_TWO_SIDED_STENCIL:
 265         case PIPE_CAP_GLSL:
 266         case PIPE_CAP_DUAL_SOURCE_BLEND:
 267         case PIPE_CAP_ANISOTROPIC_FILTER:
 268         case PIPE_CAP_POINT_SPRITE:
 269         case PIPE_CAP_OCCLUSION_QUERY:
 270         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 271         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 272         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 273         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 274         case PIPE_CAP_SM3:
 275         case PIPE_CAP_TEXTURE_SWIZZLE:
 276         case PIPE_CAP_INDEP_BLEND_ENABLE:
 277         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 278         case PIPE_CAP_DEPTH_CLAMP:
 279         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 280                 return 1;
 281
 282         /* Unsupported features (boolean caps). */
 283         case PIPE_CAP_TIMER_QUERY:
 284         case PIPE_CAP_STREAM_OUTPUT:
 285         case PIPE_CAP_PRIMITIVE_RESTART:
 286         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 287                 return 0;
 288
 289         /* Texturing. */
 290         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 291         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 292         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 293                 if (family >= CHIP_CEDAR)
 294                         return 15;
 295                 else
 296                         return 14;
 297         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 298                 /* FIXME allow this once infrastructure is there */
 299                 return 16;
 300         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 301         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 302                 return 16;
 303
 304         /* Render targets. */
 305         case PIPE_CAP_MAX_RENDER_TARGETS:
 306                 /* FIXME some r6xx are buggy and can only do 4 */
 307                 return 8;
 308
 309         /* Fragment coordinate conventions. */
 310         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 311         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 312                 return 1;
 313         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 314         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 315                 return 0;
 316
 317         default:
 318                 R600_ERR("r600: unknown param %d\n", param);
 319                 return 0;
 320         }
 321 }
 322
 323 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 324 {
 325         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 326         enum radeon_family family = r600_get_family(rscreen->radeon);
 327
 328         switch (param) {
 329         case PIPE_CAP_MAX_LINE_WIDTH:
 330         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 331         case PIPE_CAP_MAX_POINT_WIDTH:
 332         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 333                 if (family >= CHIP_CEDAR)
 334                         return 16384.0f;
 335                 else
 336                         return 8192.0f;
 337         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 338                 return 16.0f;
 339         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 340                 return 16.0f;
 341         default:
 342                 R600_ERR("r600: unsupported paramf %d\n", param);
 343                 return 0.0f;
 344         }
 345 }
 346
 347 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 348 {
 349         switch(shader)
 350         {
 351         case PIPE_SHADER_FRAGMENT:
 352         case PIPE_SHADER_VERTEX:
 353                 break;
 354         case PIPE_SHADER_GEOMETRY:
 355                 /* TODO: support and enable geometry programs */
 356                 return 0;
 357         default:
 358                 /* TODO: support tessellation on Evergreen */
 359                 return 0;
 360         }
 361
 362         /* TODO: all these should be fixed, since r600 surely supports much more! */
 363         switch (param) {
 364         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 365         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 366         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 367         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 368                 return 16384;
 369         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 370                 return 8; /* FIXME */
 371         case PIPE_SHADER_CAP_MAX_INPUTS:
 372                 if(shader == PIPE_SHADER_FRAGMENT)
 373                         return 10;
 374                 else
 375                         return 16;
 376         case PIPE_SHADER_CAP_MAX_TEMPS:
 377                 return 256; //max native temporaries
 378         case PIPE_SHADER_CAP_MAX_ADDRS:
 379                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 380         case PIPE_SHADER_CAP_MAX_CONSTS:
 381                 return 256; //max native parameters
 382         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 383                 return 1;
 384         case PIPE_SHADER_CAP_MAX_PREDS:
 385                 return 0; /* FIXME */
 386         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 387                 return 1;
 388         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 389         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 390         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 391         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 392                 return 1;
 393         case PIPE_SHADER_CAP_SUBROUTINES:
 394                 return 0;
 395         default:
 396                 return 0;
 397         }
 398 }
 399
 400 static boolean r600_is_format_supported(struct pipe_screen* screen,
 401                                         enum pipe_format format,
 402                                         enum pipe_texture_target target,
 403                                         unsigned sample_count,
 404                                         unsigned usage,
 405                                         unsigned geom_flags)
 406 {
 407         unsigned retval = 0;
 408         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 409                 R600_ERR("r600: unsupported texture type %d\n", target);
 410                 return FALSE;
 411         }
 412
 413         /* Multisample */
 414         if (sample_count > 1)
 415                 return FALSE;
 416
 417         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 418             r600_is_sampler_format_supported(format)) {
 419                 retval |= PIPE_BIND_SAMPLER_VIEW;
 420         }
 421
 422         if ((usage & (PIPE_BIND_RENDER_TARGET |
 423                         PIPE_BIND_DISPLAY_TARGET |
 424                         PIPE_BIND_SCANOUT |
 425                         PIPE_BIND_SHARED)) &&
 426                         r600_is_colorbuffer_format_supported(format)) {
 427                 retval |= usage &
 428                         (PIPE_BIND_RENDER_TARGET |
 429                          PIPE_BIND_DISPLAY_TARGET |
 430                          PIPE_BIND_SCANOUT |
 431                          PIPE_BIND_SHARED);
 432         }
 433
 434         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 435             r600_is_zs_format_supported(format)) {
 436                 retval |= PIPE_BIND_DEPTH_STENCIL;
 437         }
 438
 439         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 440             r600_is_vertex_format_supported(format))
 441                 retval |= PIPE_BIND_VERTEX_BUFFER;
 442
 443         if (usage & PIPE_BIND_TRANSFER_READ)
 444                 retval |= PIPE_BIND_TRANSFER_READ;
 445         if (usage & PIPE_BIND_TRANSFER_WRITE)
 446                 retval |= PIPE_BIND_TRANSFER_WRITE;
 447
 448         return retval == usage;
 449 }
 450
 451 static void r600_destroy_screen(struct pipe_screen* pscreen)
 452 {
 453         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 454
 455         if (rscreen == NULL)
 456                 return;
 457
 458         radeon_decref(rscreen->radeon);
 459
 460         FREE(rscreen);
 461 }
 462
 463
 464 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 465 {
 466         struct r600_screen *rscreen;
 467
 468         rscreen = CALLOC_STRUCT(r600_screen);
 469         if (rscreen == NULL) {
 470                 return NULL;
 471         }
 472
 473         rscreen->radeon = radeon;
 474         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 475         rscreen->screen.destroy = r600_destroy_screen;
 476         rscreen->screen.get_name = r600_get_name;
 477         rscreen->screen.get_vendor = r600_get_vendor;
 478         rscreen->screen.get_param = r600_get_param;
 479         rscreen->screen.get_shader_param = r600_get_shader_param;
 480         rscreen->screen.get_paramf = r600_get_paramf;
 481         rscreen->screen.is_format_supported = r600_is_format_supported;
 482         rscreen->screen.context_create = r600_create_context;
 483         r600_init_screen_resource_functions(&rscreen->screen);
 484
 485         rscreen->tiling_info = r600_get_tiling_info(radeon);
 486
 487         return &rscreen->screen;
 488 }