2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <pipe/p_defines.h>
26 #include <pipe/p_state.h>
27 #include <pipe/p_context.h>
28 #include <tgsi/tgsi_scan.h>
29 #include <tgsi/tgsi_parse.h>
30 #include <tgsi/tgsi_util.h>
31 #include <util/u_blitter.h>
32 #include <util/u_double_list.h>
33 #include <util/u_format_s3tc.h>
34 #include <util/u_transfer.h>
35 #include <util/u_surface.h>
36 #include <util/u_pack_color.h>
37 #include <util/u_memory.h>
38 #include <util/u_inlines.h>
39 #include "util/u_upload_mgr.h"
40 #include "os/os_time.h"
41 #include <pipebuffer/pb_buffer.h>
44 #include "r600_resource.h"
45 #include "r600_shader.h"
46 #include "r600_pipe.h"
47 #include "r600_state_inlines.h"
52 static struct r600_fence
*r600_create_fence(struct r600_pipe_context
*ctx
)
54 struct r600_fence
*fence
= NULL
;
56 if (!ctx
->fences
.bo
) {
57 /* Create the shared buffer object */
58 ctx
->fences
.bo
= r600_bo(ctx
->radeon
, 4096, 0, 0, 0);
59 if (!ctx
->fences
.bo
) {
60 R600_ERR("r600: failed to create bo for fence objects\n");
63 ctx
->fences
.data
= r600_bo_map(ctx
->radeon
, ctx
->fences
.bo
, PB_USAGE_UNSYNCHRONIZED
, NULL
);
66 if (!LIST_IS_EMPTY(&ctx
->fences
.pool
)) {
67 struct r600_fence
*entry
;
69 /* Try to find a freed fence that has been signalled */
70 LIST_FOR_EACH_ENTRY(entry
, &ctx
->fences
.pool
, head
) {
71 if (ctx
->fences
.data
[entry
->index
] != 0) {
72 LIST_DELINIT(&entry
->head
);
80 /* Allocate a new fence */
81 struct r600_fence_block
*block
;
84 if ((ctx
->fences
.next_index
+ 1) >= 1024) {
85 R600_ERR("r600: too many concurrent fences\n");
89 index
= ctx
->fences
.next_index
++;
91 if (!(index
% FENCE_BLOCK_SIZE
)) {
92 /* Allocate a new block */
93 block
= CALLOC_STRUCT(r600_fence_block
);
97 LIST_ADD(&block
->head
, &ctx
->fences
.blocks
);
99 block
= LIST_ENTRY(struct r600_fence_block
, ctx
->fences
.blocks
.next
, head
);
102 fence
= &block
->fences
[index
% FENCE_BLOCK_SIZE
];
104 fence
->index
= index
;
107 pipe_reference_init(&fence
->reference
, 1);
109 ctx
->fences
.data
[fence
->index
] = 0;
110 r600_context_emit_fence(&ctx
->ctx
, ctx
->fences
.bo
, fence
->index
, 1);
114 static void r600_flush(struct pipe_context
*ctx
,
115 struct pipe_fence_handle
**fence
)
117 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)ctx
;
118 struct r600_fence
**rfence
= (struct r600_fence
**)fence
;
126 *rfence
= r600_create_fence(rctx
);
128 if (!rctx
->ctx
.pm4_cdwords
)
132 sprintf(dname
, "gallium-%08d.bof", dc
);
134 r600_context_dump_bof(&rctx
->ctx
, dname
);
135 R600_ERR("dumped %s\n", dname
);
139 r600_context_flush(&rctx
->ctx
);
141 /* XXX This shouldn't be really necessary, but removing it breaks some tests.
142 * Needless buffer reallocations may significantly increase memory consumption,
143 * so getting rid of this call is important. */
144 u_upload_flush(rctx
->vbuf_mgr
->uploader
);
147 static void r600_update_num_contexts(struct r600_screen
*rscreen
, int diff
)
149 pipe_mutex_lock(rscreen
->mutex_num_contexts
);
151 rscreen
->num_contexts
++;
153 if (rscreen
->num_contexts
> 1)
154 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
155 UTIL_SLAB_MULTITHREADED
);
157 rscreen
->num_contexts
--;
159 if (rscreen
->num_contexts
<= 1)
160 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
161 UTIL_SLAB_SINGLETHREADED
);
163 pipe_mutex_unlock(rscreen
->mutex_num_contexts
);
166 static void r600_destroy_context(struct pipe_context
*context
)
168 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)context
;
170 rctx
->context
.delete_depth_stencil_alpha_state(&rctx
->context
, rctx
->custom_dsa_flush
);
171 util_unreference_framebuffer_state(&rctx
->framebuffer
);
173 r600_context_fini(&rctx
->ctx
);
175 util_blitter_destroy(rctx
->blitter
);
177 for (int i
= 0; i
< R600_PIPE_NSTATES
; i
++) {
178 free(rctx
->states
[i
]);
181 u_vbuf_mgr_destroy(rctx
->vbuf_mgr
);
182 util_slab_destroy(&rctx
->pool_transfers
);
184 if (rctx
->fences
.bo
) {
185 struct r600_fence_block
*entry
, *tmp
;
187 LIST_FOR_EACH_ENTRY_SAFE(entry
, tmp
, &rctx
->fences
.blocks
, head
) {
188 LIST_DEL(&entry
->head
);
192 r600_bo_unmap(rctx
->radeon
, rctx
->fences
.bo
);
193 r600_bo_reference(rctx
->radeon
, &rctx
->fences
.bo
, NULL
);
196 r600_update_num_contexts(rctx
->screen
, -1);
201 static struct pipe_context
*r600_create_context(struct pipe_screen
*screen
, void *priv
)
203 struct r600_pipe_context
*rctx
= CALLOC_STRUCT(r600_pipe_context
);
204 struct r600_screen
* rscreen
= (struct r600_screen
*)screen
;
205 enum chip_class
class;
210 r600_update_num_contexts(rscreen
, 1);
212 rctx
->context
.winsys
= rscreen
->screen
.winsys
;
213 rctx
->context
.screen
= screen
;
214 rctx
->context
.priv
= priv
;
215 rctx
->context
.destroy
= r600_destroy_context
;
216 rctx
->context
.flush
= r600_flush
;
218 /* Easy accessing of screen/winsys. */
219 rctx
->screen
= rscreen
;
220 rctx
->radeon
= rscreen
->radeon
;
221 rctx
->family
= r600_get_family(rctx
->radeon
);
223 rctx
->fences
.bo
= NULL
;
224 rctx
->fences
.data
= NULL
;
225 rctx
->fences
.next_index
= 0;
226 LIST_INITHEAD(&rctx
->fences
.pool
);
227 LIST_INITHEAD(&rctx
->fences
.blocks
);
229 r600_init_blit_functions(rctx
);
230 r600_init_query_functions(rctx
);
231 r600_init_context_resource_functions(rctx
);
232 r600_init_surface_functions(rctx
);
233 rctx
->context
.draw_vbo
= r600_draw_vbo
;
235 switch (r600_get_family(rctx
->radeon
)) {
248 r600_init_state_functions(rctx
);
249 if (r600_context_init(&rctx
->ctx
, rctx
->radeon
)) {
250 r600_destroy_context(&rctx
->context
);
253 r600_init_config(rctx
);
264 evergreen_init_state_functions(rctx
);
265 if (evergreen_context_init(&rctx
->ctx
, rctx
->radeon
)) {
266 r600_destroy_context(&rctx
->context
);
269 evergreen_init_config(rctx
);
272 R600_ERR("unsupported family %d\n", r600_get_family(rctx
->radeon
));
273 r600_destroy_context(&rctx
->context
);
277 util_slab_create(&rctx
->pool_transfers
,
278 sizeof(struct pipe_transfer
), 64,
279 UTIL_SLAB_SINGLETHREADED
);
281 rctx
->vbuf_mgr
= u_vbuf_mgr_create(&rctx
->context
, 1024 * 1024, 256,
282 PIPE_BIND_VERTEX_BUFFER
|
283 PIPE_BIND_INDEX_BUFFER
|
284 PIPE_BIND_CONSTANT_BUFFER
,
285 U_VERTEX_FETCH_DWORD_ALIGNED
);
286 if (!rctx
->vbuf_mgr
) {
287 r600_destroy_context(&rctx
->context
);
291 rctx
->blitter
= util_blitter_create(&rctx
->context
);
292 if (rctx
->blitter
== NULL
) {
293 r600_destroy_context(&rctx
->context
);
297 class = r600_get_family_class(rctx
->radeon
);
298 if (class == R600
|| class == R700
)
299 rctx
->custom_dsa_flush
= r600_create_db_flush_dsa(rctx
);
301 rctx
->custom_dsa_flush
= evergreen_create_db_flush_dsa(rctx
);
303 return &rctx
->context
;
309 static const char* r600_get_vendor(struct pipe_screen
* pscreen
)
314 static const char *r600_get_family_name(enum radeon_family family
)
317 case CHIP_R600
: return "AMD R600";
318 case CHIP_RV610
: return "AMD RV610";
319 case CHIP_RV630
: return "AMD RV630";
320 case CHIP_RV670
: return "AMD RV670";
321 case CHIP_RV620
: return "AMD RV620";
322 case CHIP_RV635
: return "AMD RV635";
323 case CHIP_RS780
: return "AMD RS780";
324 case CHIP_RS880
: return "AMD RS880";
325 case CHIP_RV770
: return "AMD RV770";
326 case CHIP_RV730
: return "AMD RV730";
327 case CHIP_RV710
: return "AMD RV710";
328 case CHIP_RV740
: return "AMD RV740";
329 case CHIP_CEDAR
: return "AMD CEDAR";
330 case CHIP_REDWOOD
: return "AMD REDWOOD";
331 case CHIP_JUNIPER
: return "AMD JUNIPER";
332 case CHIP_CYPRESS
: return "AMD CYPRESS";
333 case CHIP_HEMLOCK
: return "AMD HEMLOCK";
334 case CHIP_PALM
: return "AMD PALM";
335 case CHIP_BARTS
: return "AMD BARTS";
336 case CHIP_TURKS
: return "AMD TURKS";
337 case CHIP_CAICOS
: return "AMD CAICOS";
338 default: return "AMD unknown";
342 static const char* r600_get_name(struct pipe_screen
* pscreen
)
344 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
345 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
347 return r600_get_family_name(family
);
350 static int r600_get_param(struct pipe_screen
* pscreen
, enum pipe_cap param
)
352 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
353 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
356 /* Supported features (boolean caps). */
357 case PIPE_CAP_NPOT_TEXTURES
:
358 case PIPE_CAP_TWO_SIDED_STENCIL
:
360 case PIPE_CAP_DUAL_SOURCE_BLEND
:
361 case PIPE_CAP_ANISOTROPIC_FILTER
:
362 case PIPE_CAP_POINT_SPRITE
:
363 case PIPE_CAP_OCCLUSION_QUERY
:
364 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
365 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
366 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
367 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
369 case PIPE_CAP_TEXTURE_SWIZZLE
:
370 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
:
371 case PIPE_CAP_DEPTH_CLAMP
:
372 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
373 case PIPE_CAP_TGSI_INSTANCEID
:
374 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
375 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
377 case PIPE_CAP_INDEP_BLEND_ENABLE
:
378 /* R600 doesn't support per-MRT blends */
379 if (family
== CHIP_R600
)
384 /* Unsupported features (boolean caps). */
385 case PIPE_CAP_STREAM_OUTPUT
:
386 case PIPE_CAP_PRIMITIVE_RESTART
:
387 case PIPE_CAP_INDEP_BLEND_FUNC
: /* FIXME allow this */
388 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL
:
389 /* R600 doesn't support per-MRT blends */
390 if (family
== CHIP_R600
)
395 case PIPE_CAP_ARRAY_TEXTURES
:
396 /* fix once the CS checker upstream is fixed */
397 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE
);
400 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
401 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
402 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
403 if (family
>= CHIP_CEDAR
)
407 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
408 /* FIXME allow this once infrastructure is there */
410 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
411 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
414 /* Render targets. */
415 case PIPE_CAP_MAX_RENDER_TARGETS
:
416 /* FIXME some r6xx are buggy and can only do 4 */
419 /* Fragment coordinate conventions. */
420 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
421 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
423 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
424 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
427 /* Timer queries, present when the clock frequency is non zero. */
428 case PIPE_CAP_TIMER_QUERY
:
429 return r600_get_clock_crystal_freq(rscreen
->radeon
) != 0;
432 R600_ERR("r600: unknown param %d\n", param
);
437 static float r600_get_paramf(struct pipe_screen
* pscreen
, enum pipe_cap param
)
439 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
440 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
443 case PIPE_CAP_MAX_LINE_WIDTH
:
444 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
445 case PIPE_CAP_MAX_POINT_WIDTH
:
446 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
447 if (family
>= CHIP_CEDAR
)
451 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
453 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
456 R600_ERR("r600: unsupported paramf %d\n", param
);
461 static int r600_get_shader_param(struct pipe_screen
* pscreen
, unsigned shader
, enum pipe_shader_cap param
)
465 case PIPE_SHADER_FRAGMENT
:
466 case PIPE_SHADER_VERTEX
:
468 case PIPE_SHADER_GEOMETRY
:
469 /* TODO: support and enable geometry programs */
472 /* TODO: support tessellation on Evergreen */
476 /* TODO: all these should be fixed, since r600 surely supports much more! */
478 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
479 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
480 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
481 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
483 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
484 return 8; /* FIXME */
485 case PIPE_SHADER_CAP_MAX_INPUTS
:
486 if(shader
== PIPE_SHADER_FRAGMENT
)
490 case PIPE_SHADER_CAP_MAX_TEMPS
:
491 return 256; //max native temporaries
492 case PIPE_SHADER_CAP_MAX_ADDRS
:
493 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
494 case PIPE_SHADER_CAP_MAX_CONSTS
:
495 return R600_MAX_CONST_BUFFER_SIZE
;
496 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
497 return R600_MAX_CONST_BUFFERS
;
498 case PIPE_SHADER_CAP_MAX_PREDS
:
499 return 0; /* FIXME */
500 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
502 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
503 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
504 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
505 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
507 case PIPE_SHADER_CAP_SUBROUTINES
:
514 static boolean
r600_is_format_supported(struct pipe_screen
* screen
,
515 enum pipe_format format
,
516 enum pipe_texture_target target
,
517 unsigned sample_count
,
521 if (target
>= PIPE_MAX_TEXTURE_TYPES
) {
522 R600_ERR("r600: unsupported texture type %d\n", target
);
527 if (sample_count
> 1)
530 if ((usage
& PIPE_BIND_SAMPLER_VIEW
) &&
531 r600_is_sampler_format_supported(screen
, format
)) {
532 retval
|= PIPE_BIND_SAMPLER_VIEW
;
535 if ((usage
& (PIPE_BIND_RENDER_TARGET
|
536 PIPE_BIND_DISPLAY_TARGET
|
538 PIPE_BIND_SHARED
)) &&
539 r600_is_colorbuffer_format_supported(format
)) {
541 (PIPE_BIND_RENDER_TARGET
|
542 PIPE_BIND_DISPLAY_TARGET
|
547 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
548 r600_is_zs_format_supported(format
)) {
549 retval
|= PIPE_BIND_DEPTH_STENCIL
;
552 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
553 struct r600_screen
*rscreen
= (struct r600_screen
*)screen
;
554 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
556 if (r600_is_vertex_format_supported(format
, family
)) {
557 retval
|= PIPE_BIND_VERTEX_BUFFER
;
561 if (usage
& PIPE_BIND_TRANSFER_READ
)
562 retval
|= PIPE_BIND_TRANSFER_READ
;
563 if (usage
& PIPE_BIND_TRANSFER_WRITE
)
564 retval
|= PIPE_BIND_TRANSFER_WRITE
;
566 return retval
== usage
;
569 static void r600_destroy_screen(struct pipe_screen
* pscreen
)
571 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
576 radeon_decref(rscreen
->radeon
);
578 util_slab_destroy(&rscreen
->pool_buffers
);
579 pipe_mutex_destroy(rscreen
->mutex_num_contexts
);
583 static void r600_fence_reference(struct pipe_screen
*pscreen
,
584 struct pipe_fence_handle
**ptr
,
585 struct pipe_fence_handle
*fence
)
587 struct r600_fence
**oldf
= (struct r600_fence
**)ptr
;
588 struct r600_fence
*newf
= (struct r600_fence
*)fence
;
590 if (pipe_reference(&(*oldf
)->reference
, &newf
->reference
)) {
591 struct r600_pipe_context
*ctx
= (*oldf
)->ctx
;
592 LIST_ADDTAIL(&(*oldf
)->head
, &ctx
->fences
.pool
);
598 static boolean
r600_fence_signalled(struct pipe_screen
*pscreen
,
599 struct pipe_fence_handle
*fence
)
601 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
602 struct r600_pipe_context
*ctx
= rfence
->ctx
;
604 return ctx
->fences
.data
[rfence
->index
];
607 static boolean
r600_fence_finish(struct pipe_screen
*pscreen
,
608 struct pipe_fence_handle
*fence
,
611 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
612 struct r600_pipe_context
*ctx
= rfence
->ctx
;
613 int64_t start_time
= 0;
616 if (timeout
!= PIPE_TIMEOUT_INFINITE
) {
617 start_time
= os_time_get();
619 /* Convert to microseconds. */
623 while (ctx
->fences
.data
[rfence
->index
] == 0) {
631 if (timeout
!= PIPE_TIMEOUT_INFINITE
&&
632 os_time_get() - start_time
>= timeout
) {
640 struct pipe_screen
*r600_screen_create(struct radeon
*radeon
)
642 struct r600_screen
*rscreen
;
644 rscreen
= CALLOC_STRUCT(r600_screen
);
645 if (rscreen
== NULL
) {
649 rscreen
->radeon
= radeon
;
650 rscreen
->screen
.winsys
= (struct pipe_winsys
*)radeon
;
651 rscreen
->screen
.destroy
= r600_destroy_screen
;
652 rscreen
->screen
.get_name
= r600_get_name
;
653 rscreen
->screen
.get_vendor
= r600_get_vendor
;
654 rscreen
->screen
.get_param
= r600_get_param
;
655 rscreen
->screen
.get_shader_param
= r600_get_shader_param
;
656 rscreen
->screen
.get_paramf
= r600_get_paramf
;
657 rscreen
->screen
.is_format_supported
= r600_is_format_supported
;
658 rscreen
->screen
.context_create
= r600_create_context
;
659 rscreen
->screen
.fence_reference
= r600_fence_reference
;
660 rscreen
->screen
.fence_signalled
= r600_fence_signalled
;
661 rscreen
->screen
.fence_finish
= r600_fence_finish
;
662 r600_init_screen_resource_functions(&rscreen
->screen
);
664 rscreen
->tiling_info
= r600_get_tiling_info(radeon
);
665 util_format_s3tc_init();
667 util_slab_create(&rscreen
->pool_buffers
,
668 sizeof(struct r600_resource_buffer
), 64,
669 UTIL_SLAB_SINGLETHREADED
);
671 pipe_mutex_init(rscreen
->mutex_num_contexts
);
673 return &rscreen
->screen
;