2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <pipe/p_defines.h>
26 #include <pipe/p_state.h>
27 #include <pipe/p_context.h>
28 #include <tgsi/tgsi_scan.h>
29 #include <tgsi/tgsi_parse.h>
30 #include <tgsi/tgsi_util.h>
31 #include <util/u_blitter.h>
32 #include <util/u_double_list.h>
33 #include "util/u_format.h"
34 #include <util/u_format_s3tc.h>
35 #include <util/u_transfer.h>
36 #include <util/u_surface.h>
37 #include <util/u_pack_color.h>
38 #include <util/u_memory.h>
39 #include <util/u_inlines.h>
40 #include "util/u_upload_mgr.h"
41 #include <vl/vl_decoder.h>
42 #include <vl/vl_video_buffer.h>
43 #include "os/os_time.h"
44 #include <pipebuffer/pb_buffer.h>
47 #include "r600_resource.h"
48 #include "r600_shader.h"
49 #include "r600_pipe.h"
50 #include "../../winsys/r600/drm/r600_drm_public.h"
55 static struct r600_fence
*r600_create_fence(struct r600_pipe_context
*ctx
)
57 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)ctx
;
58 struct r600_fence
*fence
= NULL
;
60 if (!ctx
->fences
.bo
) {
61 /* Create the shared buffer object */
62 ctx
->fences
.bo
= r600_bo(ctx
->radeon
, 4096, 0, 0, 0);
63 if (!ctx
->fences
.bo
) {
64 R600_ERR("r600: failed to create bo for fence objects\n");
67 ctx
->fences
.data
= r600_bo_map(ctx
->radeon
, ctx
->fences
.bo
, rctx
->ctx
.cs
,
68 PIPE_TRANSFER_UNSYNCHRONIZED
| PIPE_TRANSFER_WRITE
);
71 if (!LIST_IS_EMPTY(&ctx
->fences
.pool
)) {
72 struct r600_fence
*entry
;
74 /* Try to find a freed fence that has been signalled */
75 LIST_FOR_EACH_ENTRY(entry
, &ctx
->fences
.pool
, head
) {
76 if (ctx
->fences
.data
[entry
->index
] != 0) {
77 LIST_DELINIT(&entry
->head
);
85 /* Allocate a new fence */
86 struct r600_fence_block
*block
;
89 if ((ctx
->fences
.next_index
+ 1) >= 1024) {
90 R600_ERR("r600: too many concurrent fences\n");
94 index
= ctx
->fences
.next_index
++;
96 if (!(index
% FENCE_BLOCK_SIZE
)) {
97 /* Allocate a new block */
98 block
= CALLOC_STRUCT(r600_fence_block
);
102 LIST_ADD(&block
->head
, &ctx
->fences
.blocks
);
104 block
= LIST_ENTRY(struct r600_fence_block
, ctx
->fences
.blocks
.next
, head
);
107 fence
= &block
->fences
[index
% FENCE_BLOCK_SIZE
];
109 fence
->index
= index
;
112 pipe_reference_init(&fence
->reference
, 1);
114 ctx
->fences
.data
[fence
->index
] = 0;
115 r600_context_emit_fence(&ctx
->ctx
, ctx
->fences
.bo
, fence
->index
, 1);
120 void r600_flush(struct pipe_context
*ctx
, struct pipe_fence_handle
**fence
,
123 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)ctx
;
124 struct r600_fence
**rfence
= (struct r600_fence
**)fence
;
127 *rfence
= r600_create_fence(rctx
);
129 r600_context_flush(&rctx
->ctx
, flags
);
132 static void r600_flush_from_st(struct pipe_context
*ctx
,
133 struct pipe_fence_handle
**fence
)
135 r600_flush(ctx
, fence
, 0);
138 static void r600_flush_from_winsys(void *ctx
, unsigned flags
)
140 r600_flush((struct pipe_context
*)ctx
, NULL
, flags
);
143 static void r600_update_num_contexts(struct r600_screen
*rscreen
, int diff
)
145 pipe_mutex_lock(rscreen
->mutex_num_contexts
);
147 rscreen
->num_contexts
++;
149 if (rscreen
->num_contexts
> 1)
150 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
151 UTIL_SLAB_MULTITHREADED
);
153 rscreen
->num_contexts
--;
155 if (rscreen
->num_contexts
<= 1)
156 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
157 UTIL_SLAB_SINGLETHREADED
);
159 pipe_mutex_unlock(rscreen
->mutex_num_contexts
);
162 static void r600_destroy_context(struct pipe_context
*context
)
164 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)context
;
166 rctx
->context
.delete_depth_stencil_alpha_state(&rctx
->context
, rctx
->custom_dsa_flush
);
167 util_unreference_framebuffer_state(&rctx
->framebuffer
);
169 r600_context_fini(&rctx
->ctx
);
171 util_blitter_destroy(rctx
->blitter
);
173 for (int i
= 0; i
< R600_PIPE_NSTATES
; i
++) {
174 free(rctx
->states
[i
]);
177 u_vbuf_mgr_destroy(rctx
->vbuf_mgr
);
178 util_slab_destroy(&rctx
->pool_transfers
);
180 if (rctx
->fences
.bo
) {
181 struct r600_fence_block
*entry
, *tmp
;
183 LIST_FOR_EACH_ENTRY_SAFE(entry
, tmp
, &rctx
->fences
.blocks
, head
) {
184 LIST_DEL(&entry
->head
);
188 r600_bo_unmap(rctx
->radeon
, rctx
->fences
.bo
);
189 r600_bo_reference(&rctx
->fences
.bo
, NULL
);
192 r600_update_num_contexts(rctx
->screen
, -1);
197 static struct pipe_context
*r600_create_context(struct pipe_screen
*screen
, void *priv
)
199 struct r600_pipe_context
*rctx
= CALLOC_STRUCT(r600_pipe_context
);
200 struct r600_screen
* rscreen
= (struct r600_screen
*)screen
;
205 r600_update_num_contexts(rscreen
, 1);
207 rctx
->context
.winsys
= rscreen
->screen
.winsys
;
208 rctx
->context
.screen
= screen
;
209 rctx
->context
.priv
= priv
;
210 rctx
->context
.destroy
= r600_destroy_context
;
211 rctx
->context
.flush
= r600_flush_from_st
;
213 /* Easy accessing of screen/winsys. */
214 rctx
->screen
= rscreen
;
215 rctx
->radeon
= rscreen
->radeon
;
216 rctx
->family
= r600_get_family(rctx
->radeon
);
217 rctx
->chip_class
= r600_get_family_class(rctx
->radeon
);
219 rctx
->fences
.bo
= NULL
;
220 rctx
->fences
.data
= NULL
;
221 rctx
->fences
.next_index
= 0;
222 LIST_INITHEAD(&rctx
->fences
.pool
);
223 LIST_INITHEAD(&rctx
->fences
.blocks
);
225 r600_init_blit_functions(rctx
);
226 r600_init_query_functions(rctx
);
227 r600_init_context_resource_functions(rctx
);
228 r600_init_surface_functions(rctx
);
229 rctx
->context
.draw_vbo
= r600_draw_vbo
;
231 rctx
->context
.create_video_decoder
= vl_create_decoder
;
232 rctx
->context
.create_video_buffer
= vl_video_buffer_create
;
234 switch (rctx
->chip_class
) {
237 r600_init_state_functions(rctx
);
238 if (r600_context_init(&rctx
->ctx
, rctx
->radeon
)) {
239 r600_destroy_context(&rctx
->context
);
242 r600_init_config(rctx
);
243 rctx
->custom_dsa_flush
= r600_create_db_flush_dsa(rctx
);
247 evergreen_init_state_functions(rctx
);
248 if (evergreen_context_init(&rctx
->ctx
, rctx
->radeon
)) {
249 r600_destroy_context(&rctx
->context
);
252 evergreen_init_config(rctx
);
253 rctx
->custom_dsa_flush
= evergreen_create_db_flush_dsa(rctx
);
256 R600_ERR("Unsupported chip class %d.\n", rctx
->chip_class
);
257 r600_destroy_context(&rctx
->context
);
261 rctx
->screen
->ws
->cs_set_flush_callback(rctx
->ctx
.cs
, r600_flush_from_winsys
, rctx
);
263 util_slab_create(&rctx
->pool_transfers
,
264 sizeof(struct pipe_transfer
), 64,
265 UTIL_SLAB_SINGLETHREADED
);
267 rctx
->vbuf_mgr
= u_vbuf_mgr_create(&rctx
->context
, 1024 * 1024, 256,
268 PIPE_BIND_VERTEX_BUFFER
|
269 PIPE_BIND_INDEX_BUFFER
|
270 PIPE_BIND_CONSTANT_BUFFER
,
271 U_VERTEX_FETCH_DWORD_ALIGNED
);
272 if (!rctx
->vbuf_mgr
) {
273 r600_destroy_context(&rctx
->context
);
276 rctx
->vbuf_mgr
->caps
.format_fixed32
= 0;
278 rctx
->blitter
= util_blitter_create(&rctx
->context
);
279 if (rctx
->blitter
== NULL
) {
280 r600_destroy_context(&rctx
->context
);
284 return &rctx
->context
;
290 static const char* r600_get_vendor(struct pipe_screen
* pscreen
)
295 static const char *r600_get_family_name(enum radeon_family family
)
298 case CHIP_R600
: return "AMD R600";
299 case CHIP_RV610
: return "AMD RV610";
300 case CHIP_RV630
: return "AMD RV630";
301 case CHIP_RV670
: return "AMD RV670";
302 case CHIP_RV620
: return "AMD RV620";
303 case CHIP_RV635
: return "AMD RV635";
304 case CHIP_RS780
: return "AMD RS780";
305 case CHIP_RS880
: return "AMD RS880";
306 case CHIP_RV770
: return "AMD RV770";
307 case CHIP_RV730
: return "AMD RV730";
308 case CHIP_RV710
: return "AMD RV710";
309 case CHIP_RV740
: return "AMD RV740";
310 case CHIP_CEDAR
: return "AMD CEDAR";
311 case CHIP_REDWOOD
: return "AMD REDWOOD";
312 case CHIP_JUNIPER
: return "AMD JUNIPER";
313 case CHIP_CYPRESS
: return "AMD CYPRESS";
314 case CHIP_HEMLOCK
: return "AMD HEMLOCK";
315 case CHIP_PALM
: return "AMD PALM";
316 case CHIP_SUMO
: return "AMD SUMO";
317 case CHIP_SUMO2
: return "AMD SUMO2";
318 case CHIP_BARTS
: return "AMD BARTS";
319 case CHIP_TURKS
: return "AMD TURKS";
320 case CHIP_CAICOS
: return "AMD CAICOS";
321 case CHIP_CAYMAN
: return "AMD CAYMAN";
322 default: return "AMD unknown";
326 static const char* r600_get_name(struct pipe_screen
* pscreen
)
328 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
329 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
331 return r600_get_family_name(family
);
334 static int r600_get_param(struct pipe_screen
* pscreen
, enum pipe_cap param
)
336 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
337 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
340 /* Supported features (boolean caps). */
341 case PIPE_CAP_NPOT_TEXTURES
:
342 case PIPE_CAP_TWO_SIDED_STENCIL
:
344 case PIPE_CAP_DUAL_SOURCE_BLEND
:
345 case PIPE_CAP_ANISOTROPIC_FILTER
:
346 case PIPE_CAP_POINT_SPRITE
:
347 case PIPE_CAP_OCCLUSION_QUERY
:
348 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
349 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
350 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
351 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
352 case PIPE_CAP_TEXTURE_SWIZZLE
:
353 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
:
354 case PIPE_CAP_DEPTH_CLAMP
:
355 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
356 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
357 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
358 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
359 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
361 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
362 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL
:
363 case PIPE_CAP_PRIMITIVE_RESTART
:
366 /* Supported except the original R600. */
367 case PIPE_CAP_INDEP_BLEND_ENABLE
:
368 case PIPE_CAP_INDEP_BLEND_FUNC
:
369 /* R600 doesn't support per-MRT blends */
370 return family
== CHIP_R600
? 0 : 1;
372 /* Supported on Evergreen. */
373 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
374 return family
>= CHIP_CEDAR
? 1 : 0;
376 /* Unsupported features. */
377 case PIPE_CAP_STREAM_OUTPUT
:
378 case PIPE_CAP_TGSI_INSTANCEID
:
379 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
380 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
383 case PIPE_CAP_ARRAY_TEXTURES
:
384 /* fix once the CS checker upstream is fixed */
385 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE
);
388 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
389 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
390 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
391 if (family
>= CHIP_CEDAR
)
395 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
396 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
398 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
401 /* Render targets. */
402 case PIPE_CAP_MAX_RENDER_TARGETS
:
403 /* FIXME some r6xx are buggy and can only do 4 */
406 /* Timer queries, present when the clock frequency is non zero. */
407 case PIPE_CAP_TIMER_QUERY
:
408 return r600_get_clock_crystal_freq(rscreen
->radeon
) != 0;
411 R600_ERR("r600: unknown param %d\n", param
);
416 static float r600_get_paramf(struct pipe_screen
* pscreen
, enum pipe_cap param
)
418 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
419 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
422 case PIPE_CAP_MAX_LINE_WIDTH
:
423 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
424 case PIPE_CAP_MAX_POINT_WIDTH
:
425 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
426 if (family
>= CHIP_CEDAR
)
430 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
432 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
435 R600_ERR("r600: unsupported paramf %d\n", param
);
440 static int r600_get_shader_param(struct pipe_screen
* pscreen
, unsigned shader
, enum pipe_shader_cap param
)
444 case PIPE_SHADER_FRAGMENT
:
445 case PIPE_SHADER_VERTEX
:
447 case PIPE_SHADER_GEOMETRY
:
448 /* TODO: support and enable geometry programs */
451 /* TODO: support tessellation on Evergreen */
455 /* TODO: all these should be fixed, since r600 surely supports much more! */
457 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
458 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
459 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
460 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
462 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
463 return 8; /* FIXME */
464 case PIPE_SHADER_CAP_MAX_INPUTS
:
465 if(shader
== PIPE_SHADER_FRAGMENT
)
469 case PIPE_SHADER_CAP_MAX_TEMPS
:
470 return 256; /* Max native temporaries. */
471 case PIPE_SHADER_CAP_MAX_ADDRS
:
472 /* FIXME Isn't this equal to TEMPS? */
473 return 1; /* Max native address registers */
474 case PIPE_SHADER_CAP_MAX_CONSTS
:
475 return R600_MAX_CONST_BUFFER_SIZE
;
476 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
477 return R600_MAX_CONST_BUFFERS
;
478 case PIPE_SHADER_CAP_MAX_PREDS
:
479 return 0; /* FIXME */
480 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
482 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
483 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
484 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
485 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
487 case PIPE_SHADER_CAP_SUBROUTINES
:
489 case PIPE_SHADER_CAP_INTEGERS
:
496 static int r600_get_video_param(struct pipe_screen
*screen
,
497 enum pipe_video_profile profile
,
498 enum pipe_video_cap param
)
501 case PIPE_VIDEO_CAP_SUPPORTED
:
502 return vl_profile_supported(screen
, profile
);
503 case PIPE_VIDEO_CAP_NPOT_TEXTURES
:
505 case PIPE_VIDEO_CAP_MAX_WIDTH
:
506 case PIPE_VIDEO_CAP_MAX_HEIGHT
:
507 return vl_video_buffer_max_size(screen
);
508 case PIPE_VIDEO_CAP_NUM_BUFFERS_DESIRED
:
509 return vl_num_buffers_desired(screen
, profile
);
515 static void r600_destroy_screen(struct pipe_screen
* pscreen
)
517 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
522 radeon_destroy(rscreen
->radeon
);
523 rscreen
->ws
->destroy(rscreen
->ws
);
525 util_slab_destroy(&rscreen
->pool_buffers
);
526 pipe_mutex_destroy(rscreen
->mutex_num_contexts
);
530 static void r600_fence_reference(struct pipe_screen
*pscreen
,
531 struct pipe_fence_handle
**ptr
,
532 struct pipe_fence_handle
*fence
)
534 struct r600_fence
**oldf
= (struct r600_fence
**)ptr
;
535 struct r600_fence
*newf
= (struct r600_fence
*)fence
;
537 if (pipe_reference(&(*oldf
)->reference
, &newf
->reference
)) {
538 struct r600_pipe_context
*ctx
= (*oldf
)->ctx
;
539 LIST_ADDTAIL(&(*oldf
)->head
, &ctx
->fences
.pool
);
545 static boolean
r600_fence_signalled(struct pipe_screen
*pscreen
,
546 struct pipe_fence_handle
*fence
)
548 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
549 struct r600_pipe_context
*ctx
= rfence
->ctx
;
551 return ctx
->fences
.data
[rfence
->index
];
554 static boolean
r600_fence_finish(struct pipe_screen
*pscreen
,
555 struct pipe_fence_handle
*fence
,
558 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
559 struct r600_pipe_context
*ctx
= rfence
->ctx
;
560 int64_t start_time
= 0;
563 if (timeout
!= PIPE_TIMEOUT_INFINITE
) {
564 start_time
= os_time_get();
566 /* Convert to microseconds. */
570 while (ctx
->fences
.data
[rfence
->index
] == 0) {
578 if (timeout
!= PIPE_TIMEOUT_INFINITE
&&
579 os_time_get() - start_time
>= timeout
) {
587 struct pipe_screen
*r600_screen_create(struct radeon_winsys
*ws
)
589 struct r600_screen
*rscreen
;
590 struct radeon
*radeon
= radeon_create(ws
);
592 rscreen
= CALLOC_STRUCT(r600_screen
);
593 if (rscreen
== NULL
) {
598 rscreen
->radeon
= radeon
;
599 rscreen
->screen
.winsys
= (struct pipe_winsys
*)ws
;
600 rscreen
->screen
.destroy
= r600_destroy_screen
;
601 rscreen
->screen
.get_name
= r600_get_name
;
602 rscreen
->screen
.get_vendor
= r600_get_vendor
;
603 rscreen
->screen
.get_param
= r600_get_param
;
604 rscreen
->screen
.get_shader_param
= r600_get_shader_param
;
605 rscreen
->screen
.get_paramf
= r600_get_paramf
;
606 rscreen
->screen
.get_video_param
= r600_get_video_param
;
607 if (r600_get_family_class(radeon
) >= EVERGREEN
) {
608 rscreen
->screen
.is_format_supported
= evergreen_is_format_supported
;
610 rscreen
->screen
.is_format_supported
= r600_is_format_supported
;
612 rscreen
->screen
.is_video_format_supported
= vl_video_buffer_is_format_supported
;
613 rscreen
->screen
.context_create
= r600_create_context
;
614 rscreen
->screen
.fence_reference
= r600_fence_reference
;
615 rscreen
->screen
.fence_signalled
= r600_fence_signalled
;
616 rscreen
->screen
.fence_finish
= r600_fence_finish
;
617 r600_init_screen_resource_functions(&rscreen
->screen
);
619 rscreen
->tiling_info
= r600_get_tiling_info(radeon
);
620 util_format_s3tc_init();
622 util_slab_create(&rscreen
->pool_buffers
,
623 sizeof(struct r600_resource_buffer
), 64,
624 UTIL_SLAB_SINGLETHREADED
);
626 pipe_mutex_init(rscreen
->mutex_num_contexts
);
628 return &rscreen
->screen
;