src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_transfer.h>
  34 #include <util/u_surface.h>
  35 #include <util/u_pack_color.h>
  36 #include <util/u_memory.h>
  37 #include <util/u_inlines.h>
  38 #include <pipebuffer/pb_buffer.h>
  39 #include "r600.h"
  40 #include "r600d.h"
  41 #include "r600_resource.h"
  42 #include "r600_shader.h"
  43 #include "r600_pipe.h"
  44 #include "r600_state_inlines.h"
  45
  46 /*
  47  * pipe_context
  48  */
  49 static void r600_flush(struct pipe_context *ctx, unsigned flags,
  50                         struct pipe_fence_handle **fence)
  51 {
  52         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  53 #if 0
  54         static int dc = 0;
  55         char dname[256];
  56 #endif
  57
  58         if (!rctx->ctx.pm4_cdwords)
  59                 return;
  60
  61 #if 0
  62         sprintf(dname, "gallium-%08d.bof", dc);
  63         if (dc < 20) {
  64                 r600_context_dump_bof(&rctx->ctx, dname);
  65                 R600_ERR("dumped %s\n", dname);
  66         }
  67         dc++;
  68 #endif
  69         r600_context_flush(&rctx->ctx);
  70
  71         r600_upload_flush(rctx->rupload_vb);
  72         r600_upload_flush(rctx->rupload_const);
  73 }
  74
  75 static void r600_destroy_context(struct pipe_context *context)
  76 {
  77         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
  78
  79         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
  80
  81         r600_end_vertex_translate(rctx);
  82
  83         r600_context_fini(&rctx->ctx);
  84
  85         util_blitter_destroy(rctx->blitter);
  86
  87         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
  88                 free(rctx->states[i]);
  89         }
  90
  91         r600_upload_destroy(rctx->rupload_vb);
  92         r600_upload_destroy(rctx->rupload_const);
  93
  94         if (rctx->tran.translate_cache)
  95                 translate_cache_destroy(rctx->tran.translate_cache);
  96
  97         FREE(rctx->ps_resource);
  98         FREE(rctx->vs_resource);
  99         FREE(rctx);
 100 }
 101
 102 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 103 {
 104         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 105         struct r600_screen* rscreen = (struct r600_screen *)screen;
 106         enum chip_class class;
 107
 108         if (rctx == NULL)
 109                 return NULL;
 110         rctx->context.winsys = rscreen->screen.winsys;
 111         rctx->context.screen = screen;
 112         rctx->context.priv = priv;
 113         rctx->context.destroy = r600_destroy_context;
 114         rctx->context.flush = r600_flush;
 115
 116         /* Easy accessing of screen/winsys. */
 117         rctx->screen = rscreen;
 118         rctx->radeon = rscreen->radeon;
 119         rctx->family = r600_get_family(rctx->radeon);
 120
 121         r600_init_blit_functions(rctx);
 122         r600_init_query_functions(rctx);
 123         r600_init_context_resource_functions(rctx);
 124         r600_init_surface_functions(rctx);
 125
 126         switch (r600_get_family(rctx->radeon)) {
 127         case CHIP_R600:
 128         case CHIP_RV610:
 129         case CHIP_RV630:
 130         case CHIP_RV670:
 131         case CHIP_RV620:
 132         case CHIP_RV635:
 133         case CHIP_RS780:
 134         case CHIP_RS880:
 135         case CHIP_RV770:
 136         case CHIP_RV730:
 137         case CHIP_RV710:
 138         case CHIP_RV740:
 139                 rctx->context.draw_vbo = r600_draw_vbo;
 140                 r600_init_state_functions(rctx);
 141                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 142                         r600_destroy_context(&rctx->context);
 143                         return NULL;
 144                 }
 145                 r600_init_config(rctx);
 146                 break;
 147         case CHIP_CEDAR:
 148         case CHIP_REDWOOD:
 149         case CHIP_JUNIPER:
 150         case CHIP_CYPRESS:
 151         case CHIP_HEMLOCK:
 152         case CHIP_PALM:
 153         case CHIP_BARTS:
 154         case CHIP_TURKS:
 155         case CHIP_CAICOS:
 156                 rctx->context.draw_vbo = evergreen_draw;
 157                 evergreen_init_state_functions(rctx);
 158                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 159                         r600_destroy_context(&rctx->context);
 160                         return NULL;
 161                 }
 162                 evergreen_init_config(rctx);
 163                 break;
 164         default:
 165                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 166                 r600_destroy_context(&rctx->context);
 167                 return NULL;
 168         }
 169
 170         rctx->rupload_vb = r600_upload_create(rctx, 128 * 1024, 16);
 171         if (rctx->rupload_vb == NULL) {
 172                 r600_destroy_context(&rctx->context);
 173                 return NULL;
 174         }
 175
 176         rctx->rupload_const = r600_upload_create(rctx, 128 * 1024, 256);
 177         if (rctx->rupload_const == NULL) {
 178                 r600_destroy_context(&rctx->context);
 179                 return NULL;
 180         }
 181
 182         rctx->blitter = util_blitter_create(&rctx->context);
 183         if (rctx->blitter == NULL) {
 184                 FREE(rctx);
 185                 return NULL;
 186         }
 187
 188         rctx->tran.translate_cache = translate_cache_create();
 189         if (rctx->tran.translate_cache == NULL) {
 190                 FREE(rctx);
 191                 return NULL;
 192         }
 193
 194         rctx->vs_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 195         if (!rctx->vs_resource) {
 196                 FREE(rctx);
 197                 return NULL;
 198         }
 199
 200         rctx->ps_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 201         if (!rctx->ps_resource) {
 202                 FREE(rctx);
 203                 return NULL;
 204         }
 205
 206         class = r600_get_family_class(rctx->radeon);
 207         if (class == R600 || class == R700)
 208                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 209         else
 210                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 211
 212         return &rctx->context;
 213 }
 214
 215 /*
 216  * pipe_screen
 217  */
 218 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 219 {
 220         return "X.Org";
 221 }
 222
 223 static const char *r600_get_family_name(enum radeon_family family)
 224 {
 225         switch(family) {
 226         case CHIP_R600: return "AMD R600";
 227         case CHIP_RV610: return "AMD RV610";
 228         case CHIP_RV630: return "AMD RV630";
 229         case CHIP_RV670: return "AMD RV670";
 230         case CHIP_RV620: return "AMD RV620";
 231         case CHIP_RV635: return "AMD RV635";
 232         case CHIP_RS780: return "AMD RS780";
 233         case CHIP_RS880: return "AMD RS880";
 234         case CHIP_RV770: return "AMD RV770";
 235         case CHIP_RV730: return "AMD RV730";
 236         case CHIP_RV710: return "AMD RV710";
 237         case CHIP_RV740: return "AMD RV740";
 238         case CHIP_CEDAR: return "AMD CEDAR";
 239         case CHIP_REDWOOD: return "AMD REDWOOD";
 240         case CHIP_JUNIPER: return "AMD JUNIPER";
 241         case CHIP_CYPRESS: return "AMD CYPRESS";
 242         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 243         case CHIP_PALM: return "AMD PALM";
 244         case CHIP_BARTS: return "AMD BARTS";
 245         case CHIP_TURKS: return "AMD TURKS";
 246         case CHIP_CAICOS: return "AMD CAICOS";
 247         default: return "AMD unknown";
 248         }
 249 }
 250
 251 static const char* r600_get_name(struct pipe_screen* pscreen)
 252 {
 253         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 254         enum radeon_family family = r600_get_family(rscreen->radeon);
 255
 256         return r600_get_family_name(family);
 257 }
 258
 259 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 260 {
 261         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 262         enum radeon_family family = r600_get_family(rscreen->radeon);
 263
 264         switch (param) {
 265         /* Supported features (boolean caps). */
 266         case PIPE_CAP_NPOT_TEXTURES:
 267         case PIPE_CAP_TWO_SIDED_STENCIL:
 268         case PIPE_CAP_GLSL:
 269         case PIPE_CAP_DUAL_SOURCE_BLEND:
 270         case PIPE_CAP_ANISOTROPIC_FILTER:
 271         case PIPE_CAP_POINT_SPRITE:
 272         case PIPE_CAP_OCCLUSION_QUERY:
 273         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 274         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 275         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 276         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 277         case PIPE_CAP_SM3:
 278         case PIPE_CAP_TEXTURE_SWIZZLE:
 279         case PIPE_CAP_INDEP_BLEND_ENABLE:
 280         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 281         case PIPE_CAP_DEPTH_CLAMP:
 282         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 283                 return 1;
 284
 285         /* Unsupported features (boolean caps). */
 286         case PIPE_CAP_STREAM_OUTPUT:
 287         case PIPE_CAP_PRIMITIVE_RESTART:
 288         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 289         case PIPE_CAP_INSTANCED_DRAWING:
 290                 return 0;
 291
 292         /* Texturing. */
 293         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 294         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 295         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 296                 if (family >= CHIP_CEDAR)
 297                         return 15;
 298                 else
 299                         return 14;
 300         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 301                 /* FIXME allow this once infrastructure is there */
 302                 return 16;
 303         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 304         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 305                 return 16;
 306
 307         /* Render targets. */
 308         case PIPE_CAP_MAX_RENDER_TARGETS:
 309                 /* FIXME some r6xx are buggy and can only do 4 */
 310                 return 8;
 311
 312         /* Fragment coordinate conventions. */
 313         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 314         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 315                 return 1;
 316         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 317         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 318                 return 0;
 319
 320         /* Timer queries, present when the clock frequency is non zero. */
 321         case PIPE_CAP_TIMER_QUERY:
 322                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 323
 324         default:
 325                 R600_ERR("r600: unknown param %d\n", param);
 326                 return 0;
 327         }
 328 }
 329
 330 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 331 {
 332         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 333         enum radeon_family family = r600_get_family(rscreen->radeon);
 334
 335         switch (param) {
 336         case PIPE_CAP_MAX_LINE_WIDTH:
 337         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 338         case PIPE_CAP_MAX_POINT_WIDTH:
 339         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 340                 if (family >= CHIP_CEDAR)
 341                         return 16384.0f;
 342                 else
 343                         return 8192.0f;
 344         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 345                 return 16.0f;
 346         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 347                 return 16.0f;
 348         default:
 349                 R600_ERR("r600: unsupported paramf %d\n", param);
 350                 return 0.0f;
 351         }
 352 }
 353
 354 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 355 {
 356         switch(shader)
 357         {
 358         case PIPE_SHADER_FRAGMENT:
 359         case PIPE_SHADER_VERTEX:
 360                 break;
 361         case PIPE_SHADER_GEOMETRY:
 362                 /* TODO: support and enable geometry programs */
 363                 return 0;
 364         default:
 365                 /* TODO: support tessellation on Evergreen */
 366                 return 0;
 367         }
 368
 369         /* TODO: all these should be fixed, since r600 surely supports much more! */
 370         switch (param) {
 371         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 372         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 373         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 374         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 375                 return 16384;
 376         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 377                 return 8; /* FIXME */
 378         case PIPE_SHADER_CAP_MAX_INPUTS:
 379                 if(shader == PIPE_SHADER_FRAGMENT)
 380                         return 10;
 381                 else
 382                         return 16;
 383         case PIPE_SHADER_CAP_MAX_TEMPS:
 384                 return 256; //max native temporaries
 385         case PIPE_SHADER_CAP_MAX_ADDRS:
 386                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 387         case PIPE_SHADER_CAP_MAX_CONSTS:
 388                 return 256; //max native parameters
 389         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 390                 return 1;
 391         case PIPE_SHADER_CAP_MAX_PREDS:
 392                 return 0; /* FIXME */
 393         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 394                 return 1;
 395         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 396         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 397         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 398         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 399                 return 1;
 400         case PIPE_SHADER_CAP_SUBROUTINES:
 401                 return 0;
 402         default:
 403                 return 0;
 404         }
 405 }
 406
 407 static boolean r600_is_format_supported(struct pipe_screen* screen,
 408                                         enum pipe_format format,
 409                                         enum pipe_texture_target target,
 410                                         unsigned sample_count,
 411                                         unsigned usage,
 412                                         unsigned geom_flags)
 413 {
 414         unsigned retval = 0;
 415         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 416                 R600_ERR("r600: unsupported texture type %d\n", target);
 417                 return FALSE;
 418         }
 419
 420         /* Multisample */
 421         if (sample_count > 1)
 422                 return FALSE;
 423
 424         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 425             r600_is_sampler_format_supported(format)) {
 426                 retval |= PIPE_BIND_SAMPLER_VIEW;
 427         }
 428
 429         if ((usage & (PIPE_BIND_RENDER_TARGET |
 430                         PIPE_BIND_DISPLAY_TARGET |
 431                         PIPE_BIND_SCANOUT |
 432                         PIPE_BIND_SHARED)) &&
 433                         r600_is_colorbuffer_format_supported(format)) {
 434                 retval |= usage &
 435                         (PIPE_BIND_RENDER_TARGET |
 436                          PIPE_BIND_DISPLAY_TARGET |
 437                          PIPE_BIND_SCANOUT |
 438                          PIPE_BIND_SHARED);
 439         }
 440
 441         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 442             r600_is_zs_format_supported(format)) {
 443                 retval |= PIPE_BIND_DEPTH_STENCIL;
 444         }
 445
 446         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 447             r600_is_vertex_format_supported(format))
 448                 retval |= PIPE_BIND_VERTEX_BUFFER;
 449
 450         if (usage & PIPE_BIND_TRANSFER_READ)
 451                 retval |= PIPE_BIND_TRANSFER_READ;
 452         if (usage & PIPE_BIND_TRANSFER_WRITE)
 453                 retval |= PIPE_BIND_TRANSFER_WRITE;
 454
 455         return retval == usage;
 456 }
 457
 458 static void r600_destroy_screen(struct pipe_screen* pscreen)
 459 {
 460         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 461
 462         if (rscreen == NULL)
 463                 return;
 464
 465         radeon_decref(rscreen->radeon);
 466
 467         FREE(rscreen);
 468 }
 469
 470
 471 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 472 {
 473         struct r600_screen *rscreen;
 474
 475         rscreen = CALLOC_STRUCT(r600_screen);
 476         if (rscreen == NULL) {
 477                 return NULL;
 478         }
 479
 480         rscreen->radeon = radeon;
 481         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 482         rscreen->screen.destroy = r600_destroy_screen;
 483         rscreen->screen.get_name = r600_get_name;
 484         rscreen->screen.get_vendor = r600_get_vendor;
 485         rscreen->screen.get_param = r600_get_param;
 486         rscreen->screen.get_shader_param = r600_get_shader_param;
 487         rscreen->screen.get_paramf = r600_get_paramf;
 488         rscreen->screen.is_format_supported = r600_is_format_supported;
 489         rscreen->screen.context_create = r600_create_context;
 490         r600_init_screen_resource_functions(&rscreen->screen);
 491
 492         rscreen->tiling_info = r600_get_tiling_info(radeon);
 493
 494         return &rscreen->screen;
 495 }