src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_transfer.h>
  34 #include <util/u_surface.h>
  35 #include <util/u_pack_color.h>
  36 #include <util/u_memory.h>
  37 #include <util/u_inlines.h>
  38 #include "util/u_upload_mgr.h"
  39 #include <pipebuffer/pb_buffer.h>
  40 #include "r600.h"
  41 #include "r600d.h"
  42 #include "r600_resource.h"
  43 #include "r600_shader.h"
  44 #include "r600_pipe.h"
  45 #include "r600_state_inlines.h"
  46
  47 /*
  48  * pipe_context
  49  */
  50 static void r600_flush(struct pipe_context *ctx, unsigned flags,
  51                         struct pipe_fence_handle **fence)
  52 {
  53         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  54 #if 0
  55         static int dc = 0;
  56         char dname[256];
  57 #endif
  58
  59         if (!rctx->ctx.pm4_cdwords)
  60                 return;
  61
  62 #if 0
  63         sprintf(dname, "gallium-%08d.bof", dc);
  64         if (dc < 20) {
  65                 r600_context_dump_bof(&rctx->ctx, dname);
  66                 R600_ERR("dumped %s\n", dname);
  67         }
  68         dc++;
  69 #endif
  70         r600_context_flush(&rctx->ctx);
  71 }
  72
  73 static void r600_destroy_context(struct pipe_context *context)
  74 {
  75         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
  76
  77         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
  78
  79         r600_context_fini(&rctx->ctx);
  80
  81         util_blitter_destroy(rctx->blitter);
  82
  83         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
  84                 free(rctx->states[i]);
  85         }
  86
  87         u_upload_destroy(rctx->upload_ib);
  88         u_upload_destroy(rctx->upload_const);
  89         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
  90
  91         FREE(rctx->ps_resource);
  92         FREE(rctx->vs_resource);
  93         FREE(rctx);
  94 }
  95
  96 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
  97 {
  98         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
  99         struct r600_screen* rscreen = (struct r600_screen *)screen;
 100         enum chip_class class;
 101
 102         if (rctx == NULL)
 103                 return NULL;
 104         rctx->context.winsys = rscreen->screen.winsys;
 105         rctx->context.screen = screen;
 106         rctx->context.priv = priv;
 107         rctx->context.destroy = r600_destroy_context;
 108         rctx->context.flush = r600_flush;
 109
 110         /* Easy accessing of screen/winsys. */
 111         rctx->screen = rscreen;
 112         rctx->radeon = rscreen->radeon;
 113         rctx->family = r600_get_family(rctx->radeon);
 114
 115         r600_init_blit_functions(rctx);
 116         r600_init_query_functions(rctx);
 117         r600_init_context_resource_functions(rctx);
 118         r600_init_surface_functions(rctx);
 119         rctx->context.draw_vbo = r600_draw_vbo;
 120
 121         switch (r600_get_family(rctx->radeon)) {
 122         case CHIP_R600:
 123         case CHIP_RV610:
 124         case CHIP_RV630:
 125         case CHIP_RV670:
 126         case CHIP_RV620:
 127         case CHIP_RV635:
 128         case CHIP_RS780:
 129         case CHIP_RS880:
 130         case CHIP_RV770:
 131         case CHIP_RV730:
 132         case CHIP_RV710:
 133         case CHIP_RV740:
 134                 r600_init_state_functions(rctx);
 135                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 136                         r600_destroy_context(&rctx->context);
 137                         return NULL;
 138                 }
 139                 r600_init_config(rctx);
 140                 break;
 141         case CHIP_CEDAR:
 142         case CHIP_REDWOOD:
 143         case CHIP_JUNIPER:
 144         case CHIP_CYPRESS:
 145         case CHIP_HEMLOCK:
 146         case CHIP_PALM:
 147         case CHIP_BARTS:
 148         case CHIP_TURKS:
 149         case CHIP_CAICOS:
 150                 evergreen_init_state_functions(rctx);
 151                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 152                         r600_destroy_context(&rctx->context);
 153                         return NULL;
 154                 }
 155                 evergreen_init_config(rctx);
 156                 break;
 157         default:
 158                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 159                 r600_destroy_context(&rctx->context);
 160                 return NULL;
 161         }
 162
 163         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 16,
 164                                            U_VERTEX_FETCH_BYTE_ALIGNED);
 165         if (!rctx->vbuf_mgr) {
 166                 r600_destroy_context(&rctx->context);
 167                 return NULL;
 168         }
 169
 170         rctx->upload_ib = u_upload_create(&rctx->context, 128 * 1024, 16,
 171                                           PIPE_BIND_INDEX_BUFFER);
 172         if (rctx->upload_ib == NULL) {
 173                 r600_destroy_context(&rctx->context);
 174                 return NULL;
 175         }
 176
 177         rctx->upload_const = u_upload_create(&rctx->context, 1024 * 1024, 256,
 178                                              PIPE_BIND_CONSTANT_BUFFER);
 179         if (rctx->upload_const == NULL) {
 180                 r600_destroy_context(&rctx->context);
 181                 return NULL;
 182         }
 183
 184         rctx->blitter = util_blitter_create(&rctx->context);
 185         if (rctx->blitter == NULL) {
 186                 FREE(rctx);
 187                 return NULL;
 188         }
 189
 190         rctx->vs_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 191         if (!rctx->vs_resource) {
 192                 FREE(rctx);
 193                 return NULL;
 194         }
 195
 196         rctx->ps_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 197         if (!rctx->ps_resource) {
 198                 FREE(rctx);
 199                 return NULL;
 200         }
 201
 202         class = r600_get_family_class(rctx->radeon);
 203         if (class == R600 || class == R700)
 204                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 205         else
 206                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 207
 208         return &rctx->context;
 209 }
 210
 211 /*
 212  * pipe_screen
 213  */
 214 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 215 {
 216         return "X.Org";
 217 }
 218
 219 static const char *r600_get_family_name(enum radeon_family family)
 220 {
 221         switch(family) {
 222         case CHIP_R600: return "AMD R600";
 223         case CHIP_RV610: return "AMD RV610";
 224         case CHIP_RV630: return "AMD RV630";
 225         case CHIP_RV670: return "AMD RV670";
 226         case CHIP_RV620: return "AMD RV620";
 227         case CHIP_RV635: return "AMD RV635";
 228         case CHIP_RS780: return "AMD RS780";
 229         case CHIP_RS880: return "AMD RS880";
 230         case CHIP_RV770: return "AMD RV770";
 231         case CHIP_RV730: return "AMD RV730";
 232         case CHIP_RV710: return "AMD RV710";
 233         case CHIP_RV740: return "AMD RV740";
 234         case CHIP_CEDAR: return "AMD CEDAR";
 235         case CHIP_REDWOOD: return "AMD REDWOOD";
 236         case CHIP_JUNIPER: return "AMD JUNIPER";
 237         case CHIP_CYPRESS: return "AMD CYPRESS";
 238         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 239         case CHIP_PALM: return "AMD PALM";
 240         case CHIP_BARTS: return "AMD BARTS";
 241         case CHIP_TURKS: return "AMD TURKS";
 242         case CHIP_CAICOS: return "AMD CAICOS";
 243         default: return "AMD unknown";
 244         }
 245 }
 246
 247 static const char* r600_get_name(struct pipe_screen* pscreen)
 248 {
 249         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 250         enum radeon_family family = r600_get_family(rscreen->radeon);
 251
 252         return r600_get_family_name(family);
 253 }
 254
 255 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 256 {
 257         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 258         enum radeon_family family = r600_get_family(rscreen->radeon);
 259
 260         switch (param) {
 261         /* Supported features (boolean caps). */
 262         case PIPE_CAP_NPOT_TEXTURES:
 263         case PIPE_CAP_TWO_SIDED_STENCIL:
 264         case PIPE_CAP_GLSL:
 265         case PIPE_CAP_DUAL_SOURCE_BLEND:
 266         case PIPE_CAP_ANISOTROPIC_FILTER:
 267         case PIPE_CAP_POINT_SPRITE:
 268         case PIPE_CAP_OCCLUSION_QUERY:
 269         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 270         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 271         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 272         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 273         case PIPE_CAP_SM3:
 274         case PIPE_CAP_TEXTURE_SWIZZLE:
 275         case PIPE_CAP_INDEP_BLEND_ENABLE:
 276         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 277         case PIPE_CAP_DEPTH_CLAMP:
 278         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 279                 return 1;
 280
 281         /* Unsupported features (boolean caps). */
 282         case PIPE_CAP_STREAM_OUTPUT:
 283         case PIPE_CAP_PRIMITIVE_RESTART:
 284         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 285         case PIPE_CAP_INSTANCED_DRAWING:
 286         case PIPE_CAP_ARRAY_TEXTURES:
 287                 return 0;
 288
 289         /* Texturing. */
 290         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 291         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 292         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 293                 if (family >= CHIP_CEDAR)
 294                         return 15;
 295                 else
 296                         return 14;
 297         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 298                 /* FIXME allow this once infrastructure is there */
 299                 return 16;
 300         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 301         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 302                 return 16;
 303
 304         /* Render targets. */
 305         case PIPE_CAP_MAX_RENDER_TARGETS:
 306                 /* FIXME some r6xx are buggy and can only do 4 */
 307                 return 8;
 308
 309         /* Fragment coordinate conventions. */
 310         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 311         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 312                 return 1;
 313         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 314         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 315                 return 0;
 316
 317         /* Timer queries, present when the clock frequency is non zero. */
 318         case PIPE_CAP_TIMER_QUERY:
 319                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 320
 321         default:
 322                 R600_ERR("r600: unknown param %d\n", param);
 323                 return 0;
 324         }
 325 }
 326
 327 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 328 {
 329         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 330         enum radeon_family family = r600_get_family(rscreen->radeon);
 331
 332         switch (param) {
 333         case PIPE_CAP_MAX_LINE_WIDTH:
 334         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 335         case PIPE_CAP_MAX_POINT_WIDTH:
 336         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 337                 if (family >= CHIP_CEDAR)
 338                         return 16384.0f;
 339                 else
 340                         return 8192.0f;
 341         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 342                 return 16.0f;
 343         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 344                 return 16.0f;
 345         default:
 346                 R600_ERR("r600: unsupported paramf %d\n", param);
 347                 return 0.0f;
 348         }
 349 }
 350
 351 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 352 {
 353         switch(shader)
 354         {
 355         case PIPE_SHADER_FRAGMENT:
 356         case PIPE_SHADER_VERTEX:
 357                 break;
 358         case PIPE_SHADER_GEOMETRY:
 359                 /* TODO: support and enable geometry programs */
 360                 return 0;
 361         default:
 362                 /* TODO: support tessellation on Evergreen */
 363                 return 0;
 364         }
 365
 366         /* TODO: all these should be fixed, since r600 surely supports much more! */
 367         switch (param) {
 368         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 369         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 370         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 371         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 372                 return 16384;
 373         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 374                 return 8; /* FIXME */
 375         case PIPE_SHADER_CAP_MAX_INPUTS:
 376                 if(shader == PIPE_SHADER_FRAGMENT)
 377                         return 10;
 378                 else
 379                         return 16;
 380         case PIPE_SHADER_CAP_MAX_TEMPS:
 381                 return 256; //max native temporaries
 382         case PIPE_SHADER_CAP_MAX_ADDRS:
 383                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 384         case PIPE_SHADER_CAP_MAX_CONSTS:
 385                 return 256; //max native parameters
 386         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 387                 return 1;
 388         case PIPE_SHADER_CAP_MAX_PREDS:
 389                 return 0; /* FIXME */
 390         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 391                 return 1;
 392         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 393         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 394         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 395         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 396                 return 1;
 397         case PIPE_SHADER_CAP_SUBROUTINES:
 398                 return 0;
 399         default:
 400                 return 0;
 401         }
 402 }
 403
 404 static boolean r600_is_format_supported(struct pipe_screen* screen,
 405                                         enum pipe_format format,
 406                                         enum pipe_texture_target target,
 407                                         unsigned sample_count,
 408                                         unsigned usage,
 409                                         unsigned geom_flags)
 410 {
 411         unsigned retval = 0;
 412         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 413                 R600_ERR("r600: unsupported texture type %d\n", target);
 414                 return FALSE;
 415         }
 416
 417         /* Multisample */
 418         if (sample_count > 1)
 419                 return FALSE;
 420
 421         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 422             r600_is_sampler_format_supported(format)) {
 423                 retval |= PIPE_BIND_SAMPLER_VIEW;
 424         }
 425
 426         if ((usage & (PIPE_BIND_RENDER_TARGET |
 427                         PIPE_BIND_DISPLAY_TARGET |
 428                         PIPE_BIND_SCANOUT |
 429                         PIPE_BIND_SHARED)) &&
 430                         r600_is_colorbuffer_format_supported(format)) {
 431                 retval |= usage &
 432                         (PIPE_BIND_RENDER_TARGET |
 433                          PIPE_BIND_DISPLAY_TARGET |
 434                          PIPE_BIND_SCANOUT |
 435                          PIPE_BIND_SHARED);
 436         }
 437
 438         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 439             r600_is_zs_format_supported(format)) {
 440                 retval |= PIPE_BIND_DEPTH_STENCIL;
 441         }
 442
 443         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 444             r600_is_vertex_format_supported(format))
 445                 retval |= PIPE_BIND_VERTEX_BUFFER;
 446
 447         if (usage & PIPE_BIND_TRANSFER_READ)
 448                 retval |= PIPE_BIND_TRANSFER_READ;
 449         if (usage & PIPE_BIND_TRANSFER_WRITE)
 450                 retval |= PIPE_BIND_TRANSFER_WRITE;
 451
 452         return retval == usage;
 453 }
 454
 455 static void r600_destroy_screen(struct pipe_screen* pscreen)
 456 {
 457         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 458
 459         if (rscreen == NULL)
 460                 return;
 461
 462         radeon_decref(rscreen->radeon);
 463
 464         FREE(rscreen);
 465 }
 466
 467
 468 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 469 {
 470         struct r600_screen *rscreen;
 471
 472         rscreen = CALLOC_STRUCT(r600_screen);
 473         if (rscreen == NULL) {
 474                 return NULL;
 475         }
 476
 477         rscreen->radeon = radeon;
 478         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 479         rscreen->screen.destroy = r600_destroy_screen;
 480         rscreen->screen.get_name = r600_get_name;
 481         rscreen->screen.get_vendor = r600_get_vendor;
 482         rscreen->screen.get_param = r600_get_param;
 483         rscreen->screen.get_shader_param = r600_get_shader_param;
 484         rscreen->screen.get_paramf = r600_get_paramf;
 485         rscreen->screen.is_format_supported = r600_is_format_supported;
 486         rscreen->screen.context_create = r600_create_context;
 487         r600_init_screen_resource_functions(&rscreen->screen);
 488
 489         rscreen->tiling_info = r600_get_tiling_info(radeon);
 490
 491         return &rscreen->screen;
 492 }