2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <pipe/p_defines.h>
26 #include <pipe/p_state.h>
27 #include <pipe/p_context.h>
28 #include <tgsi/tgsi_scan.h>
29 #include <tgsi/tgsi_parse.h>
30 #include <tgsi/tgsi_util.h>
31 #include <util/u_blitter.h>
32 #include <util/u_double_list.h>
33 #include "util/u_format.h"
34 #include <util/u_format_s3tc.h>
35 #include <util/u_transfer.h>
36 #include <util/u_surface.h>
37 #include <util/u_pack_color.h>
38 #include <util/u_memory.h>
39 #include <util/u_inlines.h>
40 #include "util/u_upload_mgr.h"
41 #include "os/os_time.h"
42 #include <pipebuffer/pb_buffer.h>
45 #include "r600_resource.h"
46 #include "r600_shader.h"
47 #include "r600_pipe.h"
48 #include "r600_state_inlines.h"
53 static struct r600_fence
*r600_create_fence(struct r600_pipe_context
*ctx
)
55 struct r600_fence
*fence
= NULL
;
57 if (!ctx
->fences
.bo
) {
58 /* Create the shared buffer object */
59 ctx
->fences
.bo
= r600_bo(ctx
->radeon
, 4096, 0, 0, 0);
60 if (!ctx
->fences
.bo
) {
61 R600_ERR("r600: failed to create bo for fence objects\n");
64 ctx
->fences
.data
= r600_bo_map(ctx
->radeon
, ctx
->fences
.bo
, PB_USAGE_UNSYNCHRONIZED
, NULL
);
67 if (!LIST_IS_EMPTY(&ctx
->fences
.pool
)) {
68 struct r600_fence
*entry
;
70 /* Try to find a freed fence that has been signalled */
71 LIST_FOR_EACH_ENTRY(entry
, &ctx
->fences
.pool
, head
) {
72 if (ctx
->fences
.data
[entry
->index
] != 0) {
73 LIST_DELINIT(&entry
->head
);
81 /* Allocate a new fence */
82 struct r600_fence_block
*block
;
85 if ((ctx
->fences
.next_index
+ 1) >= 1024) {
86 R600_ERR("r600: too many concurrent fences\n");
90 index
= ctx
->fences
.next_index
++;
92 if (!(index
% FENCE_BLOCK_SIZE
)) {
93 /* Allocate a new block */
94 block
= CALLOC_STRUCT(r600_fence_block
);
98 LIST_ADD(&block
->head
, &ctx
->fences
.blocks
);
100 block
= LIST_ENTRY(struct r600_fence_block
, ctx
->fences
.blocks
.next
, head
);
103 fence
= &block
->fences
[index
% FENCE_BLOCK_SIZE
];
105 fence
->index
= index
;
108 pipe_reference_init(&fence
->reference
, 1);
110 ctx
->fences
.data
[fence
->index
] = 0;
111 r600_context_emit_fence(&ctx
->ctx
, ctx
->fences
.bo
, fence
->index
, 1);
115 static void r600_flush(struct pipe_context
*ctx
,
116 struct pipe_fence_handle
**fence
)
118 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)ctx
;
119 struct r600_fence
**rfence
= (struct r600_fence
**)fence
;
127 *rfence
= r600_create_fence(rctx
);
129 if (!rctx
->ctx
.pm4_cdwords
)
133 sprintf(dname
, "gallium-%08d.bof", dc
);
135 r600_context_dump_bof(&rctx
->ctx
, dname
);
136 R600_ERR("dumped %s\n", dname
);
140 r600_context_flush(&rctx
->ctx
);
142 /* XXX This shouldn't be really necessary, but removing it breaks some tests.
143 * Needless buffer reallocations may significantly increase memory consumption,
144 * so getting rid of this call is important. */
145 u_upload_flush(rctx
->vbuf_mgr
->uploader
);
148 static void r600_update_num_contexts(struct r600_screen
*rscreen
, int diff
)
150 pipe_mutex_lock(rscreen
->mutex_num_contexts
);
152 rscreen
->num_contexts
++;
154 if (rscreen
->num_contexts
> 1)
155 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
156 UTIL_SLAB_MULTITHREADED
);
158 rscreen
->num_contexts
--;
160 if (rscreen
->num_contexts
<= 1)
161 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
162 UTIL_SLAB_SINGLETHREADED
);
164 pipe_mutex_unlock(rscreen
->mutex_num_contexts
);
167 static void r600_destroy_context(struct pipe_context
*context
)
169 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)context
;
171 rctx
->context
.delete_depth_stencil_alpha_state(&rctx
->context
, rctx
->custom_dsa_flush
);
172 util_unreference_framebuffer_state(&rctx
->framebuffer
);
174 r600_context_fini(&rctx
->ctx
);
176 util_blitter_destroy(rctx
->blitter
);
178 for (int i
= 0; i
< R600_PIPE_NSTATES
; i
++) {
179 free(rctx
->states
[i
]);
182 u_vbuf_mgr_destroy(rctx
->vbuf_mgr
);
183 util_slab_destroy(&rctx
->pool_transfers
);
185 if (rctx
->fences
.bo
) {
186 struct r600_fence_block
*entry
, *tmp
;
188 LIST_FOR_EACH_ENTRY_SAFE(entry
, tmp
, &rctx
->fences
.blocks
, head
) {
189 LIST_DEL(&entry
->head
);
193 r600_bo_unmap(rctx
->radeon
, rctx
->fences
.bo
);
194 r600_bo_reference(rctx
->radeon
, &rctx
->fences
.bo
, NULL
);
197 r600_update_num_contexts(rctx
->screen
, -1);
202 static struct pipe_context
*r600_create_context(struct pipe_screen
*screen
, void *priv
)
204 struct r600_pipe_context
*rctx
= CALLOC_STRUCT(r600_pipe_context
);
205 struct r600_screen
* rscreen
= (struct r600_screen
*)screen
;
206 enum chip_class
class;
211 r600_update_num_contexts(rscreen
, 1);
213 rctx
->context
.winsys
= rscreen
->screen
.winsys
;
214 rctx
->context
.screen
= screen
;
215 rctx
->context
.priv
= priv
;
216 rctx
->context
.destroy
= r600_destroy_context
;
217 rctx
->context
.flush
= r600_flush
;
219 /* Easy accessing of screen/winsys. */
220 rctx
->screen
= rscreen
;
221 rctx
->radeon
= rscreen
->radeon
;
222 rctx
->family
= r600_get_family(rctx
->radeon
);
224 rctx
->fences
.bo
= NULL
;
225 rctx
->fences
.data
= NULL
;
226 rctx
->fences
.next_index
= 0;
227 LIST_INITHEAD(&rctx
->fences
.pool
);
228 LIST_INITHEAD(&rctx
->fences
.blocks
);
230 r600_init_blit_functions(rctx
);
231 r600_init_query_functions(rctx
);
232 r600_init_context_resource_functions(rctx
);
233 r600_init_surface_functions(rctx
);
234 rctx
->context
.draw_vbo
= r600_draw_vbo
;
236 switch (r600_get_family(rctx
->radeon
)) {
249 r600_init_state_functions(rctx
);
250 if (r600_context_init(&rctx
->ctx
, rctx
->radeon
)) {
251 r600_destroy_context(&rctx
->context
);
254 r600_init_config(rctx
);
265 evergreen_init_state_functions(rctx
);
266 if (evergreen_context_init(&rctx
->ctx
, rctx
->radeon
)) {
267 r600_destroy_context(&rctx
->context
);
270 evergreen_init_config(rctx
);
273 R600_ERR("unsupported family %d\n", r600_get_family(rctx
->radeon
));
274 r600_destroy_context(&rctx
->context
);
278 util_slab_create(&rctx
->pool_transfers
,
279 sizeof(struct pipe_transfer
), 64,
280 UTIL_SLAB_SINGLETHREADED
);
282 rctx
->vbuf_mgr
= u_vbuf_mgr_create(&rctx
->context
, 1024 * 1024, 256,
283 PIPE_BIND_VERTEX_BUFFER
|
284 PIPE_BIND_INDEX_BUFFER
|
285 PIPE_BIND_CONSTANT_BUFFER
,
286 U_VERTEX_FETCH_DWORD_ALIGNED
);
287 if (!rctx
->vbuf_mgr
) {
288 r600_destroy_context(&rctx
->context
);
292 rctx
->blitter
= util_blitter_create(&rctx
->context
);
293 if (rctx
->blitter
== NULL
) {
294 r600_destroy_context(&rctx
->context
);
298 class = r600_get_family_class(rctx
->radeon
);
299 if (class == R600
|| class == R700
)
300 rctx
->custom_dsa_flush
= r600_create_db_flush_dsa(rctx
);
302 rctx
->custom_dsa_flush
= evergreen_create_db_flush_dsa(rctx
);
304 return &rctx
->context
;
310 static const char* r600_get_vendor(struct pipe_screen
* pscreen
)
315 static const char *r600_get_family_name(enum radeon_family family
)
318 case CHIP_R600
: return "AMD R600";
319 case CHIP_RV610
: return "AMD RV610";
320 case CHIP_RV630
: return "AMD RV630";
321 case CHIP_RV670
: return "AMD RV670";
322 case CHIP_RV620
: return "AMD RV620";
323 case CHIP_RV635
: return "AMD RV635";
324 case CHIP_RS780
: return "AMD RS780";
325 case CHIP_RS880
: return "AMD RS880";
326 case CHIP_RV770
: return "AMD RV770";
327 case CHIP_RV730
: return "AMD RV730";
328 case CHIP_RV710
: return "AMD RV710";
329 case CHIP_RV740
: return "AMD RV740";
330 case CHIP_CEDAR
: return "AMD CEDAR";
331 case CHIP_REDWOOD
: return "AMD REDWOOD";
332 case CHIP_JUNIPER
: return "AMD JUNIPER";
333 case CHIP_CYPRESS
: return "AMD CYPRESS";
334 case CHIP_HEMLOCK
: return "AMD HEMLOCK";
335 case CHIP_PALM
: return "AMD PALM";
336 case CHIP_BARTS
: return "AMD BARTS";
337 case CHIP_TURKS
: return "AMD TURKS";
338 case CHIP_CAICOS
: return "AMD CAICOS";
339 default: return "AMD unknown";
343 static const char* r600_get_name(struct pipe_screen
* pscreen
)
345 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
346 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
348 return r600_get_family_name(family
);
351 static int r600_get_param(struct pipe_screen
* pscreen
, enum pipe_cap param
)
353 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
354 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
357 /* Supported features (boolean caps). */
358 case PIPE_CAP_NPOT_TEXTURES
:
359 case PIPE_CAP_TWO_SIDED_STENCIL
:
361 case PIPE_CAP_DUAL_SOURCE_BLEND
:
362 case PIPE_CAP_ANISOTROPIC_FILTER
:
363 case PIPE_CAP_POINT_SPRITE
:
364 case PIPE_CAP_OCCLUSION_QUERY
:
365 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
366 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
367 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
368 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
370 case PIPE_CAP_TEXTURE_SWIZZLE
:
371 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
:
372 case PIPE_CAP_DEPTH_CLAMP
:
373 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
374 case PIPE_CAP_TGSI_INSTANCEID
:
375 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
376 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
378 case PIPE_CAP_INDEP_BLEND_ENABLE
:
379 /* R600 doesn't support per-MRT blends */
380 if (family
== CHIP_R600
)
385 /* Unsupported features (boolean caps). */
386 case PIPE_CAP_STREAM_OUTPUT
:
387 case PIPE_CAP_PRIMITIVE_RESTART
:
388 case PIPE_CAP_INDEP_BLEND_FUNC
: /* FIXME allow this */
389 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL
:
390 /* R600 doesn't support per-MRT blends */
391 if (family
== CHIP_R600
)
396 case PIPE_CAP_ARRAY_TEXTURES
:
397 /* fix once the CS checker upstream is fixed */
398 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE
);
401 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
402 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
403 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
404 if (family
>= CHIP_CEDAR
)
408 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
409 /* FIXME allow this once infrastructure is there */
411 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
412 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
415 /* Render targets. */
416 case PIPE_CAP_MAX_RENDER_TARGETS
:
417 /* FIXME some r6xx are buggy and can only do 4 */
420 /* Fragment coordinate conventions. */
421 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
422 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
424 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
425 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
428 /* Timer queries, present when the clock frequency is non zero. */
429 case PIPE_CAP_TIMER_QUERY
:
430 return r600_get_clock_crystal_freq(rscreen
->radeon
) != 0;
433 R600_ERR("r600: unknown param %d\n", param
);
438 static float r600_get_paramf(struct pipe_screen
* pscreen
, enum pipe_cap param
)
440 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
441 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
444 case PIPE_CAP_MAX_LINE_WIDTH
:
445 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
446 case PIPE_CAP_MAX_POINT_WIDTH
:
447 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
448 if (family
>= CHIP_CEDAR
)
452 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
454 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
457 R600_ERR("r600: unsupported paramf %d\n", param
);
462 static int r600_get_shader_param(struct pipe_screen
* pscreen
, unsigned shader
, enum pipe_shader_cap param
)
466 case PIPE_SHADER_FRAGMENT
:
467 case PIPE_SHADER_VERTEX
:
469 case PIPE_SHADER_GEOMETRY
:
470 /* TODO: support and enable geometry programs */
473 /* TODO: support tessellation on Evergreen */
477 /* TODO: all these should be fixed, since r600 surely supports much more! */
479 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
480 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
481 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
482 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
484 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
485 return 8; /* FIXME */
486 case PIPE_SHADER_CAP_MAX_INPUTS
:
487 if(shader
== PIPE_SHADER_FRAGMENT
)
491 case PIPE_SHADER_CAP_MAX_TEMPS
:
492 return 256; //max native temporaries
493 case PIPE_SHADER_CAP_MAX_ADDRS
:
494 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
495 case PIPE_SHADER_CAP_MAX_CONSTS
:
496 return R600_MAX_CONST_BUFFER_SIZE
;
497 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
498 return R600_MAX_CONST_BUFFERS
;
499 case PIPE_SHADER_CAP_MAX_PREDS
:
500 return 0; /* FIXME */
501 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
503 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
504 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
505 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
506 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
508 case PIPE_SHADER_CAP_SUBROUTINES
:
515 static boolean
r600_is_format_supported(struct pipe_screen
* screen
,
516 enum pipe_format format
,
517 enum pipe_texture_target target
,
518 unsigned sample_count
,
522 if (target
>= PIPE_MAX_TEXTURE_TYPES
) {
523 R600_ERR("r600: unsupported texture type %d\n", target
);
527 if (!util_format_is_supported(format
, usage
))
531 if (sample_count
> 1)
534 if ((usage
& PIPE_BIND_SAMPLER_VIEW
) &&
535 r600_is_sampler_format_supported(screen
, format
)) {
536 retval
|= PIPE_BIND_SAMPLER_VIEW
;
539 if ((usage
& (PIPE_BIND_RENDER_TARGET
|
540 PIPE_BIND_DISPLAY_TARGET
|
542 PIPE_BIND_SHARED
)) &&
543 r600_is_colorbuffer_format_supported(format
)) {
545 (PIPE_BIND_RENDER_TARGET
|
546 PIPE_BIND_DISPLAY_TARGET
|
551 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
552 r600_is_zs_format_supported(format
)) {
553 retval
|= PIPE_BIND_DEPTH_STENCIL
;
556 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
557 struct r600_screen
*rscreen
= (struct r600_screen
*)screen
;
558 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
560 if (r600_is_vertex_format_supported(format
, family
)) {
561 retval
|= PIPE_BIND_VERTEX_BUFFER
;
565 if (usage
& PIPE_BIND_TRANSFER_READ
)
566 retval
|= PIPE_BIND_TRANSFER_READ
;
567 if (usage
& PIPE_BIND_TRANSFER_WRITE
)
568 retval
|= PIPE_BIND_TRANSFER_WRITE
;
570 return retval
== usage
;
573 static void r600_destroy_screen(struct pipe_screen
* pscreen
)
575 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
580 radeon_decref(rscreen
->radeon
);
582 util_slab_destroy(&rscreen
->pool_buffers
);
583 pipe_mutex_destroy(rscreen
->mutex_num_contexts
);
587 static void r600_fence_reference(struct pipe_screen
*pscreen
,
588 struct pipe_fence_handle
**ptr
,
589 struct pipe_fence_handle
*fence
)
591 struct r600_fence
**oldf
= (struct r600_fence
**)ptr
;
592 struct r600_fence
*newf
= (struct r600_fence
*)fence
;
594 if (pipe_reference(&(*oldf
)->reference
, &newf
->reference
)) {
595 struct r600_pipe_context
*ctx
= (*oldf
)->ctx
;
596 LIST_ADDTAIL(&(*oldf
)->head
, &ctx
->fences
.pool
);
602 static boolean
r600_fence_signalled(struct pipe_screen
*pscreen
,
603 struct pipe_fence_handle
*fence
)
605 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
606 struct r600_pipe_context
*ctx
= rfence
->ctx
;
608 return ctx
->fences
.data
[rfence
->index
];
611 static boolean
r600_fence_finish(struct pipe_screen
*pscreen
,
612 struct pipe_fence_handle
*fence
,
615 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
616 struct r600_pipe_context
*ctx
= rfence
->ctx
;
617 int64_t start_time
= 0;
620 if (timeout
!= PIPE_TIMEOUT_INFINITE
) {
621 start_time
= os_time_get();
623 /* Convert to microseconds. */
627 while (ctx
->fences
.data
[rfence
->index
] == 0) {
635 if (timeout
!= PIPE_TIMEOUT_INFINITE
&&
636 os_time_get() - start_time
>= timeout
) {
644 struct pipe_screen
*r600_screen_create(struct radeon
*radeon
)
646 struct r600_screen
*rscreen
;
648 rscreen
= CALLOC_STRUCT(r600_screen
);
649 if (rscreen
== NULL
) {
653 rscreen
->radeon
= radeon
;
654 rscreen
->screen
.winsys
= (struct pipe_winsys
*)radeon
;
655 rscreen
->screen
.destroy
= r600_destroy_screen
;
656 rscreen
->screen
.get_name
= r600_get_name
;
657 rscreen
->screen
.get_vendor
= r600_get_vendor
;
658 rscreen
->screen
.get_param
= r600_get_param
;
659 rscreen
->screen
.get_shader_param
= r600_get_shader_param
;
660 rscreen
->screen
.get_paramf
= r600_get_paramf
;
661 rscreen
->screen
.is_format_supported
= r600_is_format_supported
;
662 rscreen
->screen
.context_create
= r600_create_context
;
663 rscreen
->screen
.fence_reference
= r600_fence_reference
;
664 rscreen
->screen
.fence_signalled
= r600_fence_signalled
;
665 rscreen
->screen
.fence_finish
= r600_fence_finish
;
666 r600_init_screen_resource_functions(&rscreen
->screen
);
668 rscreen
->tiling_info
= r600_get_tiling_info(radeon
);
669 util_format_s3tc_init();
671 util_slab_create(&rscreen
->pool_buffers
,
672 sizeof(struct r600_resource_buffer
), 64,
673 UTIL_SLAB_SINGLETHREADED
);
675 pipe_mutex_init(rscreen
->mutex_num_contexts
);
677 return &rscreen
->screen
;