src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include "util/u_format.h"
  34 #include <util/u_format_s3tc.h>
  35 #include <util/u_transfer.h>
  36 #include <util/u_surface.h>
  37 #include <util/u_pack_color.h>
  38 #include <util/u_memory.h>
  39 #include <util/u_inlines.h>
  40 #include "util/u_upload_mgr.h"
  41 #include "os/os_time.h"
  42 #include <pipebuffer/pb_buffer.h>
  43 #include "r600.h"
  44 #include "r600d.h"
  45 #include "r600_resource.h"
  46 #include "r600_shader.h"
  47 #include "r600_pipe.h"
  48 #include "r600_state_inlines.h"
  49 #include "r600_video_context.h"
  50
  51 /*
  52  * pipe_context
  53  */
  54 static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
  55 {
  56         struct r600_fence *fence = NULL;
  57
  58         if (!ctx->fences.bo) {
  59                 /* Create the shared buffer object */
  60                 ctx->fences.bo = r600_bo(ctx->radeon, 4096, 0, 0, 0);
  61                 if (!ctx->fences.bo) {
  62                         R600_ERR("r600: failed to create bo for fence objects\n");
  63                         return NULL;
  64                 }
  65                 ctx->fences.data = r600_bo_map(ctx->radeon, ctx->fences.bo, PB_USAGE_UNSYNCHRONIZED, NULL);
  66         }
  67
  68         if (!LIST_IS_EMPTY(&ctx->fences.pool)) {
  69                 struct r600_fence *entry;
  70
  71                 /* Try to find a freed fence that has been signalled */
  72                 LIST_FOR_EACH_ENTRY(entry, &ctx->fences.pool, head) {
  73                         if (ctx->fences.data[entry->index] != 0) {
  74                                 LIST_DELINIT(&entry->head);
  75                                 fence = entry;
  76                                 break;
  77                         }
  78                 }
  79         }
  80
  81         if (!fence) {
  82                 /* Allocate a new fence */
  83                 struct r600_fence_block *block;
  84                 unsigned index;
  85
  86                 if ((ctx->fences.next_index + 1) >= 1024) {
  87                         R600_ERR("r600: too many concurrent fences\n");
  88                         return NULL;
  89                 }
  90
  91                 index = ctx->fences.next_index++;
  92
  93                 if (!(index % FENCE_BLOCK_SIZE)) {
  94                         /* Allocate a new block */
  95                         block = CALLOC_STRUCT(r600_fence_block);
  96                         if (block == NULL)
  97                                 return NULL;
  98
  99                         LIST_ADD(&block->head, &ctx->fences.blocks);
 100                 } else {
 101                         block = LIST_ENTRY(struct r600_fence_block, ctx->fences.blocks.next, head);
 102                 }
 103
 104                 fence = &block->fences[index % FENCE_BLOCK_SIZE];
 105                 fence->ctx = ctx;
 106                 fence->index = index;
 107         }
 108
 109         pipe_reference_init(&fence->reference, 1);
 110
 111         ctx->fences.data[fence->index] = 0;
 112         r600_context_emit_fence(&ctx->ctx, ctx->fences.bo, fence->index, 1);
 113         return fence;
 114 }
 115
 116 static void r600_flush(struct pipe_context *ctx,
 117                         struct pipe_fence_handle **fence)
 118 {
 119         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 120         struct r600_fence **rfence = (struct r600_fence**)fence;
 121
 122 #if 0
 123         static int dc = 0;
 124         char dname[256];
 125 #endif
 126
 127         if (rfence)
 128                 *rfence = r600_create_fence(rctx);
 129
 130 #if 0
 131         sprintf(dname, "gallium-%08d.bof", dc);
 132         if (dc < 20) {
 133                 r600_context_dump_bof(&rctx->ctx, dname);
 134                 R600_ERR("dumped %s\n", dname);
 135         }
 136         dc++;
 137 #endif
 138         r600_context_flush(&rctx->ctx);
 139 }
 140
 141 static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
 142 {
 143         pipe_mutex_lock(rscreen->mutex_num_contexts);
 144         if (diff > 0) {
 145                 rscreen->num_contexts++;
 146
 147                 if (rscreen->num_contexts > 1)
 148                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 149                                                     UTIL_SLAB_MULTITHREADED);
 150         } else {
 151                 rscreen->num_contexts--;
 152
 153                 if (rscreen->num_contexts <= 1)
 154                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 155                                                     UTIL_SLAB_SINGLETHREADED);
 156         }
 157         pipe_mutex_unlock(rscreen->mutex_num_contexts);
 158 }
 159
 160 static void r600_destroy_context(struct pipe_context *context)
 161 {
 162         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 163
 164         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 165         util_unreference_framebuffer_state(&rctx->framebuffer);
 166
 167         r600_context_fini(&rctx->ctx);
 168
 169         util_blitter_destroy(rctx->blitter);
 170
 171         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 172                 free(rctx->states[i]);
 173         }
 174
 175         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 176         util_slab_destroy(&rctx->pool_transfers);
 177
 178         if (rctx->fences.bo) {
 179                 struct r600_fence_block *entry, *tmp;
 180
 181                 LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rctx->fences.blocks, head) {
 182                         LIST_DEL(&entry->head);
 183                         FREE(entry);
 184                 }
 185
 186                 r600_bo_unmap(rctx->radeon, rctx->fences.bo);
 187                 r600_bo_reference(rctx->radeon, &rctx->fences.bo, NULL);
 188         }
 189
 190         r600_update_num_contexts(rctx->screen, -1);
 191
 192         FREE(rctx);
 193 }
 194
 195 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 196 {
 197         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 198         struct r600_screen* rscreen = (struct r600_screen *)screen;
 199         enum chip_class class;
 200
 201         if (rctx == NULL)
 202                 return NULL;
 203
 204         r600_update_num_contexts(rscreen, 1);
 205
 206         rctx->context.winsys = rscreen->screen.winsys;
 207         rctx->context.screen = screen;
 208         rctx->context.priv = priv;
 209         rctx->context.destroy = r600_destroy_context;
 210         rctx->context.flush = r600_flush;
 211
 212         /* Easy accessing of screen/winsys. */
 213         rctx->screen = rscreen;
 214         rctx->radeon = rscreen->radeon;
 215         rctx->family = r600_get_family(rctx->radeon);
 216
 217         rctx->fences.bo = NULL;
 218         rctx->fences.data = NULL;
 219         rctx->fences.next_index = 0;
 220         LIST_INITHEAD(&rctx->fences.pool);
 221         LIST_INITHEAD(&rctx->fences.blocks);
 222
 223         r600_init_blit_functions(rctx);
 224         r600_init_query_functions(rctx);
 225         r600_init_context_resource_functions(rctx);
 226         r600_init_surface_functions(rctx);
 227         rctx->context.draw_vbo = r600_draw_vbo;
 228
 229         switch (r600_get_family(rctx->radeon)) {
 230         case CHIP_R600:
 231         case CHIP_RV610:
 232         case CHIP_RV630:
 233         case CHIP_RV670:
 234         case CHIP_RV620:
 235         case CHIP_RV635:
 236         case CHIP_RS780:
 237         case CHIP_RS880:
 238         case CHIP_RV770:
 239         case CHIP_RV730:
 240         case CHIP_RV710:
 241         case CHIP_RV740:
 242                 r600_init_state_functions(rctx);
 243                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 244                         r600_destroy_context(&rctx->context);
 245                         return NULL;
 246                 }
 247                 r600_init_config(rctx);
 248                 break;
 249         case CHIP_CEDAR:
 250         case CHIP_REDWOOD:
 251         case CHIP_JUNIPER:
 252         case CHIP_CYPRESS:
 253         case CHIP_HEMLOCK:
 254         case CHIP_PALM:
 255         case CHIP_SUMO:
 256         case CHIP_SUMO2:
 257         case CHIP_BARTS:
 258         case CHIP_TURKS:
 259         case CHIP_CAICOS:
 260         case CHIP_CAYMAN:
 261                 evergreen_init_state_functions(rctx);
 262                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 263                         r600_destroy_context(&rctx->context);
 264                         return NULL;
 265                 }
 266                 evergreen_init_config(rctx);
 267                 break;
 268         default:
 269                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 270                 r600_destroy_context(&rctx->context);
 271                 return NULL;
 272         }
 273
 274         util_slab_create(&rctx->pool_transfers,
 275                          sizeof(struct pipe_transfer), 64,
 276                          UTIL_SLAB_SINGLETHREADED);
 277
 278         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 279                                            PIPE_BIND_VERTEX_BUFFER |
 280                                            PIPE_BIND_INDEX_BUFFER |
 281                                            PIPE_BIND_CONSTANT_BUFFER,
 282                                            U_VERTEX_FETCH_DWORD_ALIGNED);
 283         if (!rctx->vbuf_mgr) {
 284                 r600_destroy_context(&rctx->context);
 285                 return NULL;
 286         }
 287
 288         rctx->blitter = util_blitter_create(&rctx->context);
 289         if (rctx->blitter == NULL) {
 290                 r600_destroy_context(&rctx->context);
 291                 return NULL;
 292         }
 293
 294         class = r600_get_family_class(rctx->radeon);
 295         if (class == R600 || class == R700)
 296                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 297         else
 298                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 299
 300         return &rctx->context;
 301 }
 302
 303 /*
 304  * pipe_screen
 305  */
 306 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 307 {
 308         return "X.Org";
 309 }
 310
 311 static const char *r600_get_family_name(enum radeon_family family)
 312 {
 313         switch(family) {
 314         case CHIP_R600: return "AMD R600";
 315         case CHIP_RV610: return "AMD RV610";
 316         case CHIP_RV630: return "AMD RV630";
 317         case CHIP_RV670: return "AMD RV670";
 318         case CHIP_RV620: return "AMD RV620";
 319         case CHIP_RV635: return "AMD RV635";
 320         case CHIP_RS780: return "AMD RS780";
 321         case CHIP_RS880: return "AMD RS880";
 322         case CHIP_RV770: return "AMD RV770";
 323         case CHIP_RV730: return "AMD RV730";
 324         case CHIP_RV710: return "AMD RV710";
 325         case CHIP_RV740: return "AMD RV740";
 326         case CHIP_CEDAR: return "AMD CEDAR";
 327         case CHIP_REDWOOD: return "AMD REDWOOD";
 328         case CHIP_JUNIPER: return "AMD JUNIPER";
 329         case CHIP_CYPRESS: return "AMD CYPRESS";
 330         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 331         case CHIP_PALM: return "AMD PALM";
 332         case CHIP_SUMO: return "AMD SUMO";
 333         case CHIP_SUMO2: return "AMD SUMO2";
 334         case CHIP_BARTS: return "AMD BARTS";
 335         case CHIP_TURKS: return "AMD TURKS";
 336         case CHIP_CAICOS: return "AMD CAICOS";
 337         case CHIP_CAYMAN: return "AMD CAYMAN";
 338         default: return "AMD unknown";
 339         }
 340 }
 341
 342 static const char* r600_get_name(struct pipe_screen* pscreen)
 343 {
 344         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 345         enum radeon_family family = r600_get_family(rscreen->radeon);
 346
 347         return r600_get_family_name(family);
 348 }
 349
 350 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 351 {
 352         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 353         enum radeon_family family = r600_get_family(rscreen->radeon);
 354
 355         switch (param) {
 356         /* Supported features (boolean caps). */
 357         case PIPE_CAP_NPOT_TEXTURES:
 358         case PIPE_CAP_TWO_SIDED_STENCIL:
 359         case PIPE_CAP_GLSL:
 360         case PIPE_CAP_DUAL_SOURCE_BLEND:
 361         case PIPE_CAP_ANISOTROPIC_FILTER:
 362         case PIPE_CAP_POINT_SPRITE:
 363         case PIPE_CAP_OCCLUSION_QUERY:
 364         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 365         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 366         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 367         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 368         case PIPE_CAP_TEXTURE_SWIZZLE:
 369         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 370         case PIPE_CAP_DEPTH_CLAMP:
 371         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 372         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 373         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 374         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 375         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 376         case PIPE_CAP_SM3:
 377         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 378         case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
 379                 return 1;
 380
 381         /* Supported except the original R600. */
 382         case PIPE_CAP_INDEP_BLEND_ENABLE:
 383         case PIPE_CAP_INDEP_BLEND_FUNC:
 384                 /* R600 doesn't support per-MRT blends */
 385                 return family == CHIP_R600 ? 0 : 1;
 386
 387         /* Supported on Evergreen. */
 388         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 389                 return family >= CHIP_CEDAR ? 1 : 0;
 390
 391         /* Unsupported features. */
 392         case PIPE_CAP_STREAM_OUTPUT:
 393         case PIPE_CAP_PRIMITIVE_RESTART:
 394         case PIPE_CAP_TGSI_INSTANCEID:
 395         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 396         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 397                 return 0;
 398
 399         case PIPE_CAP_ARRAY_TEXTURES:
 400                 /* fix once the CS checker upstream is fixed */
 401                 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 402
 403         /* Texturing. */
 404         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 405         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 406         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 407                 if (family >= CHIP_CEDAR)
 408                         return 15;
 409                 else
 410                         return 14;
 411         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 412         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 413                 return 16;
 414         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 415                 return 32;
 416
 417         /* Render targets. */
 418         case PIPE_CAP_MAX_RENDER_TARGETS:
 419                 /* FIXME some r6xx are buggy and can only do 4 */
 420                 return 8;
 421
 422         /* Timer queries, present when the clock frequency is non zero. */
 423         case PIPE_CAP_TIMER_QUERY:
 424                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 425
 426         default:
 427                 R600_ERR("r600: unknown param %d\n", param);
 428                 return 0;
 429         }
 430 }
 431
 432 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 433 {
 434         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 435         enum radeon_family family = r600_get_family(rscreen->radeon);
 436
 437         switch (param) {
 438         case PIPE_CAP_MAX_LINE_WIDTH:
 439         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 440         case PIPE_CAP_MAX_POINT_WIDTH:
 441         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 442                 if (family >= CHIP_CEDAR)
 443                         return 16384.0f;
 444                 else
 445                         return 8192.0f;
 446         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 447                 return 16.0f;
 448         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 449                 return 16.0f;
 450         default:
 451                 R600_ERR("r600: unsupported paramf %d\n", param);
 452                 return 0.0f;
 453         }
 454 }
 455
 456 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 457 {
 458         switch(shader)
 459         {
 460         case PIPE_SHADER_FRAGMENT:
 461         case PIPE_SHADER_VERTEX:
 462                 break;
 463         case PIPE_SHADER_GEOMETRY:
 464                 /* TODO: support and enable geometry programs */
 465                 return 0;
 466         default:
 467                 /* TODO: support tessellation on Evergreen */
 468                 return 0;
 469         }
 470
 471         /* TODO: all these should be fixed, since r600 surely supports much more! */
 472         switch (param) {
 473         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 474         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 475         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 476         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 477                 return 16384;
 478         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 479                 return 8; /* FIXME */
 480         case PIPE_SHADER_CAP_MAX_INPUTS:
 481                 if(shader == PIPE_SHADER_FRAGMENT)
 482                         return 34;
 483                 else
 484                         return 32;
 485         case PIPE_SHADER_CAP_MAX_TEMPS:
 486                 return 256; /* Max native temporaries. */
 487         case PIPE_SHADER_CAP_MAX_ADDRS:
 488                 /* FIXME Isn't this equal to TEMPS? */
 489                 return 1; /* Max native address registers */
 490         case PIPE_SHADER_CAP_MAX_CONSTS:
 491                 return R600_MAX_CONST_BUFFER_SIZE;
 492         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 493                 return R600_MAX_CONST_BUFFERS;
 494         case PIPE_SHADER_CAP_MAX_PREDS:
 495                 return 0; /* FIXME */
 496         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 497                 return 1;
 498         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 499         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 500         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 501         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 502                 return 1;
 503         case PIPE_SHADER_CAP_SUBROUTINES:
 504                 return 0;
 505         default:
 506                 return 0;
 507         }
 508 }
 509
 510 static boolean r600_is_format_supported(struct pipe_screen* screen,
 511                                         enum pipe_format format,
 512                                         enum pipe_texture_target target,
 513                                         unsigned sample_count,
 514                                         unsigned usage)
 515 {
 516         unsigned retval = 0;
 517         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 518                 R600_ERR("r600: unsupported texture type %d\n", target);
 519                 return FALSE;
 520         }
 521
 522         if (!util_format_is_supported(format, usage))
 523                 return FALSE;
 524
 525         /* Multisample */
 526         if (sample_count > 1)
 527                 return FALSE;
 528
 529         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 530             r600_is_sampler_format_supported(screen, format)) {
 531                 retval |= PIPE_BIND_SAMPLER_VIEW;
 532         }
 533
 534         if ((usage & (PIPE_BIND_RENDER_TARGET |
 535                         PIPE_BIND_DISPLAY_TARGET |
 536                         PIPE_BIND_SCANOUT |
 537                         PIPE_BIND_SHARED)) &&
 538                         r600_is_colorbuffer_format_supported(format)) {
 539                 retval |= usage &
 540                         (PIPE_BIND_RENDER_TARGET |
 541                          PIPE_BIND_DISPLAY_TARGET |
 542                          PIPE_BIND_SCANOUT |
 543                          PIPE_BIND_SHARED);
 544         }
 545
 546         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 547             r600_is_zs_format_supported(format)) {
 548                 retval |= PIPE_BIND_DEPTH_STENCIL;
 549         }
 550
 551         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 552                 struct r600_screen *rscreen = (struct r600_screen *)screen;
 553                 enum radeon_family family = r600_get_family(rscreen->radeon);
 554
 555                 if (r600_is_vertex_format_supported(format, family)) {
 556                         retval |= PIPE_BIND_VERTEX_BUFFER;
 557                 }
 558         }
 559
 560         if (usage & PIPE_BIND_TRANSFER_READ)
 561                 retval |= PIPE_BIND_TRANSFER_READ;
 562         if (usage & PIPE_BIND_TRANSFER_WRITE)
 563                 retval |= PIPE_BIND_TRANSFER_WRITE;
 564
 565         return retval == usage;
 566 }
 567
 568 static void r600_destroy_screen(struct pipe_screen* pscreen)
 569 {
 570         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 571
 572         if (rscreen == NULL)
 573                 return;
 574
 575         radeon_decref(rscreen->radeon);
 576
 577         util_slab_destroy(&rscreen->pool_buffers);
 578         pipe_mutex_destroy(rscreen->mutex_num_contexts);
 579         FREE(rscreen);
 580 }
 581
 582 static void r600_fence_reference(struct pipe_screen *pscreen,
 583                                  struct pipe_fence_handle **ptr,
 584                                  struct pipe_fence_handle *fence)
 585 {
 586         struct r600_fence **oldf = (struct r600_fence**)ptr;
 587         struct r600_fence *newf = (struct r600_fence*)fence;
 588
 589         if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
 590                 struct r600_pipe_context *ctx = (*oldf)->ctx;
 591                 LIST_ADDTAIL(&(*oldf)->head, &ctx->fences.pool);
 592         }
 593
 594         *ptr = fence;
 595 }
 596
 597 static boolean r600_fence_signalled(struct pipe_screen *pscreen,
 598                                     struct pipe_fence_handle *fence)
 599 {
 600         struct r600_fence *rfence = (struct r600_fence*)fence;
 601         struct r600_pipe_context *ctx = rfence->ctx;
 602
 603         return ctx->fences.data[rfence->index];
 604 }
 605
 606 static boolean r600_fence_finish(struct pipe_screen *pscreen,
 607                                  struct pipe_fence_handle *fence,
 608                                  uint64_t timeout)
 609 {
 610         struct r600_fence *rfence = (struct r600_fence*)fence;
 611         struct r600_pipe_context *ctx = rfence->ctx;
 612         int64_t start_time = 0;
 613         unsigned spins = 0;
 614
 615         if (timeout != PIPE_TIMEOUT_INFINITE) {
 616                 start_time = os_time_get();
 617
 618                 /* Convert to microseconds. */
 619                 timeout /= 1000;
 620         }
 621
 622         while (ctx->fences.data[rfence->index] == 0) {
 623                 if (++spins % 256)
 624                         continue;
 625 #ifdef PIPE_OS_UNIX
 626                 sched_yield();
 627 #else
 628                 os_time_sleep(10);
 629 #endif
 630                 if (timeout != PIPE_TIMEOUT_INFINITE &&
 631                     os_time_get() - start_time >= timeout) {
 632                         return FALSE;
 633                 }
 634         }
 635
 636         return TRUE;
 637 }
 638
 639 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 640 {
 641         struct r600_screen *rscreen;
 642
 643         rscreen = CALLOC_STRUCT(r600_screen);
 644         if (rscreen == NULL) {
 645                 return NULL;
 646         }
 647
 648         rscreen->radeon = radeon;
 649         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 650         rscreen->screen.destroy = r600_destroy_screen;
 651         rscreen->screen.get_name = r600_get_name;
 652         rscreen->screen.get_vendor = r600_get_vendor;
 653         rscreen->screen.get_param = r600_get_param;
 654         rscreen->screen.get_shader_param = r600_get_shader_param;
 655         rscreen->screen.get_paramf = r600_get_paramf;
 656         rscreen->screen.is_format_supported = r600_is_format_supported;
 657         rscreen->screen.context_create = r600_create_context;
 658         rscreen->screen.video_context_create = r600_video_create;
 659         rscreen->screen.fence_reference = r600_fence_reference;
 660         rscreen->screen.fence_signalled = r600_fence_signalled;
 661         rscreen->screen.fence_finish = r600_fence_finish;
 662         r600_init_screen_resource_functions(&rscreen->screen);
 663
 664         rscreen->tiling_info = r600_get_tiling_info(radeon);
 665         util_format_s3tc_init();
 666
 667         util_slab_create(&rscreen->pool_buffers,
 668                          sizeof(struct r600_resource_buffer), 64,
 669                          UTIL_SLAB_SINGLETHREADED);
 670
 671         pipe_mutex_init(rscreen->mutex_num_contexts);
 672
 673         return &rscreen->screen;
 674 }