2 * Copyright 2010 Marek Olšák <maraeo@gmail.com
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef R600_RESOURCE_H
24 #define R600_RESOURCE_H
28 /* flag to indicate a resource is to be used as a transfer so should not be tiled */
29 #define R600_RESOURCE_FLAG_TRANSFER PIPE_RESOURCE_FLAG_DRV_PRIV
30 #define R600_RESOURCE_FLAG_FLUSHED_DEPTH (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
32 struct r600_transfer
{
33 struct pipe_transfer transfer
;
34 struct r600_resource
*staging
;
38 struct compute_memory_item
;
40 struct r600_resource_global
{
41 struct r600_resource base
;
42 struct compute_memory_item
*chunk
;
45 struct r600_resource_texture
{
46 struct r600_resource resource
;
48 /* If this resource is a depth-stencil buffer on evergreen, this contains
49 * the depth part of the format. There is a separate stencil resource
50 * for the stencil buffer below. */
51 enum pipe_format real_format
;
53 unsigned offset
[PIPE_MAX_TEXTURE_LEVELS
];
54 unsigned pitch_in_bytes
[PIPE_MAX_TEXTURE_LEVELS
]; /* transfer */
55 unsigned pitch_in_blocks
[PIPE_MAX_TEXTURE_LEVELS
]; /* texture resource */
56 unsigned layer_size
[PIPE_MAX_TEXTURE_LEVELS
];
57 unsigned array_mode
[PIPE_MAX_TEXTURE_LEVELS
];
58 unsigned pitch_override
;
63 unsigned dirty_db_mask
; /* each bit says if that miplevel is dirty */
64 struct r600_resource_texture
*stencil
; /* Stencil is in a separate buffer on Evergreen. */
65 struct r600_resource_texture
*flushed_depth_texture
;
66 boolean is_flushing_texture
;
67 struct radeon_surface surface
;
70 #define R600_TEX_IS_TILED(tex, level) ((tex)->array_mode[level] != V_038000_ARRAY_LINEAR_GENERAL && (tex)->array_mode[level] != V_038000_ARRAY_LINEAR_ALIGNED)
73 struct pipe_surface base
;
74 unsigned aligned_height
;
77 void r600_resource_destroy(struct pipe_screen
*screen
, struct pipe_resource
*res
);
78 void r600_init_screen_resource_functions(struct pipe_screen
*screen
);
81 struct pipe_resource
*r600_texture_create(struct pipe_screen
*screen
,
82 const struct pipe_resource
*templ
);
83 struct pipe_resource
*r600_texture_from_handle(struct pipe_screen
*screen
,
84 const struct pipe_resource
*base
,
85 struct winsys_handle
*whandle
);
87 static INLINE
struct r600_resource
*r600_resource(struct pipe_resource
*r
)
89 return (struct r600_resource
*)r
;
92 bool r600_init_flushed_depth_texture(struct pipe_context
*ctx
,
93 struct pipe_resource
*texture
,
94 struct r600_resource_texture
**staging
);
96 /* r600_texture.c texture transfer functions. */
97 struct pipe_transfer
* r600_texture_get_transfer(struct pipe_context
*ctx
,
98 struct pipe_resource
*texture
,
101 const struct pipe_box
*box
);
102 void r600_texture_transfer_destroy(struct pipe_context
*ctx
,
103 struct pipe_transfer
*trans
);
104 void* r600_texture_transfer_map(struct pipe_context
*ctx
,
105 struct pipe_transfer
* transfer
);
106 void r600_texture_transfer_unmap(struct pipe_context
*ctx
,
107 struct pipe_transfer
* transfer
);