src/gallium/drivers/r600/r600_screen.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  *      Corbin Simpson
  26  */
  27 #include <stdio.h>
  28 #include "util/u_inlines.h"
  29 #include "util/u_format.h"
  30 #include "util/u_memory.h"
  31 #include "r600_screen.h"
  32 #include "r600_context.h"
  33 #include "r600_public.h"
  34 #include "r600_resource.h"
  35 #include "r600_state_inlines.h"
  36
  37 static const char* r600_get_vendor(struct pipe_screen* pscreen)
  38 {
  39         return "X.Org";
  40 }
  41
  42 static const char* r600_get_name(struct pipe_screen* pscreen)
  43 {
  44         struct r600_screen *screen = r600_screen(pscreen);
  45         enum radeon_family family = radeon_get_family(screen->rw);
  46
  47         if (family >= CHIP_R600 && family < CHIP_RV770)
  48                 return "R600 (HD2XXX,HD3XXX)";
  49         else if (family < CHIP_CEDAR)
  50                 return "R700 (HD4XXX)";
  51         else
  52                 return "EVERGREEN";
  53 }
  54
  55 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  56 {
  57         switch (param) {
  58         /* Supported features (boolean caps). */
  59         case PIPE_CAP_NPOT_TEXTURES:
  60         case PIPE_CAP_TWO_SIDED_STENCIL:
  61         case PIPE_CAP_GLSL:
  62         case PIPE_CAP_DUAL_SOURCE_BLEND:
  63         case PIPE_CAP_ANISOTROPIC_FILTER:
  64         case PIPE_CAP_POINT_SPRITE:
  65         case PIPE_CAP_OCCLUSION_QUERY:
  66         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  67         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  68         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
  69         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  70         case PIPE_CAP_SM3:
  71         case PIPE_CAP_TEXTURE_SWIZZLE:
  72         case PIPE_CAP_INDEP_BLEND_ENABLE:
  73         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
  74         case PIPE_CAP_DEPTH_CLAMP:
  75                 return 1;
  76
  77         /* Unsupported features (boolean caps). */
  78         case PIPE_CAP_TIMER_QUERY:
  79         case PIPE_CAP_STREAM_OUTPUT:
  80         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
  81                 return 0;
  82
  83         /* Texturing. */
  84         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  85         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  86         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  87                 return 14;
  88         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
  89                 /* FIXME allow this once infrastructure is there */
  90                 return 0;
  91         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  92         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
  93                 return 16;
  94
  95         /* Render targets. */
  96         case PIPE_CAP_MAX_RENDER_TARGETS:
  97                 /* FIXME some r6xx are buggy and can only do 4 */
  98                 return 8;
  99
 100         /* Fragment coordinate conventions. */
 101         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 102         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 103                 return 1;
 104         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 105         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 106                 return 0;
 107         default:
 108                 R600_ERR("r600: unknown param %d\n", param);
 109                 return 0;
 110         }
 111 }
 112
 113 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 114 {
 115         switch(shader)
 116         {
 117         case PIPE_SHADER_FRAGMENT:
 118         case PIPE_SHADER_VERTEX:
 119                 break;
 120         case PIPE_SHADER_GEOMETRY:
 121                 /* TODO: support and enable geometry programs */
 122                 return 0;
 123         default:
 124                 /* TODO: support tessellation on Evergreen */
 125                 return 0;
 126         }
 127
 128         /* TODO: all these should be fixed, since r600 surely supports much more! */
 129         switch (param) {
 130         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 131         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 132         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 133         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 134                 return 16384;
 135         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 136                 return 8; /* FIXME */
 137         case PIPE_SHADER_CAP_MAX_INPUTS:
 138                 if(shader == PIPE_SHADER_FRAGMENT)
 139                         return 10;
 140                 else
 141                         return 16;
 142         case PIPE_SHADER_CAP_MAX_TEMPS:
 143                 return 256; //max native temporaries
 144         case PIPE_SHADER_CAP_MAX_ADDRS:
 145                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 146         case PIPE_SHADER_CAP_MAX_CONSTS:
 147                 return 256; //max native parameters
 148         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 149                 return 1;
 150         case PIPE_SHADER_CAP_MAX_PREDS:
 151                 return 0; /* FIXME */
 152         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 153                 /* TODO: support this! */
 154                 return 0;
 155         default:
 156                 return 0;
 157         }
 158 }
 159
 160 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 161 {
 162         switch (param) {
 163         case PIPE_CAP_MAX_LINE_WIDTH:
 164         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 165         case PIPE_CAP_MAX_POINT_WIDTH:
 166         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 167                 return 8192.0f;
 168         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 169                 return 16.0f;
 170         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 171                 return 16.0f;
 172         default:
 173                 R600_ERR("r600: unsupported paramf %d\n", param);
 174                 return 0.0f;
 175         }
 176 }
 177
 178 static boolean r600_is_format_supported(struct pipe_screen* screen,
 179                                         enum pipe_format format,
 180                                         enum pipe_texture_target target,
 181                                         unsigned sample_count,
 182                                         unsigned usage,
 183                                         unsigned geom_flags)
 184 {
 185         unsigned retval = 0;
 186         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 187                 R600_ERR("r600: unsupported texture type %d\n", target);
 188                 return FALSE;
 189         }
 190
 191         /* Multisample */
 192         if (sample_count > 1)
 193                 return FALSE;
 194
 195         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 196             r600_is_sampler_format_supported(format)) {
 197                 retval |= PIPE_BIND_SAMPLER_VIEW;
 198         }
 199
 200         if ((usage & (PIPE_BIND_RENDER_TARGET |
 201                   PIPE_BIND_DISPLAY_TARGET |
 202                   PIPE_BIND_SCANOUT |
 203                   PIPE_BIND_SHARED)) &&
 204             r600_is_colorbuffer_format_supported(format)) {
 205                 retval |= usage &
 206                         (PIPE_BIND_RENDER_TARGET |
 207                          PIPE_BIND_DISPLAY_TARGET |
 208                          PIPE_BIND_SCANOUT |
 209                          PIPE_BIND_SHARED);
 210         }
 211
 212         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 213             r600_is_zs_format_supported(format)) {
 214                 retval |= PIPE_BIND_DEPTH_STENCIL;
 215         }
 216
 217         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 218             r600_is_vertex_format_supported(format))
 219                 retval |= PIPE_BIND_VERTEX_BUFFER;
 220
 221         if (usage & PIPE_BIND_TRANSFER_READ)
 222                 retval |= PIPE_BIND_TRANSFER_READ;
 223         if (usage & PIPE_BIND_TRANSFER_WRITE)
 224                 retval |= PIPE_BIND_TRANSFER_WRITE;
 225
 226         return retval == usage;
 227 }
 228
 229 static void r600_destroy_screen(struct pipe_screen* pscreen)
 230 {
 231         struct r600_screen* rscreen = r600_screen(pscreen);
 232
 233         if (rscreen == NULL)
 234                 return;
 235         FREE(rscreen);
 236 }
 237
 238 struct pipe_screen *r600_screen_create(struct radeon *rw)
 239 {
 240         struct r600_screen* rscreen;
 241         enum radeon_family family = radeon_get_family(rw);
 242
 243         rscreen = CALLOC_STRUCT(r600_screen);
 244         if (rscreen == NULL) {
 245                 return NULL;
 246         }
 247
 248         /* don't enable mem constant for r600 yet */
 249         rscreen->use_mem_constant = FALSE;
 250
 251         switch (family) {
 252         case CHIP_R600:
 253         case CHIP_RV610:
 254         case CHIP_RV630:
 255         case CHIP_RV670:
 256         case CHIP_RV620:
 257         case CHIP_RV635:
 258         case CHIP_RS780:
 259         case CHIP_RS880:
 260                 rscreen->chip_class = R600;
 261                 break;
 262         case CHIP_RV770:
 263         case CHIP_RV730:
 264         case CHIP_RV710:
 265         case CHIP_RV740:
 266                 rscreen->chip_class = R700;
 267                 break;
 268         case CHIP_CEDAR:
 269         case CHIP_REDWOOD:
 270         case CHIP_JUNIPER:
 271         case CHIP_CYPRESS:
 272         case CHIP_HEMLOCK:
 273                 rscreen->chip_class = EVERGREEN;
 274                 rscreen->use_mem_constant = TRUE;
 275                 break;
 276         default:
 277                 FREE(rscreen);
 278                 return NULL;
 279         }
 280         radeon_set_mem_constant(rw, rscreen->use_mem_constant);
 281         rscreen->rw = rw;
 282         rscreen->screen.winsys = (struct pipe_winsys*)rw;
 283         rscreen->screen.destroy = r600_destroy_screen;
 284         rscreen->screen.get_name = r600_get_name;
 285         rscreen->screen.get_vendor = r600_get_vendor;
 286         rscreen->screen.get_param = r600_get_param;
 287         rscreen->screen.get_shader_param = r600_get_shader_param;
 288         rscreen->screen.get_paramf = r600_get_paramf;
 289         rscreen->screen.is_format_supported = r600_is_format_supported;
 290         rscreen->screen.context_create = r600_create_context;
 291         r600_init_screen_texture_functions(&rscreen->screen);
 292         r600_init_screen_resource_functions(rscreen);
 293         return &rscreen->screen;
 294 }