src/gallium/drivers/r600/r600_screen.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  *      Corbin Simpson
  26  */
  27 #include <stdio.h>
  28 #include "util/u_inlines.h"
  29 #include "util/u_format.h"
  30 #include "util/u_memory.h"
  31 #include "r600_screen.h"
  32 #include "r600_context.h"
  33 #include "r600_public.h"
  34 #include "r600_resource.h"
  35 #include "r600_state_inlines.h"
  36
  37 static const char* r600_get_vendor(struct pipe_screen* pscreen)
  38 {
  39         return "X.Org";
  40 }
  41
  42 static const char* r600_get_name(struct pipe_screen* pscreen)
  43 {
  44         struct r600_screen *screen = r600_screen(pscreen);
  45         enum radeon_family family = radeon_get_family(screen->rw);
  46
  47         if (family >= CHIP_R600 && family < CHIP_RV770)
  48                 return "R600 (HD2XXX,HD3XXX)";
  49         else if (family < CHIP_CEDAR)
  50                 return "R700 (HD4XXX)";
  51         else
  52                 return "EVERGREEN";
  53 }
  54
  55 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  56 {
  57         switch (param) {
  58         /* Supported features (boolean caps). */
  59         case PIPE_CAP_NPOT_TEXTURES:
  60         case PIPE_CAP_TWO_SIDED_STENCIL:
  61         case PIPE_CAP_GLSL:
  62         case PIPE_CAP_DUAL_SOURCE_BLEND:
  63         case PIPE_CAP_ANISOTROPIC_FILTER:
  64         case PIPE_CAP_POINT_SPRITE:
  65         case PIPE_CAP_OCCLUSION_QUERY:
  66         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  67         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  68         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
  69         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  70         case PIPE_CAP_SM3:
  71         case PIPE_CAP_TEXTURE_SWIZZLE:
  72         case PIPE_CAP_INDEP_BLEND_ENABLE:
  73         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
  74         case PIPE_CAP_DEPTH_CLAMP:
  75                 return 1;
  76
  77         /* Unsupported features (boolean caps). */
  78         case PIPE_CAP_TIMER_QUERY:
  79         case PIPE_CAP_STREAM_OUTPUT:
  80         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
  81                 return 0;
  82
  83         /* Texturing. */
  84         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  85         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  86         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  87                 return 14;
  88         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
  89                 /* FIXME allow this once infrastructure is there */
  90                 return 0;
  91         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  92         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
  93                 return 16;
  94
  95         /* Render targets. */
  96         case PIPE_CAP_MAX_RENDER_TARGETS:
  97                 /* FIXME some r6xx are buggy and can only do 4 */
  98                 return 8;
  99
 100         /* Fragment coordinate conventions. */
 101         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 102         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 103                 return 1;
 104         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 105         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 106                 return 0;
 107         default:
 108                 R600_ERR("r600: unknown param %d\n", param);
 109                 return 0;
 110         }
 111 }
 112
 113 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 114 {
 115         switch(shader) {
 116         case PIPE_SHADER_FRAGMENT:
 117         case PIPE_SHADER_VERTEX:
 118                 break;
 119         case PIPE_SHADER_GEOMETRY:
 120                 /* TODO: support and enable geometry programs */
 121                 return 0;
 122         default:
 123                 /* TODO: support tessellation on Evergreen */
 124                 return 0;
 125         }
 126
 127         /* TODO: all these should be fixed, since r600 surely supports much more! */
 128         switch (param) {
 129         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 130         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 131         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 132         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 133                 return 16384;
 134         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 135                 return 8; /* FIXME */
 136         case PIPE_SHADER_CAP_MAX_INPUTS:
 137                 if(shader == PIPE_SHADER_FRAGMENT)
 138                         return 10;
 139                 else
 140                         return 16;
 141         case PIPE_SHADER_CAP_MAX_TEMPS:
 142                 return 256; //max native temporaries
 143         case PIPE_SHADER_CAP_MAX_ADDRS:
 144                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 145         case PIPE_SHADER_CAP_MAX_CONSTS:
 146                 return 256; //max native parameters
 147         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 148                 return 1;
 149         case PIPE_SHADER_CAP_MAX_PREDS:
 150                 return 0; /* FIXME */
 151         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 152                 /* TODO: support this! */
 153                 return 0;
 154         default:
 155                 return 0;
 156         }
 157 }
 158
 159 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 160 {
 161         switch (param) {
 162         case PIPE_CAP_MAX_LINE_WIDTH:
 163         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 164         case PIPE_CAP_MAX_POINT_WIDTH:
 165         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 166                 return 8192.0f;
 167         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 168                 return 16.0f;
 169         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 170                 return 16.0f;
 171         default:
 172                 R600_ERR("r600: unsupported paramf %d\n", param);
 173                 return 0.0f;
 174         }
 175 }
 176
 177 static boolean r600_is_format_supported(struct pipe_screen* screen,
 178                                         enum pipe_format format,
 179                                         enum pipe_texture_target target,
 180                                         unsigned sample_count,
 181                                         unsigned usage,
 182                                         unsigned geom_flags)
 183 {
 184         unsigned retval = 0;
 185         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 186                 R600_ERR("r600: unsupported texture type %d\n", target);
 187                 return FALSE;
 188         }
 189
 190         /* Multisample */
 191         if (sample_count > 1)
 192                 return FALSE;
 193
 194         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 195             r600_is_sampler_format_supported(format)) {
 196                 retval |= PIPE_BIND_SAMPLER_VIEW;
 197         }
 198
 199         if ((usage & (PIPE_BIND_RENDER_TARGET |
 200                   PIPE_BIND_DISPLAY_TARGET |
 201                   PIPE_BIND_SCANOUT |
 202                   PIPE_BIND_SHARED)) &&
 203             r600_is_colorbuffer_format_supported(format)) {
 204                 retval |= usage &
 205                         (PIPE_BIND_RENDER_TARGET |
 206                          PIPE_BIND_DISPLAY_TARGET |
 207                          PIPE_BIND_SCANOUT |
 208                          PIPE_BIND_SHARED);
 209         }
 210
 211         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 212             r600_is_zs_format_supported(format)) {
 213                 retval |= PIPE_BIND_DEPTH_STENCIL;
 214         }
 215
 216         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 217             r600_is_vertex_format_supported(format))
 218                 retval |= PIPE_BIND_VERTEX_BUFFER;
 219
 220         if (usage & PIPE_BIND_TRANSFER_READ)
 221                 retval |= PIPE_BIND_TRANSFER_READ;
 222         if (usage & PIPE_BIND_TRANSFER_WRITE)
 223                 retval |= PIPE_BIND_TRANSFER_WRITE;
 224
 225         return retval == usage;
 226 }
 227
 228 static void r600_destroy_screen(struct pipe_screen* pscreen)
 229 {
 230         struct r600_screen* rscreen = r600_screen(pscreen);
 231
 232         if (rscreen == NULL)
 233                 return;
 234         FREE(rscreen);
 235 }
 236
 237 struct pipe_screen *r600_screen_create(struct radeon *rw)
 238 {
 239         struct r600_screen* rscreen;
 240         enum radeon_family family = radeon_get_family(rw);
 241
 242         rscreen = CALLOC_STRUCT(r600_screen);
 243         if (rscreen == NULL) {
 244                 return NULL;
 245         }
 246
 247         /* don't enable mem constant for r600 yet */
 248         rscreen->use_mem_constant = FALSE;
 249
 250         switch (family) {
 251         case CHIP_R600:
 252         case CHIP_RV610:
 253         case CHIP_RV630:
 254         case CHIP_RV670:
 255         case CHIP_RV620:
 256         case CHIP_RV635:
 257         case CHIP_RS780:
 258         case CHIP_RS880:
 259                 rscreen->chip_class = R600;
 260                 break;
 261         case CHIP_RV770:
 262         case CHIP_RV730:
 263         case CHIP_RV710:
 264         case CHIP_RV740:
 265                 rscreen->chip_class = R700;
 266                 break;
 267         case CHIP_CEDAR:
 268         case CHIP_REDWOOD:
 269         case CHIP_JUNIPER:
 270         case CHIP_CYPRESS:
 271         case CHIP_HEMLOCK:
 272                 rscreen->chip_class = EVERGREEN;
 273                 rscreen->use_mem_constant = TRUE;
 274                 break;
 275         default:
 276                 FREE(rscreen);
 277                 return NULL;
 278         }
 279         radeon_set_mem_constant(rw, rscreen->use_mem_constant);
 280         rscreen->rw = rw;
 281         rscreen->screen.winsys = (struct pipe_winsys*)rw;
 282         rscreen->screen.destroy = r600_destroy_screen;
 283         rscreen->screen.get_name = r600_get_name;
 284         rscreen->screen.get_vendor = r600_get_vendor;
 285         rscreen->screen.get_param = r600_get_param;
 286         rscreen->screen.get_shader_param = r600_get_shader_param;
 287         rscreen->screen.get_paramf = r600_get_paramf;
 288         rscreen->screen.is_format_supported = r600_is_format_supported;
 289         rscreen->screen.context_create = r600_create_context;
 290         r600_init_screen_texture_functions(&rscreen->screen);
 291         r600_init_screen_resource_functions(rscreen);
 292         return &rscreen->screen;
 293 }