src/gallium/drivers/r600/r600_shader.h

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #ifndef R600_SHADER_H
  24 #define R600_SHADER_H
  25
  26 #include "r600_compiler.h"
  27 #include "radeon.h"
  28
  29 struct r600_shader_operand {
  30         struct c_vector                 *vector;
  31         unsigned                        sel;
  32         unsigned                        chan;
  33         unsigned                        neg;
  34         unsigned                        abs;
  35 };
  36
  37 struct r600_shader_vfetch {
  38         struct r600_shader_vfetch       *next;
  39         struct r600_shader_vfetch       *prev;
  40         unsigned                        cf_addr;
  41         struct r600_shader_operand      src[2];
  42         struct r600_shader_operand      dst[4];
  43 };
  44
  45 struct r600_shader_inst {
  46         unsigned                        is_op3;
  47         unsigned                        opcode;
  48         unsigned                        inst;
  49         struct r600_shader_operand      src[3];
  50         struct r600_shader_operand      dst;
  51         unsigned                        last;
  52 };
  53
  54 struct r600_shader_alu {
  55         struct r600_shader_alu          *next;
  56         struct r600_shader_alu          *prev;
  57         unsigned                        nalu;
  58         unsigned                        nliteral;
  59         unsigned                        nconstant;
  60         struct r600_shader_inst         alu[5];
  61         u32                             literal[4];
  62 };
  63
  64 struct r600_shader_node {
  65         struct r600_shader_node         *next;
  66         struct r600_shader_node         *prev;
  67         unsigned                        cf_id;          /**< cf index (in dw) in byte code */
  68         unsigned                        cf_addr;        /**< instructions index (in dw) in byte code */
  69         unsigned                        nslot;          /**< number of slot (2 dw) needed by this node */
  70         unsigned                        nfetch;
  71         struct c_node                   *node;          /**< compiler node from which this node originate */
  72         struct r600_shader_vfetch       vfetch;         /**< list of vfetch instructions */
  73         struct r600_shader_alu          alu;            /**< list of alu instructions */
  74 };
  75
  76 struct r600_shader_io {
  77         unsigned        name;
  78         unsigned        gpr;
  79         int             sid;
  80 };
  81
  82 struct r600_shader {
  83         unsigned                        stack_size;             /**< stack size needed by this shader */
  84         unsigned                        ngpr;                   /**< number of GPR needed by this shader */
  85         unsigned                        nconstant;              /**< number of constants used by this shader */
  86         unsigned                        nresource;              /**< number of resources used by this shader */
  87         unsigned                        noutput;
  88         unsigned                        ninput;
  89         unsigned                        nvector;
  90         unsigned                        ncf;                    /**< total number of cf clauses */
  91         unsigned                        nslot;                  /**< total number of slots (2 dw) */
  92         unsigned                        flat_shade;             /**< are we flat shading */
  93         struct r600_shader_node         nodes;                  /**< list of node */
  94         struct r600_shader_io           input[32];
  95         struct r600_shader_io           output[32];
  96         /* TODO replace GPR by some better register allocator */
  97         struct c_vector                 **gpr;
  98         unsigned                        ndw;                    /**< bytes code size in dw */
  99         u32                             *bcode;                 /**< bytes code */
 100         enum pipe_format                resource_format[160];   /**< format of resource */
 101         struct c_shader                 cshader;
 102 };
 103
 104 void r600_shader_cleanup(struct r600_shader *rshader);
 105 int r600_shader_register(struct r600_shader *rshader);
 106 int r600_shader_node(struct r600_shader *shader);
 107 void r600_shader_node_place(struct r600_shader *rshader);
 108 int r600_shader_find_gpr(struct r600_shader *rshader, struct c_vector *v, unsigned swizzle,
 109                         struct r600_shader_operand *operand);
 110 int r600_shader_vfetch_bytecode(struct r600_shader *rshader,
 111                                 struct r600_shader_node *rnode,
 112                                 struct r600_shader_vfetch *vfetch,
 113                                 unsigned *cid);
 114 int r600_shader_update(struct r600_shader *rshader,
 115                         enum pipe_format *resource_format);
 116 int r600_shader_legalize(struct r600_shader *rshader);
 117
 118 int r700_shader_translate(struct r600_shader *rshader);
 119
 120 int c_shader_from_tgsi(struct c_shader *shader, unsigned type,
 121                         const struct tgsi_token *tokens);
 122 int r600_shader_register(struct r600_shader *rshader);
 123 int r600_shader_translate_rec(struct r600_shader *rshader, struct c_node *node);
 124 int r700_shader_translate(struct r600_shader *rshader);
 125 int r600_shader_insert_fetch(struct c_shader *shader);
 126
 127 enum r600_instruction {
 128         INST_ADD                        = 0,
 129         INST_MUL                        = 1,
 130         INST_MUL_IEEE                   = 2,
 131         INST_MAX                        = 3,
 132         INST_MIN                        = 4,
 133         INST_MAX_DX10                   = 5,
 134         INST_MIN_DX10                   = 6,
 135         INST_SETE                       = 7,
 136         INST_SETGT                      = 8,
 137         INST_SETGE                      = 9,
 138         INST_SETNE                      = 10,
 139         INST_SETE_DX10                  = 11,
 140         INST_SETGT_DX10                 = 12,
 141         INST_SETGE_DX10                 = 13,
 142         INST_SETNE_DX10                 = 14,
 143         INST_FRACT                      = 15,
 144         INST_TRUNC                      = 16,
 145         INST_CEIL                       = 17,
 146         INST_RNDNE                      = 18,
 147         INST_FLOOR                      = 19,
 148         INST_MOVA                       = 20,
 149         INST_MOVA_FLOOR                 = 21,
 150         INST_MOVA_INT                   = 22,
 151         INST_MOV                        = 23,
 152         INST_NOP                        = 24,
 153         INST_PRED_SETGT_UINT            = 25,
 154         INST_PRED_SETGE_UINT            = 26,
 155         INST_PRED_SETE                  = 27,
 156         INST_PRED_SETGT                 = 28,
 157         INST_PRED_SETGE                 = 29,
 158         INST_PRED_SETNE                 = 30,
 159         INST_PRED_SET_INV               = 31,
 160         INST_PRED_SET_POP               = 32,
 161         INST_PRED_SET_CLR               = 33,
 162         INST_PRED_SET_RESTORE           = 34,
 163         INST_PRED_SETE_PUSH             = 35,
 164         INST_PRED_SETGT_PUSH            = 36,
 165         INST_PRED_SETGE_PUSH            = 37,
 166         INST_PRED_SETNE_PUSH            = 38,
 167         INST_KILLE                      = 39,
 168         INST_KILLGT                     = 40,
 169         INST_KILLGE                     = 41,
 170         INST_KILLNE                     = 42,
 171         INST_AND_INT                    = 43,
 172         INST_OR_INT                     = 44,
 173         INST_XOR_INT                    = 45,
 174         INST_NOT_INT                    = 46,
 175         INST_ADD_INT                    = 47,
 176         INST_SUB_INT                    = 48,
 177         INST_MAX_INT                    = 49,
 178         INST_MIN_INT                    = 50,
 179         INST_MAX_UINT                   = 51,
 180         INST_MIN_UINT                   = 52,
 181         INST_SETE_INT                   = 53,
 182         INST_SETGT_INT                  = 54,
 183         INST_SETGE_INT                  = 55,
 184         INST_SETNE_INT                  = 56,
 185         INST_SETGT_UINT                 = 57,
 186         INST_SETGE_UINT                 = 58,
 187         INST_KILLGT_UINT                = 59,
 188         INST_KILLGE_UINT                = 60,
 189         INST_PRED_SETE_INT              = 61,
 190         INST_PRED_SETGT_INT             = 62,
 191         INST_PRED_SETGE_INT             = 63,
 192         INST_PRED_SETNE_INT             = 64,
 193         INST_KILLE_INT                  = 65,
 194         INST_KILLGT_INT                 = 66,
 195         INST_KILLGE_INT                 = 67,
 196         INST_KILLNE_INT                 = 68,
 197         INST_PRED_SETE_PUSH_INT         = 69,
 198         INST_PRED_SETGT_PUSH_INT        = 70,
 199         INST_PRED_SETGE_PUSH_INT        = 71,
 200         INST_PRED_SETNE_PUSH_INT        = 72,
 201         INST_PRED_SETLT_PUSH_INT        = 73,
 202         INST_PRED_SETLE_PUSH_INT        = 74,
 203         INST_DOT4                       = 75,
 204         INST_DOT4_IEEE                  = 76,
 205         INST_CUBE                       = 77,
 206         INST_MAX4                       = 78,
 207         INST_MOVA_GPR_INT               = 79,
 208         INST_EXP_IEEE                   = 80,
 209         INST_LOG_CLAMPED                = 81,
 210         INST_LOG_IEEE                   = 82,
 211         INST_RECIP_CLAMPED              = 83,
 212         INST_RECIP_FF                   = 84,
 213         INST_RECIP_IEEE                 = 85,
 214         INST_RECIPSQRT_CLAMPED          = 86,
 215         INST_RECIPSQRT_FF               = 87,
 216         INST_RECIPSQRT_IEEE             = 88,
 217         INST_SQRT_IEEE                  = 89,
 218         INST_FLT_TO_INT                 = 90,
 219         INST_INT_TO_FLT                 = 91,
 220         INST_UINT_TO_FLT                = 92,
 221         INST_SIN                        = 93,
 222         INST_COS                        = 94,
 223         INST_ASHR_INT                   = 95,
 224         INST_LSHR_INT                   = 96,
 225         INST_LSHL_INT                   = 97,
 226         INST_MULLO_INT                  = 98,
 227         INST_MULHI_INT                  = 99,
 228         INST_MULLO_UINT                 = 100,
 229         INST_MULHI_UINT                 = 101,
 230         INST_RECIP_INT                  = 102,
 231         INST_RECIP_UINT                 = 103,
 232         INST_FLT_TO_UINT                = 104,
 233         INST_MUL_LIT                    = 105,
 234         INST_MUL_LIT_M2                 = 106,
 235         INST_MUL_LIT_M4                 = 107,
 236         INST_MUL_LIT_D2                 = 108,
 237         INST_MULADD                     = 109,
 238         INST_MULADD_M2                  = 110,
 239         INST_MULADD_M4                  = 111,
 240         INST_MULADD_D2                  = 112,
 241         INST_MULADD_IEEE                = 113,
 242         INST_MULADD_IEEE_M2             = 114,
 243         INST_MULADD_IEEE_M4             = 115,
 244         INST_MULADD_IEEE_D2             = 116,
 245         INST_CNDE                       = 117,
 246         INST_CNDGT                      = 118,
 247         INST_CNDGE                      = 119,
 248         INST_CNDE_INT                   = 120,
 249         INST_CNDGT_INT                  = 121,
 250         INST_CNDGE_INT                  = 122,
 251         INST_COUNT
 252 };
 253
 254 struct r600_instruction_info {
 255         enum r600_instruction           instruction;
 256         unsigned                        opcode;
 257         unsigned                        is_trans;
 258         unsigned                        is_op3;
 259 };
 260
 261
 262 #endif