src/gallium/drivers/r600/r600_state_common.c

   1 /*
   2  * Copyright 2010 Red Hat Inc.
   3  *           2010 Jerome Glisse
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie <airlied@redhat.com>
  25  *          Jerome Glisse <jglisse@redhat.com>
  26  */
  27 #include <util/u_memory.h>
  28 #include <util/u_format.h>
  29 #include <pipebuffer/pb_buffer.h>
  30 #include "pipe/p_shader_tokens.h"
  31 #include "r600_pipe.h"
  32 #include "r600d.h"
  33
  34 /* common state between evergreen and r600 */
  35 void r600_bind_blend_state(struct pipe_context *ctx, void *state)
  36 {
  37         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  38         struct r600_pipe_blend *blend = (struct r600_pipe_blend *)state;
  39         struct r600_pipe_state *rstate;
  40
  41         if (state == NULL)
  42                 return;
  43         rstate = &blend->rstate;
  44         rctx->states[rstate->id] = rstate;
  45         rctx->cb_target_mask = blend->cb_target_mask;
  46         r600_context_pipe_state_set(&rctx->ctx, rstate);
  47 }
  48
  49 void r600_bind_rs_state(struct pipe_context *ctx, void *state)
  50 {
  51         struct r600_pipe_rasterizer *rs = (struct r600_pipe_rasterizer *)state;
  52         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  53
  54         if (state == NULL)
  55                 return;
  56
  57         rctx->flatshade = rs->flatshade;
  58         rctx->sprite_coord_enable = rs->sprite_coord_enable;
  59         rctx->rasterizer = rs;
  60
  61         rctx->states[rs->rstate.id] = &rs->rstate;
  62         r600_context_pipe_state_set(&rctx->ctx, &rs->rstate);
  63
  64         if (rctx->family >= CHIP_CEDAR) {
  65                 evergreen_polygon_offset_update(rctx);
  66         } else {
  67                 r600_polygon_offset_update(rctx);
  68         }
  69 }
  70
  71 void r600_delete_rs_state(struct pipe_context *ctx, void *state)
  72 {
  73         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  74         struct r600_pipe_rasterizer *rs = (struct r600_pipe_rasterizer *)state;
  75
  76         if (rctx->rasterizer == rs) {
  77                 rctx->rasterizer = NULL;
  78         }
  79         if (rctx->states[rs->rstate.id] == &rs->rstate) {
  80                 rctx->states[rs->rstate.id] = NULL;
  81         }
  82         free(rs);
  83 }
  84
  85 void r600_sampler_view_destroy(struct pipe_context *ctx,
  86                                struct pipe_sampler_view *state)
  87 {
  88         struct r600_pipe_sampler_view *resource = (struct r600_pipe_sampler_view *)state;
  89
  90         pipe_resource_reference(&state->texture, NULL);
  91         FREE(resource);
  92 }
  93
  94 void r600_bind_state(struct pipe_context *ctx, void *state)
  95 {
  96         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  97         struct r600_pipe_state *rstate = (struct r600_pipe_state *)state;
  98
  99         if (state == NULL)
 100                 return;
 101         rctx->states[rstate->id] = rstate;
 102         r600_context_pipe_state_set(&rctx->ctx, rstate);
 103 }
 104
 105 void r600_delete_state(struct pipe_context *ctx, void *state)
 106 {
 107         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 108         struct r600_pipe_state *rstate = (struct r600_pipe_state *)state;
 109
 110         if (rctx->states[rstate->id] == rstate) {
 111                 rctx->states[rstate->id] = NULL;
 112         }
 113         for (int i = 0; i < rstate->nregs; i++) {
 114                 r600_bo_reference(rctx->radeon, &rstate->regs[i].bo, NULL);
 115         }
 116         free(rstate);
 117 }
 118
 119 void r600_bind_vertex_elements(struct pipe_context *ctx, void *state)
 120 {
 121         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 122         struct r600_vertex_element *v = (struct r600_vertex_element*)state;
 123
 124         rctx->vertex_elements = v;
 125         if (v) {
 126                 u_vbuf_mgr_bind_vertex_elements(rctx->vbuf_mgr, state,
 127                                                 v->vmgr_elements);
 128
 129                 rctx->states[v->rstate.id] = &v->rstate;
 130                 r600_context_pipe_state_set(&rctx->ctx, &v->rstate);
 131         }
 132 }
 133
 134 void r600_delete_vertex_element(struct pipe_context *ctx, void *state)
 135 {
 136         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 137         struct r600_vertex_element *v = (struct r600_vertex_element*)state;
 138
 139         if (rctx->states[v->rstate.id] == &v->rstate) {
 140                 rctx->states[v->rstate.id] = NULL;
 141         }
 142         if (rctx->vertex_elements == state)
 143                 rctx->vertex_elements = NULL;
 144
 145         r600_bo_reference(rctx->radeon, &v->fetch_shader, NULL);
 146         u_vbuf_mgr_destroy_vertex_elements(rctx->vbuf_mgr, v->vmgr_elements);
 147         FREE(state);
 148 }
 149
 150
 151 void r600_set_index_buffer(struct pipe_context *ctx,
 152                            const struct pipe_index_buffer *ib)
 153 {
 154         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 155
 156         if (ib) {
 157                 pipe_resource_reference(&rctx->index_buffer.buffer, ib->buffer);
 158                 memcpy(&rctx->index_buffer, ib, sizeof(rctx->index_buffer));
 159         } else {
 160                 pipe_resource_reference(&rctx->index_buffer.buffer, NULL);
 161                 memset(&rctx->index_buffer, 0, sizeof(rctx->index_buffer));
 162         }
 163
 164         /* TODO make this more like a state */
 165 }
 166
 167 void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
 168                              const struct pipe_vertex_buffer *buffers)
 169 {
 170         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 171         int i;
 172
 173         /* Zero states. */
 174         for (i = 0; i < count; i++) {
 175                 if (!buffers[i].buffer) {
 176                         if (rctx->family >= CHIP_CEDAR) {
 177                                 evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 178                         } else {
 179                                 r600_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 180                         }
 181                 }
 182         }
 183         for (; i < rctx->vbuf_mgr->nr_real_vertex_buffers; i++) {
 184                 if (rctx->family >= CHIP_CEDAR) {
 185                         evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 186                 } else {
 187                         r600_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 188                 }
 189         }
 190
 191         u_vbuf_mgr_set_vertex_buffers(rctx->vbuf_mgr, count, buffers);
 192 }
 193
 194 void *r600_create_vertex_elements(struct pipe_context *ctx,
 195                                   unsigned count,
 196                                   const struct pipe_vertex_element *elements)
 197 {
 198         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 199         struct r600_vertex_element *v = CALLOC_STRUCT(r600_vertex_element);
 200
 201         assert(count < 32);
 202         if (!v)
 203                 return NULL;
 204
 205         v->count = count;
 206         v->vmgr_elements =
 207                 u_vbuf_mgr_create_vertex_elements(rctx->vbuf_mgr, count,
 208                                                   elements, v->elements);
 209
 210         if (r600_vertex_elements_build_fetch_shader(rctx, v)) {
 211                 FREE(v);
 212                 return NULL;
 213         }
 214
 215         return v;
 216 }
 217
 218 void *r600_create_shader_state(struct pipe_context *ctx,
 219                                const struct pipe_shader_state *state)
 220 {
 221         struct r600_pipe_shader *shader =  CALLOC_STRUCT(r600_pipe_shader);
 222         int r;
 223
 224         r =  r600_pipe_shader_create(ctx, shader, state->tokens);
 225         if (r) {
 226                 return NULL;
 227         }
 228         return shader;
 229 }
 230
 231 void r600_bind_ps_shader(struct pipe_context *ctx, void *state)
 232 {
 233         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 234
 235         /* TODO delete old shader */
 236         rctx->ps_shader = (struct r600_pipe_shader *)state;
 237         if (state) {
 238                 r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_shader->rstate);
 239         }
 240 }
 241
 242 void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
 243 {
 244         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 245
 246         /* TODO delete old shader */
 247         rctx->vs_shader = (struct r600_pipe_shader *)state;
 248         if (state) {
 249                 r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_shader->rstate);
 250         }
 251 }
 252
 253 void r600_delete_ps_shader(struct pipe_context *ctx, void *state)
 254 {
 255         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 256         struct r600_pipe_shader *shader = (struct r600_pipe_shader *)state;
 257
 258         if (rctx->ps_shader == shader) {
 259                 rctx->ps_shader = NULL;
 260         }
 261
 262         r600_pipe_shader_destroy(ctx, shader);
 263         free(shader);
 264 }
 265
 266 void r600_delete_vs_shader(struct pipe_context *ctx, void *state)
 267 {
 268         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 269         struct r600_pipe_shader *shader = (struct r600_pipe_shader *)state;
 270
 271         if (rctx->vs_shader == shader) {
 272                 rctx->vs_shader = NULL;
 273         }
 274
 275         r600_pipe_shader_destroy(ctx, shader);
 276         free(shader);
 277 }
 278
 279 /* FIXME optimize away spi update when it's not needed */
 280 void r600_spi_update(struct r600_pipe_context *rctx)
 281 {
 282         struct r600_pipe_shader *shader = rctx->ps_shader;
 283         struct r600_pipe_state rstate;
 284         struct r600_shader *rshader = &shader->shader;
 285         unsigned i, tmp;
 286
 287         rstate.nregs = 0;
 288         for (i = 0; i < rshader->ninput; i++) {
 289                 tmp = S_028644_SEMANTIC(r600_find_vs_semantic_index(&rctx->vs_shader->shader, rshader, i));
 290
 291                 if (rshader->input[i].name == TGSI_SEMANTIC_COLOR ||
 292                     rshader->input[i].name == TGSI_SEMANTIC_BCOLOR ||
 293                     rshader->input[i].name == TGSI_SEMANTIC_POSITION) {
 294                         tmp |= S_028644_FLAT_SHADE(rctx->flatshade);
 295                 }
 296
 297                 if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
 298                     rctx->sprite_coord_enable & (1 << rshader->input[i].sid)) {
 299                         tmp |= S_028644_PT_SPRITE_TEX(1);
 300                 }
 301
 302                 if (rctx->family < CHIP_CEDAR) {
 303                         if (rshader->input[i].centroid)
 304                                 tmp |= S_028644_SEL_CENTROID(1);
 305
 306                         if (rshader->input[i].interpolate == TGSI_INTERPOLATE_LINEAR)
 307                                 tmp |= S_028644_SEL_LINEAR(1);
 308                 }
 309
 310                 r600_pipe_state_add_reg(&rstate, R_028644_SPI_PS_INPUT_CNTL_0 + i * 4, tmp, 0xFFFFFFFF, NULL);
 311         }
 312         r600_context_pipe_state_set(&rctx->ctx, &rstate);
 313 }
 314
 315 void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
 316                               struct pipe_resource *buffer)
 317 {
 318         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 319         struct r600_resource_buffer *rbuffer = r600_buffer(buffer);
 320         struct r600_pipe_state *rstate;
 321         uint32_t offset;
 322
 323         /* Note that the state tracker can unbind constant buffers by
 324          * passing NULL here.
 325          */
 326         if (buffer == NULL) {
 327                 return;
 328         }
 329
 330         r600_upload_const_buffer(rctx, &rbuffer, &offset);
 331         offset += r600_bo_offset(rbuffer->r.bo);
 332
 333         switch (shader) {
 334         case PIPE_SHADER_VERTEX:
 335                 rctx->vs_const_buffer.nregs = 0;
 336                 r600_pipe_state_add_reg(&rctx->vs_const_buffer,
 337                                         R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
 338                                         ALIGN_DIVUP(buffer->width0 >> 4, 16),
 339                                         0xFFFFFFFF, NULL);
 340                 r600_pipe_state_add_reg(&rctx->vs_const_buffer,
 341                                         R_028980_ALU_CONST_CACHE_VS_0,
 342                                         offset >> 8, 0xFFFFFFFF, rbuffer->r.bo);
 343                 r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_const_buffer);
 344
 345                 rstate = &rctx->vs_const_buffer_resource[index];
 346                 rstate->id = R600_PIPE_STATE_RESOURCE;
 347                 rstate->nregs = 0;
 348                 if (rctx->family >= CHIP_CEDAR) {
 349                         evergreen_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 350                         evergreen_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
 351                 } else {
 352                         r600_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 353                         r600_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
 354                 }
 355                 break;
 356         case PIPE_SHADER_FRAGMENT:
 357                 rctx->ps_const_buffer.nregs = 0;
 358                 r600_pipe_state_add_reg(&rctx->ps_const_buffer,
 359                                         R_028140_ALU_CONST_BUFFER_SIZE_PS_0,
 360                                         ALIGN_DIVUP(buffer->width0 >> 4, 16),
 361                                         0xFFFFFFFF, NULL);
 362                 r600_pipe_state_add_reg(&rctx->ps_const_buffer,
 363                                         R_028940_ALU_CONST_CACHE_PS_0,
 364                                         offset >> 8, 0xFFFFFFFF, rbuffer->r.bo);
 365                 r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_const_buffer);
 366
 367                 rstate = &rctx->ps_const_buffer_resource[index];
 368                 rstate->id = R600_PIPE_STATE_RESOURCE;
 369                 rstate->nregs = 0;
 370                 if (rctx->family >= CHIP_CEDAR) {
 371                         evergreen_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 372                         evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
 373                 } else {
 374                         r600_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 375                         r600_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
 376                 }
 377                 break;
 378         default:
 379                 R600_ERR("unsupported %d\n", shader);
 380                 return;
 381         }
 382
 383         if (buffer != &rbuffer->r.b.b.b)
 384                 pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
 385 }
 386
 387 static void r600_vertex_buffer_update(struct r600_pipe_context *rctx)
 388 {
 389         struct r600_pipe_state *rstate;
 390         struct r600_resource *rbuffer;
 391         struct pipe_vertex_buffer *vertex_buffer;
 392         unsigned i, count, offset;
 393
 394         if (rctx->vertex_elements->vbuffer_need_offset) {
 395                 /* one resource per vertex elements */
 396                 count = rctx->vertex_elements->count;
 397         } else {
 398                 /* bind vertex buffer once */
 399                 count = rctx->vbuf_mgr->nr_real_vertex_buffers;
 400         }
 401
 402         for (i = 0 ; i < count; i++) {
 403                 rstate = &rctx->fs_resource[i];
 404                 rstate->id = R600_PIPE_STATE_RESOURCE;
 405                 rstate->nregs = 0;
 406
 407                 if (rctx->vertex_elements->vbuffer_need_offset) {
 408                         /* one resource per vertex elements */
 409                         unsigned vbuffer_index;
 410                         vbuffer_index = rctx->vertex_elements->elements[i].vertex_buffer_index;
 411                         vertex_buffer = &rctx->vbuf_mgr->vertex_buffer[vbuffer_index];
 412                         rbuffer = (struct r600_resource*)rctx->vbuf_mgr->real_vertex_buffer[vbuffer_index];
 413                         offset = rctx->vertex_elements->vbuffer_offset[i];
 414                 } else {
 415                         /* bind vertex buffer once */
 416                         vertex_buffer = &rctx->vbuf_mgr->vertex_buffer[i];
 417                         rbuffer = (struct r600_resource*)rctx->vbuf_mgr->real_vertex_buffer[i];
 418                         offset = 0;
 419                 }
 420                 if (vertex_buffer == NULL || rbuffer == NULL)
 421                         continue;
 422                 offset += vertex_buffer->buffer_offset + r600_bo_offset(rbuffer->bo);
 423
 424                 if (rctx->family >= CHIP_CEDAR) {
 425                         evergreen_pipe_set_buffer_resource(rctx, rstate, rbuffer, offset, vertex_buffer->stride);
 426                         evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, rstate, i);
 427                 } else {
 428                         r600_pipe_set_buffer_resource(rctx, rstate, rbuffer, offset, vertex_buffer->stride);
 429                         r600_context_pipe_state_set_fs_resource(&rctx->ctx, rstate, i);
 430                 }
 431         }
 432 }
 433
 434 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 435 {
 436         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 437         struct r600_resource *rbuffer;
 438         u32 vgt_dma_index_type, vgt_draw_initiator, mask;
 439         struct r600_draw rdraw;
 440         struct r600_pipe_state vgt;
 441         struct r600_drawl draw = {};
 442         unsigned prim;
 443
 444         r600_flush_depth_textures(rctx);
 445         u_vbuf_mgr_draw_begin(rctx->vbuf_mgr, info, NULL, NULL);
 446         r600_vertex_buffer_update(rctx);
 447
 448         draw.info = *info;
 449         draw.ctx = ctx;
 450         if (info->indexed && rctx->index_buffer.buffer) {
 451                 draw.info.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
 452                 pipe_resource_reference(&draw.index_buffer, rctx->index_buffer.buffer);
 453
 454                 r600_translate_index_buffer(rctx, &draw.index_buffer,
 455                                             &rctx->index_buffer.index_size,
 456                                             &draw.info.start,
 457                                             info->count);
 458
 459                 draw.index_size = rctx->index_buffer.index_size;
 460                 draw.index_buffer_offset = draw.info.start * draw.index_size;
 461                 draw.info.start = 0;
 462
 463                 if (u_vbuf_resource(draw.index_buffer)->user_ptr) {
 464                         r600_upload_index_buffer(rctx, &draw);
 465                 }
 466         } else {
 467                 draw.info.index_bias = info->start;
 468         }
 469
 470         switch (draw.index_size) {
 471         case 2:
 472                 vgt_draw_initiator = 0;
 473                 vgt_dma_index_type = 0;
 474                 break;
 475         case 4:
 476                 vgt_draw_initiator = 0;
 477                 vgt_dma_index_type = 1;
 478                 break;
 479         case 0:
 480                 vgt_draw_initiator = 2;
 481                 vgt_dma_index_type = 0;
 482                 break;
 483         default:
 484                 R600_ERR("unsupported index size %d\n", draw.index_size);
 485                 return;
 486         }
 487         if (r600_conv_pipe_prim(draw.info.mode, &prim))
 488                 return;
 489         if (unlikely(rctx->ps_shader == NULL)) {
 490                 R600_ERR("missing vertex shader\n");
 491                 return;
 492         }
 493         if (unlikely(rctx->vs_shader == NULL)) {
 494                 R600_ERR("missing vertex shader\n");
 495                 return;
 496         }
 497         /* there should be enough input */
 498         if (rctx->vertex_elements->count < rctx->vs_shader->shader.bc.nresource) {
 499                 R600_ERR("%d resources provided, expecting %d\n",
 500                         rctx->vertex_elements->count, rctx->vs_shader->shader.bc.nresource);
 501                 return;
 502         }
 503
 504         r600_spi_update(rctx);
 505
 506         mask = 0;
 507         for (int i = 0; i < rctx->framebuffer.nr_cbufs; i++) {
 508                 mask |= (0xF << (i * 4));
 509         }
 510
 511         vgt.id = R600_PIPE_STATE_VGT;
 512         vgt.nregs = 0;
 513         r600_pipe_state_add_reg(&vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, 0xFFFFFFFF, NULL);
 514         r600_pipe_state_add_reg(&vgt, R_028408_VGT_INDX_OFFSET, draw.info.index_bias, 0xFFFFFFFF, NULL);
 515         r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw.info.max_index, 0xFFFFFFFF, NULL);
 516         r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw.info.min_index, 0xFFFFFFFF, NULL);
 517         r600_pipe_state_add_reg(&vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL);
 518         r600_pipe_state_add_reg(&vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL);
 519         r600_pipe_state_add_reg(&vgt, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0xFFFFFFFF, NULL);
 520         r600_context_pipe_state_set(&rctx->ctx, &vgt);
 521
 522         rdraw.vgt_num_indices = draw.info.count;
 523         rdraw.vgt_num_instances = draw.info.instance_count;
 524         rdraw.vgt_index_type = vgt_dma_index_type;
 525         rdraw.vgt_draw_initiator = vgt_draw_initiator;
 526         rdraw.indices = NULL;
 527         if (draw.index_buffer) {
 528                 rbuffer = (struct r600_resource*)draw.index_buffer;
 529                 rdraw.indices = rbuffer->bo;
 530                 rdraw.indices_bo_offset = draw.index_buffer_offset;
 531         }
 532
 533         if (rctx->family >= CHIP_CEDAR) {
 534                 evergreen_context_draw(&rctx->ctx, &rdraw);
 535         } else {
 536                 r600_context_draw(&rctx->ctx, &rdraw);
 537         }
 538
 539         if (rctx->framebuffer.zsbuf)
 540         {
 541                 struct pipe_resource *tex = rctx->framebuffer.zsbuf->texture;
 542                 ((struct r600_resource_texture *)tex)->dirty_db = TRUE;
 543         }
 544
 545         pipe_resource_reference(&draw.index_buffer, NULL);
 546
 547         u_vbuf_mgr_draw_end(rctx->vbuf_mgr);
 548 }