src/gallium/drivers/r600/r600_state_common.c

   1 /*
   2  * Copyright 2010 Red Hat Inc.
   3  *           2010 Jerome Glisse
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie <airlied@redhat.com>
  25  *          Jerome Glisse <jglisse@redhat.com>
  26  */
  27 #include <util/u_memory.h>
  28 #include <util/u_format.h>
  29 #include <pipebuffer/pb_buffer.h>
  30 #include "pipe/p_shader_tokens.h"
  31 #include "r600_pipe.h"
  32 #include "r600d.h"
  33
  34 static int r600_conv_pipe_prim(unsigned pprim, unsigned *prim)
  35 {
  36         switch (pprim) {
  37         case PIPE_PRIM_POINTS:
  38                 *prim = V_008958_DI_PT_POINTLIST;
  39                 return 0;
  40         case PIPE_PRIM_LINES:
  41                 *prim = V_008958_DI_PT_LINELIST;
  42                 return 0;
  43         case PIPE_PRIM_LINE_STRIP:
  44                 *prim = V_008958_DI_PT_LINESTRIP;
  45                 return 0;
  46         case PIPE_PRIM_LINE_LOOP:
  47                 *prim = V_008958_DI_PT_LINELOOP;
  48                 return 0;
  49         case PIPE_PRIM_TRIANGLES:
  50                 *prim = V_008958_DI_PT_TRILIST;
  51                 return 0;
  52         case PIPE_PRIM_TRIANGLE_STRIP:
  53                 *prim = V_008958_DI_PT_TRISTRIP;
  54                 return 0;
  55         case PIPE_PRIM_TRIANGLE_FAN:
  56                 *prim = V_008958_DI_PT_TRIFAN;
  57                 return 0;
  58         case PIPE_PRIM_POLYGON:
  59                 *prim = V_008958_DI_PT_POLYGON;
  60                 return 0;
  61         case PIPE_PRIM_QUADS:
  62                 *prim = V_008958_DI_PT_QUADLIST;
  63                 return 0;
  64         case PIPE_PRIM_QUAD_STRIP:
  65                 *prim = V_008958_DI_PT_QUADSTRIP;
  66                 return 0;
  67         default:
  68                 fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, pprim);
  69                 return -1;
  70         }
  71 }
  72
  73 /* common state between evergreen and r600 */
  74 void r600_bind_blend_state(struct pipe_context *ctx, void *state)
  75 {
  76         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  77         struct r600_pipe_blend *blend = (struct r600_pipe_blend *)state;
  78         struct r600_pipe_state *rstate;
  79
  80         if (state == NULL)
  81                 return;
  82         rstate = &blend->rstate;
  83         rctx->states[rstate->id] = rstate;
  84         rctx->cb_target_mask = blend->cb_target_mask;
  85         r600_context_pipe_state_set(&rctx->ctx, rstate);
  86 }
  87
  88 void r600_bind_rs_state(struct pipe_context *ctx, void *state)
  89 {
  90         struct r600_pipe_rasterizer *rs = (struct r600_pipe_rasterizer *)state;
  91         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  92
  93         if (state == NULL)
  94                 return;
  95
  96         rctx->flatshade = rs->flatshade;
  97         rctx->sprite_coord_enable = rs->sprite_coord_enable;
  98         rctx->rasterizer = rs;
  99
 100         rctx->states[rs->rstate.id] = &rs->rstate;
 101         r600_context_pipe_state_set(&rctx->ctx, &rs->rstate);
 102
 103         if (rctx->family >= CHIP_CEDAR) {
 104                 evergreen_polygon_offset_update(rctx);
 105         } else {
 106                 r600_polygon_offset_update(rctx);
 107         }
 108 }
 109
 110 void r600_delete_rs_state(struct pipe_context *ctx, void *state)
 111 {
 112         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 113         struct r600_pipe_rasterizer *rs = (struct r600_pipe_rasterizer *)state;
 114
 115         if (rctx->rasterizer == rs) {
 116                 rctx->rasterizer = NULL;
 117         }
 118         if (rctx->states[rs->rstate.id] == &rs->rstate) {
 119                 rctx->states[rs->rstate.id] = NULL;
 120         }
 121         free(rs);
 122 }
 123
 124 void r600_sampler_view_destroy(struct pipe_context *ctx,
 125                                struct pipe_sampler_view *state)
 126 {
 127         struct r600_pipe_sampler_view *resource = (struct r600_pipe_sampler_view *)state;
 128
 129         pipe_resource_reference(&state->texture, NULL);
 130         FREE(resource);
 131 }
 132
 133 void r600_bind_state(struct pipe_context *ctx, void *state)
 134 {
 135         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 136         struct r600_pipe_state *rstate = (struct r600_pipe_state *)state;
 137
 138         if (state == NULL)
 139                 return;
 140         rctx->states[rstate->id] = rstate;
 141         r600_context_pipe_state_set(&rctx->ctx, rstate);
 142 }
 143
 144 void r600_delete_state(struct pipe_context *ctx, void *state)
 145 {
 146         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 147         struct r600_pipe_state *rstate = (struct r600_pipe_state *)state;
 148
 149         if (rctx->states[rstate->id] == rstate) {
 150                 rctx->states[rstate->id] = NULL;
 151         }
 152         for (int i = 0; i < rstate->nregs; i++) {
 153                 r600_bo_reference(rctx->radeon, &rstate->regs[i].bo, NULL);
 154         }
 155         free(rstate);
 156 }
 157
 158 void r600_bind_vertex_elements(struct pipe_context *ctx, void *state)
 159 {
 160         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 161         struct r600_vertex_element *v = (struct r600_vertex_element*)state;
 162
 163         rctx->vertex_elements = v;
 164         if (v) {
 165                 u_vbuf_mgr_bind_vertex_elements(rctx->vbuf_mgr, state,
 166                                                 v->vmgr_elements);
 167
 168                 rctx->states[v->rstate.id] = &v->rstate;
 169                 r600_context_pipe_state_set(&rctx->ctx, &v->rstate);
 170         }
 171 }
 172
 173 void r600_delete_vertex_element(struct pipe_context *ctx, void *state)
 174 {
 175         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 176         struct r600_vertex_element *v = (struct r600_vertex_element*)state;
 177
 178         if (rctx->states[v->rstate.id] == &v->rstate) {
 179                 rctx->states[v->rstate.id] = NULL;
 180         }
 181         if (rctx->vertex_elements == state)
 182                 rctx->vertex_elements = NULL;
 183
 184         r600_bo_reference(rctx->radeon, &v->fetch_shader, NULL);
 185         u_vbuf_mgr_destroy_vertex_elements(rctx->vbuf_mgr, v->vmgr_elements);
 186         FREE(state);
 187 }
 188
 189
 190 void r600_set_index_buffer(struct pipe_context *ctx,
 191                            const struct pipe_index_buffer *ib)
 192 {
 193         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 194
 195         if (ib) {
 196                 pipe_resource_reference(&rctx->index_buffer.buffer, ib->buffer);
 197                 memcpy(&rctx->index_buffer, ib, sizeof(rctx->index_buffer));
 198         } else {
 199                 pipe_resource_reference(&rctx->index_buffer.buffer, NULL);
 200                 memset(&rctx->index_buffer, 0, sizeof(rctx->index_buffer));
 201         }
 202
 203         /* TODO make this more like a state */
 204 }
 205
 206 void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
 207                              const struct pipe_vertex_buffer *buffers)
 208 {
 209         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 210         int i;
 211
 212         /* Zero states. */
 213         for (i = 0; i < count; i++) {
 214                 if (!buffers[i].buffer) {
 215                         if (rctx->family >= CHIP_CEDAR) {
 216                                 evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 217                         } else {
 218                                 r600_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 219                         }
 220                 }
 221         }
 222         for (; i < rctx->vbuf_mgr->nr_real_vertex_buffers; i++) {
 223                 if (rctx->family >= CHIP_CEDAR) {
 224                         evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 225                 } else {
 226                         r600_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
 227                 }
 228         }
 229
 230         u_vbuf_mgr_set_vertex_buffers(rctx->vbuf_mgr, count, buffers);
 231 }
 232
 233 void *r600_create_vertex_elements(struct pipe_context *ctx,
 234                                   unsigned count,
 235                                   const struct pipe_vertex_element *elements)
 236 {
 237         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 238         struct r600_vertex_element *v = CALLOC_STRUCT(r600_vertex_element);
 239
 240         assert(count < 32);
 241         if (!v)
 242                 return NULL;
 243
 244         v->count = count;
 245         v->vmgr_elements =
 246                 u_vbuf_mgr_create_vertex_elements(rctx->vbuf_mgr, count,
 247                                                   elements, v->elements);
 248
 249         if (r600_vertex_elements_build_fetch_shader(rctx, v)) {
 250                 FREE(v);
 251                 return NULL;
 252         }
 253
 254         return v;
 255 }
 256
 257 void *r600_create_shader_state(struct pipe_context *ctx,
 258                                const struct pipe_shader_state *state)
 259 {
 260         struct r600_pipe_shader *shader =  CALLOC_STRUCT(r600_pipe_shader);
 261         int r;
 262
 263         r =  r600_pipe_shader_create(ctx, shader, state->tokens);
 264         if (r) {
 265                 return NULL;
 266         }
 267         return shader;
 268 }
 269
 270 void r600_bind_ps_shader(struct pipe_context *ctx, void *state)
 271 {
 272         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 273
 274         /* TODO delete old shader */
 275         rctx->ps_shader = (struct r600_pipe_shader *)state;
 276         if (state) {
 277                 r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_shader->rstate);
 278         }
 279 }
 280
 281 void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
 282 {
 283         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 284
 285         /* TODO delete old shader */
 286         rctx->vs_shader = (struct r600_pipe_shader *)state;
 287         if (state) {
 288                 r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_shader->rstate);
 289         }
 290 }
 291
 292 void r600_delete_ps_shader(struct pipe_context *ctx, void *state)
 293 {
 294         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 295         struct r600_pipe_shader *shader = (struct r600_pipe_shader *)state;
 296
 297         if (rctx->ps_shader == shader) {
 298                 rctx->ps_shader = NULL;
 299         }
 300
 301         r600_pipe_shader_destroy(ctx, shader);
 302         free(shader);
 303 }
 304
 305 void r600_delete_vs_shader(struct pipe_context *ctx, void *state)
 306 {
 307         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 308         struct r600_pipe_shader *shader = (struct r600_pipe_shader *)state;
 309
 310         if (rctx->vs_shader == shader) {
 311                 rctx->vs_shader = NULL;
 312         }
 313
 314         r600_pipe_shader_destroy(ctx, shader);
 315         free(shader);
 316 }
 317
 318 /* FIXME optimize away spi update when it's not needed */
 319 static void r600_spi_update(struct r600_pipe_context *rctx, unsigned prim)
 320 {
 321         struct r600_pipe_shader *shader = rctx->ps_shader;
 322         struct r600_pipe_state rstate;
 323         struct r600_shader *rshader = &shader->shader;
 324         unsigned i, tmp;
 325
 326         rstate.nregs = 0;
 327         for (i = 0; i < rshader->ninput; i++) {
 328                 tmp = S_028644_SEMANTIC(r600_find_vs_semantic_index(&rctx->vs_shader->shader, rshader, i));
 329
 330                 if (rshader->input[i].name == TGSI_SEMANTIC_COLOR ||
 331                     rshader->input[i].name == TGSI_SEMANTIC_BCOLOR ||
 332                     rshader->input[i].name == TGSI_SEMANTIC_POSITION) {
 333                         tmp |= S_028644_FLAT_SHADE(rctx->flatshade);
 334                 }
 335
 336                 if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
 337                     rctx->sprite_coord_enable & (1 << rshader->input[i].sid)) {
 338                         tmp |= S_028644_PT_SPRITE_TEX(1);
 339                 }
 340
 341                 if (rctx->family < CHIP_CEDAR) {
 342                         if (rshader->input[i].centroid)
 343                                 tmp |= S_028644_SEL_CENTROID(1);
 344
 345                         if (rshader->input[i].interpolate == TGSI_INTERPOLATE_LINEAR)
 346                                 tmp |= S_028644_SEL_LINEAR(1);
 347                 }
 348
 349                 r600_pipe_state_add_reg(&rstate, R_028644_SPI_PS_INPUT_CNTL_0 + i * 4, tmp, 0xFFFFFFFF, NULL);
 350         }
 351
 352         if (prim == PIPE_PRIM_QUADS || prim == PIPE_PRIM_QUAD_STRIP || prim == PIPE_PRIM_POLYGON) {
 353                 r600_pipe_state_add_reg(&rstate, R_028814_PA_SU_SC_MODE_CNTL,
 354                                         S_028814_PROVOKING_VTX_LAST(1),
 355                                         S_028814_PROVOKING_VTX_LAST(1), NULL);
 356         }
 357         r600_context_pipe_state_set(&rctx->ctx, &rstate);
 358 }
 359
 360 void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
 361                               struct pipe_resource *buffer)
 362 {
 363         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 364         struct r600_resource_buffer *rbuffer = r600_buffer(buffer);
 365         struct r600_pipe_state *rstate;
 366         uint32_t offset;
 367
 368         /* Note that the state tracker can unbind constant buffers by
 369          * passing NULL here.
 370          */
 371         if (buffer == NULL) {
 372                 return;
 373         }
 374
 375         r600_upload_const_buffer(rctx, &rbuffer, &offset);
 376         offset += r600_bo_offset(rbuffer->r.bo);
 377
 378         switch (shader) {
 379         case PIPE_SHADER_VERTEX:
 380                 rctx->vs_const_buffer.nregs = 0;
 381                 r600_pipe_state_add_reg(&rctx->vs_const_buffer,
 382                                         R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
 383                                         ALIGN_DIVUP(buffer->width0 >> 4, 16),
 384                                         0xFFFFFFFF, NULL);
 385                 r600_pipe_state_add_reg(&rctx->vs_const_buffer,
 386                                         R_028980_ALU_CONST_CACHE_VS_0,
 387                                         offset >> 8, 0xFFFFFFFF, rbuffer->r.bo);
 388                 r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_const_buffer);
 389
 390                 rstate = &rctx->vs_const_buffer_resource[index];
 391                 rstate->id = R600_PIPE_STATE_RESOURCE;
 392                 rstate->nregs = 0;
 393                 if (rctx->family >= CHIP_CEDAR) {
 394                         evergreen_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 395                         evergreen_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
 396                 } else {
 397                         r600_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 398                         r600_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
 399                 }
 400                 break;
 401         case PIPE_SHADER_FRAGMENT:
 402                 rctx->ps_const_buffer.nregs = 0;
 403                 r600_pipe_state_add_reg(&rctx->ps_const_buffer,
 404                                         R_028140_ALU_CONST_BUFFER_SIZE_PS_0,
 405                                         ALIGN_DIVUP(buffer->width0 >> 4, 16),
 406                                         0xFFFFFFFF, NULL);
 407                 r600_pipe_state_add_reg(&rctx->ps_const_buffer,
 408                                         R_028940_ALU_CONST_CACHE_PS_0,
 409                                         offset >> 8, 0xFFFFFFFF, rbuffer->r.bo);
 410                 r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_const_buffer);
 411
 412                 rstate = &rctx->ps_const_buffer_resource[index];
 413                 rstate->id = R600_PIPE_STATE_RESOURCE;
 414                 rstate->nregs = 0;
 415                 if (rctx->family >= CHIP_CEDAR) {
 416                         evergreen_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 417                         evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
 418                 } else {
 419                         r600_pipe_set_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16);
 420                         r600_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
 421                 }
 422                 break;
 423         default:
 424                 R600_ERR("unsupported %d\n", shader);
 425                 return;
 426         }
 427
 428         if (buffer != &rbuffer->r.b.b.b)
 429                 pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
 430 }
 431
 432 static void r600_vertex_buffer_update(struct r600_pipe_context *rctx)
 433 {
 434         struct r600_pipe_state *rstate;
 435         struct r600_resource *rbuffer;
 436         struct pipe_vertex_buffer *vertex_buffer;
 437         unsigned i, count, offset;
 438
 439         if (rctx->vertex_elements->vbuffer_need_offset) {
 440                 /* one resource per vertex elements */
 441                 count = rctx->vertex_elements->count;
 442         } else {
 443                 /* bind vertex buffer once */
 444                 count = rctx->vbuf_mgr->nr_real_vertex_buffers;
 445         }
 446
 447         for (i = 0 ; i < count; i++) {
 448                 rstate = &rctx->fs_resource[i];
 449                 rstate->id = R600_PIPE_STATE_RESOURCE;
 450                 rstate->nregs = 0;
 451
 452                 if (rctx->vertex_elements->vbuffer_need_offset) {
 453                         /* one resource per vertex elements */
 454                         unsigned vbuffer_index;
 455                         vbuffer_index = rctx->vertex_elements->elements[i].vertex_buffer_index;
 456                         vertex_buffer = &rctx->vbuf_mgr->vertex_buffer[vbuffer_index];
 457                         rbuffer = (struct r600_resource*)rctx->vbuf_mgr->real_vertex_buffer[vbuffer_index];
 458                         offset = rctx->vertex_elements->vbuffer_offset[i];
 459                 } else {
 460                         /* bind vertex buffer once */
 461                         vertex_buffer = &rctx->vbuf_mgr->vertex_buffer[i];
 462                         rbuffer = (struct r600_resource*)rctx->vbuf_mgr->real_vertex_buffer[i];
 463                         offset = 0;
 464                 }
 465                 if (vertex_buffer == NULL || rbuffer == NULL)
 466                         continue;
 467                 offset += vertex_buffer->buffer_offset + r600_bo_offset(rbuffer->bo);
 468
 469                 if (rctx->family >= CHIP_CEDAR) {
 470                         evergreen_pipe_set_buffer_resource(rctx, rstate, rbuffer, offset, vertex_buffer->stride);
 471                         evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, rstate, i);
 472                 } else {
 473                         r600_pipe_set_buffer_resource(rctx, rstate, rbuffer, offset, vertex_buffer->stride);
 474                         r600_context_pipe_state_set_fs_resource(&rctx->ctx, rstate, i);
 475                 }
 476         }
 477 }
 478
 479 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 480 {
 481         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 482         struct r600_resource *rbuffer;
 483         u32 vgt_dma_index_type, vgt_dma_swap_mode, vgt_draw_initiator, mask;
 484         struct r600_draw rdraw;
 485         struct r600_pipe_state vgt;
 486         struct r600_drawl draw = {};
 487         unsigned prim;
 488
 489         r600_flush_depth_textures(rctx);
 490         u_vbuf_mgr_draw_begin(rctx->vbuf_mgr, info, NULL, NULL);
 491         r600_vertex_buffer_update(rctx);
 492
 493         draw.info = *info;
 494         draw.ctx = ctx;
 495         if (info->indexed && rctx->index_buffer.buffer) {
 496                 draw.info.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
 497                 pipe_resource_reference(&draw.index_buffer, rctx->index_buffer.buffer);
 498
 499                 r600_translate_index_buffer(rctx, &draw.index_buffer,
 500                                             &rctx->index_buffer.index_size,
 501                                             &draw.info.start,
 502                                             info->count);
 503
 504                 draw.index_size = rctx->index_buffer.index_size;
 505                 draw.index_buffer_offset = draw.info.start * draw.index_size;
 506                 draw.info.start = 0;
 507
 508                 if (u_vbuf_resource(draw.index_buffer)->user_ptr) {
 509                         r600_upload_index_buffer(rctx, &draw);
 510                 }
 511         } else {
 512                 draw.info.index_bias = info->start;
 513         }
 514
 515         vgt_dma_swap_mode = 0;
 516         switch (draw.index_size) {
 517         case 2:
 518                 vgt_draw_initiator = 0;
 519                 vgt_dma_index_type = 0;
 520 #ifdef PIPE_ARCH_BIG_ENDIAN
 521                 vgt_dma_swap_mode = ENDIAN_8IN16;
 522 #endif
 523                 break;
 524         case 4:
 525                 vgt_draw_initiator = 0;
 526                 vgt_dma_index_type = 1;
 527 #ifdef PIPE_ARCH_BIG_ENDIAN
 528                 vgt_dma_swap_mode = ENDIAN_8IN32;
 529 #endif
 530                 break;
 531         case 0:
 532                 vgt_draw_initiator = 2;
 533                 vgt_dma_index_type = 0;
 534                 break;
 535         default:
 536                 R600_ERR("unsupported index size %d\n", draw.index_size);
 537                 return;
 538         }
 539         if (r600_conv_pipe_prim(draw.info.mode, &prim))
 540                 return;
 541         if (unlikely(rctx->ps_shader == NULL)) {
 542                 R600_ERR("missing vertex shader\n");
 543                 return;
 544         }
 545         if (unlikely(rctx->vs_shader == NULL)) {
 546                 R600_ERR("missing vertex shader\n");
 547                 return;
 548         }
 549         /* there should be enough input */
 550         if (rctx->vertex_elements->count < rctx->vs_shader->shader.bc.nresource) {
 551                 R600_ERR("%d resources provided, expecting %d\n",
 552                         rctx->vertex_elements->count, rctx->vs_shader->shader.bc.nresource);
 553                 return;
 554         }
 555
 556         r600_spi_update(rctx, draw.info.mode);
 557
 558         mask = 0;
 559         for (int i = 0; i < rctx->framebuffer.nr_cbufs; i++) {
 560                 mask |= (0xF << (i * 4));
 561         }
 562
 563         vgt.id = R600_PIPE_STATE_VGT;
 564         vgt.nregs = 0;
 565         r600_pipe_state_add_reg(&vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, 0xFFFFFFFF, NULL);
 566         r600_pipe_state_add_reg(&vgt, R_028408_VGT_INDX_OFFSET, draw.info.index_bias, 0xFFFFFFFF, NULL);
 567         r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw.info.max_index, 0xFFFFFFFF, NULL);
 568         r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw.info.min_index, 0xFFFFFFFF, NULL);
 569         r600_pipe_state_add_reg(&vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL);
 570         r600_pipe_state_add_reg(&vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL);
 571         r600_pipe_state_add_reg(&vgt, R_03CFF4_SQ_VTX_START_INST_LOC, draw.info.start_instance, 0xFFFFFFFF, NULL);
 572         r600_context_pipe_state_set(&rctx->ctx, &vgt);
 573
 574         rdraw.vgt_num_indices = draw.info.count;
 575         rdraw.vgt_num_instances = draw.info.instance_count;
 576         rdraw.vgt_index_type = vgt_dma_index_type | (vgt_dma_swap_mode << 2);
 577         rdraw.vgt_draw_initiator = vgt_draw_initiator;
 578         rdraw.indices = NULL;
 579         if (draw.index_buffer) {
 580                 rbuffer = (struct r600_resource*)draw.index_buffer;
 581                 rdraw.indices = rbuffer->bo;
 582                 rdraw.indices_bo_offset = draw.index_buffer_offset;
 583         }
 584
 585         if (rctx->family >= CHIP_CEDAR) {
 586                 evergreen_context_draw(&rctx->ctx, &rdraw);
 587         } else {
 588                 r600_context_draw(&rctx->ctx, &rdraw);
 589         }
 590
 591         if (rctx->framebuffer.zsbuf)
 592         {
 593                 struct pipe_resource *tex = rctx->framebuffer.zsbuf->texture;
 594                 ((struct r600_resource_texture *)tex)->dirty_db = TRUE;
 595         }
 596
 597         pipe_resource_reference(&draw.index_buffer, NULL);
 598
 599         u_vbuf_mgr_draw_end(rctx->vbuf_mgr);
 600 }