2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include <pipe/p_screen.h>
28 #include <util/u_format.h>
29 #include <util/u_math.h>
30 #include <util/u_inlines.h>
31 #include <util/u_memory.h>
32 #include "state_tracker/drm_driver.h"
33 #include "r600_screen.h"
34 #include "r600_context.h"
35 #include "r600_resource.h"
38 extern struct u_resource_vtbl r600_texture_vtbl
;
40 static unsigned long r600_texture_get_offset(struct r600_resource_texture
*rtex
,
41 unsigned level
, unsigned zslice
,
44 unsigned long offset
= rtex
->offset
[level
];
46 switch (rtex
->resource
.base
.b
.target
) {
49 return offset
+ zslice
* rtex
->layer_size
[level
];
50 case PIPE_TEXTURE_CUBE
:
52 return offset
+ face
* rtex
->layer_size
[level
];
54 assert(zslice
== 0 && face
== 0);
59 static void r600_setup_miptree(struct r600_screen
*rscreen
, struct r600_resource_texture
*rtex
)
61 struct pipe_resource
*ptex
= &rtex
->resource
.base
.b
;
62 unsigned long w
, h
, pitch
, size
, layer_size
, i
, offset
;
64 rtex
->bpt
= util_format_get_blocksize(ptex
->format
);
65 for (i
= 0, offset
= 0; i
<= ptex
->last_level
; i
++) {
66 w
= u_minify(ptex
->width0
, i
);
67 h
= u_minify(ptex
->height0
, i
);
68 h
= util_next_power_of_two(h
);
69 pitch
= util_format_get_stride(ptex
->format
, align(w
, 64));
70 layer_size
= pitch
* h
;
71 if (ptex
->target
== PIPE_TEXTURE_CUBE
)
72 size
= layer_size
* 6;
74 size
= layer_size
* u_minify(ptex
->depth0
, i
);
75 rtex
->offset
[i
] = offset
;
76 rtex
->layer_size
[i
] = layer_size
;
77 rtex
->pitch
[i
] = pitch
;
83 struct pipe_resource
*r600_texture_create(struct pipe_screen
*screen
,
84 const struct pipe_resource
*templ
)
86 struct r600_resource_texture
*rtex
;
87 struct r600_resource
*resource
;
88 struct r600_screen
*rscreen
= r600_screen(screen
);
90 rtex
= CALLOC_STRUCT(r600_resource_texture
);
94 resource
= &rtex
->resource
;
95 resource
->base
.b
= *templ
;
96 resource
->base
.vtbl
= &r600_texture_vtbl
;
97 pipe_reference_init(&resource
->base
.b
.reference
, 1);
98 resource
->base
.b
.screen
= screen
;
99 r600_setup_miptree(rscreen
, rtex
);
101 /* FIXME alignment 4096 enought ? too much ? */
102 resource
->domain
= r600_domain_from_usage(resource
->base
.b
.bind
);
103 resource
->bo
= radeon_bo(rscreen
->rw
, 0, rtex
->size
, 4096, NULL
);
104 if (resource
->bo
== NULL
) {
109 return &resource
->base
.b
;
112 static void r600_texture_destroy(struct pipe_screen
*screen
,
113 struct pipe_resource
*ptex
)
115 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)ptex
;
116 struct r600_resource
*resource
= &rtex
->resource
;
117 struct r600_screen
*rscreen
= r600_screen(screen
);
120 radeon_bo_decref(rscreen
->rw
, resource
->bo
);
125 static struct pipe_surface
*r600_get_tex_surface(struct pipe_screen
*screen
,
126 struct pipe_resource
*texture
,
127 unsigned face
, unsigned level
,
128 unsigned zslice
, unsigned flags
)
130 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)texture
;
131 struct pipe_surface
*surface
= CALLOC_STRUCT(pipe_surface
);
132 unsigned long offset
;
136 offset
= r600_texture_get_offset(rtex
, level
, zslice
, face
);
137 pipe_reference_init(&surface
->reference
, 1);
138 pipe_resource_reference(&surface
->texture
, texture
);
139 surface
->format
= texture
->format
;
140 surface
->width
= u_minify(texture
->width0
, level
);
141 surface
->height
= u_minify(texture
->height0
, level
);
142 surface
->offset
= offset
;
143 surface
->usage
= flags
;
144 surface
->zslice
= zslice
;
145 surface
->texture
= texture
;
146 surface
->face
= face
;
147 surface
->level
= level
;
151 static void r600_tex_surface_destroy(struct pipe_surface
*surface
)
153 pipe_resource_reference(&surface
->texture
, NULL
);
157 struct pipe_resource
*r600_texture_from_handle(struct pipe_screen
*screen
,
158 const struct pipe_resource
*templ
,
159 struct winsys_handle
*whandle
)
161 struct radeon
*rw
= (struct radeon
*)screen
->winsys
;
162 struct r600_resource_texture
*rtex
;
163 struct r600_resource
*resource
;
164 struct radeon_bo
*bo
= NULL
;
166 bo
= radeon_bo(rw
, whandle
->handle
, 0, 0, NULL
);
171 /* Support only 2D textures without mipmaps */
172 if (templ
->target
!= PIPE_TEXTURE_2D
|| templ
->depth0
!= 1 || templ
->last_level
!= 0)
175 rtex
= CALLOC_STRUCT(r600_resource_texture
);
179 resource
= &rtex
->resource
;
180 resource
->base
.b
= *templ
;
181 resource
->base
.vtbl
= &r600_texture_vtbl
;
182 pipe_reference_init(&resource
->base
.b
.reference
, 1);
183 resource
->base
.b
.screen
= screen
;
185 rtex
->pitch_override
= whandle
->stride
;
186 rtex
->bpt
= util_format_get_blocksize(templ
->format
);
187 rtex
->pitch
[0] = whandle
->stride
;
189 rtex
->size
= align(rtex
->pitch
[0] * templ
->height0
, 64);
191 return &resource
->base
.b
;
194 static unsigned int r600_texture_is_referenced(struct pipe_context
*context
,
195 struct pipe_resource
*texture
,
196 unsigned face
, unsigned level
)
199 return PIPE_REFERENCED_FOR_READ
| PIPE_REFERENCED_FOR_WRITE
;
202 struct pipe_transfer
* r600_texture_get_transfer(struct pipe_context
*ctx
,
203 struct pipe_resource
*texture
,
204 struct pipe_subresource sr
,
206 const struct pipe_box
*box
)
208 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)texture
;
209 struct r600_transfer
*trans
;
211 trans
= CALLOC_STRUCT(r600_transfer
);
214 pipe_resource_reference(&trans
->transfer
.resource
, texture
);
215 trans
->transfer
.sr
= sr
;
216 trans
->transfer
.usage
= usage
;
217 trans
->transfer
.box
= *box
;
218 trans
->transfer
.stride
= rtex
->pitch
[sr
.level
];
219 trans
->offset
= r600_texture_get_offset(rtex
, sr
.level
, box
->z
, sr
.face
);
220 return &trans
->transfer
;
223 void r600_texture_transfer_destroy(struct pipe_context
*ctx
,
224 struct pipe_transfer
*trans
)
226 pipe_resource_reference(&trans
->resource
, NULL
);
230 void* r600_texture_transfer_map(struct pipe_context
*ctx
,
231 struct pipe_transfer
* transfer
)
233 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
234 struct r600_resource
*resource
;
235 enum pipe_format format
= transfer
->resource
->format
;
236 struct r600_screen
*rscreen
= r600_screen(ctx
->screen
);
239 r600_flush(ctx
, 0, NULL
);
241 resource
= (struct r600_resource
*)transfer
->resource
;
242 if (radeon_bo_map(rscreen
->rw
, resource
->bo
)) {
245 radeon_bo_wait(rscreen
->rw
, resource
->bo
);
247 map
= resource
->bo
->data
;
249 return map
+ rtransfer
->offset
+
250 transfer
->box
.y
/ util_format_get_blockheight(format
) * transfer
->stride
+
251 transfer
->box
.x
/ util_format_get_blockwidth(format
) * util_format_get_blocksize(format
);
254 void r600_texture_transfer_unmap(struct pipe_context
*ctx
,
255 struct pipe_transfer
* transfer
)
257 struct r600_screen
*rscreen
= r600_screen(ctx
->screen
);
258 struct r600_resource
*resource
;
260 resource
= (struct r600_resource
*)transfer
->resource
;
261 radeon_bo_unmap(rscreen
->rw
, resource
->bo
);
264 struct u_resource_vtbl r600_texture_vtbl
=
266 u_default_resource_get_handle
, /* get_handle */
267 r600_texture_destroy
, /* resource_destroy */
268 r600_texture_is_referenced
, /* is_resource_referenced */
269 r600_texture_get_transfer
, /* get_transfer */
270 r600_texture_transfer_destroy
, /* transfer_destroy */
271 r600_texture_transfer_map
, /* transfer_map */
272 u_default_transfer_flush_region
,/* transfer_flush_region */
273 r600_texture_transfer_unmap
, /* transfer_unmap */
274 u_default_transfer_inline_write
/* transfer_inline_write */
277 void r600_init_screen_texture_functions(struct pipe_screen
*screen
)
279 screen
->get_tex_surface
= r600_get_tex_surface
;
280 screen
->tex_surface_destroy
= r600_tex_surface_destroy
;
283 static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format
,
284 const unsigned char *swizzle_view
)
287 unsigned char swizzle
[4];
289 const uint32_t swizzle_shift
[4] = {
292 const uint32_t swizzle_bit
[4] = {
297 /* Combine two sets of swizzles. */
298 for (i
= 0; i
< 4; i
++) {
299 swizzle
[i
] = swizzle_view
[i
] <= UTIL_FORMAT_SWIZZLE_W
?
300 swizzle_format
[swizzle_view
[i
]] : swizzle_view
[i
];
303 memcpy(swizzle
, swizzle_format
, 4);
307 for (i
= 0; i
< 4; i
++) {
308 switch (swizzle
[i
]) {
309 case UTIL_FORMAT_SWIZZLE_Y
:
310 result
|= swizzle_bit
[1] << swizzle_shift
[i
];
312 case UTIL_FORMAT_SWIZZLE_Z
:
313 result
|= swizzle_bit
[2] << swizzle_shift
[i
];
315 case UTIL_FORMAT_SWIZZLE_W
:
316 result
|= swizzle_bit
[3] << swizzle_shift
[i
];
318 case UTIL_FORMAT_SWIZZLE_0
:
319 result
|= V_038010_SQ_SEL_0
<< swizzle_shift
[i
];
321 case UTIL_FORMAT_SWIZZLE_1
:
322 result
|= V_038010_SQ_SEL_1
<< swizzle_shift
[i
];
324 default: /* UTIL_FORMAT_SWIZZLE_X */
325 result
|= swizzle_bit
[0] << swizzle_shift
[i
];
331 /* texture format translate */
332 uint32_t r600_translate_texformat(enum pipe_format format
,
333 const unsigned char *swizzle_view
,
334 uint32_t *word4_p
, uint32_t *yuv_format_p
)
336 uint32_t result
= 0, word4
= 0, yuv_format
= 0;
337 const struct util_format_description
*desc
;
338 boolean uniform
= TRUE
;
340 const uint32_t sign_bit
[4] = {
341 S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED
),
342 S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED
),
343 S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED
),
344 S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED
)
346 desc
= util_format_description(format
);
348 /* Colorspace (return non-RGB formats directly). */
349 switch (desc
->colorspace
) {
350 /* Depth stencil formats */
351 case UTIL_FORMAT_COLORSPACE_ZS
:
353 case PIPE_FORMAT_Z16_UNORM
:
354 result
= V_028010_DEPTH_16
;
356 case PIPE_FORMAT_Z24X8_UNORM
:
357 result
= V_028010_DEPTH_X8_24
;
359 case PIPE_FORMAT_Z24_UNORM_S8_USCALED
:
360 result
= V_028010_DEPTH_8_24
;
366 case UTIL_FORMAT_COLORSPACE_YUV
:
367 yuv_format
|= (1 << 30);
369 case PIPE_FORMAT_UYVY
:
370 case PIPE_FORMAT_YUYV
:
374 goto out_unknown
; /* TODO */
376 case UTIL_FORMAT_COLORSPACE_SRGB
:
377 word4
|= S_038010_FORCE_DEGAMMA(1);
378 if (format
== PIPE_FORMAT_L8A8_SRGB
|| format
== PIPE_FORMAT_L8_SRGB
)
379 goto out_unknown
; /* fails for some reason - TODO */
386 word4
|= r600_get_swizzle_combined(desc
->swizzle
, swizzle_view
);
388 /* S3TC formats. TODO */
389 if (desc
->layout
== UTIL_FORMAT_LAYOUT_S3TC
) {
394 for (i
= 0; i
< desc
->nr_channels
; i
++) {
395 if (desc
->channel
[i
].type
== UTIL_FORMAT_TYPE_SIGNED
) {
396 word4
|= sign_bit
[i
];
400 /* R8G8Bx_SNORM - TODO CxV8U8 */
404 /* See whether the components are of the same size. */
405 for (i
= 1; i
< desc
->nr_channels
; i
++) {
406 uniform
= uniform
&& desc
->channel
[0].size
== desc
->channel
[i
].size
;
409 /* Non-uniform formats. */
411 switch(desc
->nr_channels
) {
413 if (desc
->channel
[0].size
== 5 &&
414 desc
->channel
[1].size
== 6 &&
415 desc
->channel
[2].size
== 5) {
416 result
|= V_0280A0_COLOR_5_6_5
;
421 if (desc
->channel
[0].size
== 5 &&
422 desc
->channel
[1].size
== 5 &&
423 desc
->channel
[2].size
== 5 &&
424 desc
->channel
[3].size
== 1) {
425 result
|= V_0280A0_COLOR_1_5_5_5
;
428 if (desc
->channel
[0].size
== 10 &&
429 desc
->channel
[1].size
== 10 &&
430 desc
->channel
[2].size
== 10 &&
431 desc
->channel
[3].size
== 2) {
432 result
|= V_0280A0_COLOR_10_10_10_2
;
440 /* uniform formats */
441 switch (desc
->channel
[0].type
) {
442 case UTIL_FORMAT_TYPE_UNSIGNED
:
443 case UTIL_FORMAT_TYPE_SIGNED
:
444 if (!desc
->channel
[0].normalized
&&
445 desc
->colorspace
!= UTIL_FORMAT_COLORSPACE_SRGB
) {
449 switch (desc
->channel
[0].size
) {
451 switch (desc
->nr_channels
) {
453 result
|= V_0280A0_COLOR_4_4
;
456 result
|= V_0280A0_COLOR_4_4_4_4
;
461 switch (desc
->nr_channels
) {
463 result
|= V_0280A0_COLOR_8
;
466 result
|= V_0280A0_COLOR_8_8
;
469 result
|= V_0280A0_COLOR_8_8_8_8
;
474 switch (desc
->nr_channels
) {
476 result
|= V_0280A0_COLOR_16
;
479 result
|= V_0280A0_COLOR_16_16
;
482 result
|= V_0280A0_COLOR_16_16_16_16
;
488 case UTIL_FORMAT_TYPE_FLOAT
:
489 switch (desc
->channel
[0].size
) {
491 switch (desc
->nr_channels
) {
493 result
|= V_0280A0_COLOR_16_FLOAT
;
496 result
|= V_0280A0_COLOR_16_16_FLOAT
;
499 result
|= V_0280A0_COLOR_16_16_16_16_FLOAT
;
504 switch (desc
->nr_channels
) {
506 result
|= V_0280A0_COLOR_32_FLOAT
;
509 result
|= V_0280A0_COLOR_32_32_FLOAT
;
512 result
|= V_0280A0_COLOR_32_32_32_32_FLOAT
;
522 *yuv_format_p
= yuv_format
;
523 // fprintf(stderr,"returning %08x %08x %08x\n", result, word4, yuv_format);
526 // R600_ERR("Unable to handle texformat %d %s\n", format, util_format_name(format));