2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include <pipe/p_screen.h>
28 #include <util/u_format.h>
29 #include <util/u_math.h>
30 #include <util/u_inlines.h>
31 #include <util/u_memory.h>
32 #include "state_tracker/drm_driver.h"
33 #include "r600_screen.h"
34 #include "r600_context.h"
35 #include "r600_resource.h"
38 extern struct u_resource_vtbl r600_texture_vtbl
;
40 /* Copy from a tiled texture to a detiled one. */
41 static void r600_copy_from_tiled_texture(struct pipe_context
*ctx
, struct r600_transfer
*rtransfer
)
43 struct pipe_transfer
*transfer
= (struct pipe_transfer
*)rtransfer
;
44 struct pipe_resource
*texture
= transfer
->resource
;
45 struct pipe_subresource subdst
;
49 ctx
->resource_copy_region(ctx
, rtransfer
->linear_texture
,
50 subdst
, 0, 0, 0, texture
, transfer
->sr
,
51 transfer
->box
.x
, transfer
->box
.y
, transfer
->box
.z
,
52 transfer
->box
.width
, transfer
->box
.height
);
55 static unsigned long r600_texture_get_offset(struct r600_resource_texture
*rtex
,
56 unsigned level
, unsigned zslice
,
59 unsigned long offset
= rtex
->offset
[level
];
61 switch (rtex
->resource
.base
.b
.target
) {
64 return offset
+ zslice
* rtex
->layer_size
[level
];
65 case PIPE_TEXTURE_CUBE
:
67 return offset
+ face
* rtex
->layer_size
[level
];
69 assert(zslice
== 0 && face
== 0);
74 static void r600_setup_miptree(struct r600_screen
*rscreen
, struct r600_resource_texture
*rtex
)
76 struct pipe_resource
*ptex
= &rtex
->resource
.base
.b
;
77 unsigned long w
, h
, pitch
, size
, layer_size
, i
, offset
;
79 rtex
->bpt
= util_format_get_blocksize(ptex
->format
);
80 for (i
= 0, offset
= 0; i
<= ptex
->last_level
; i
++) {
81 w
= u_minify(ptex
->width0
, i
);
82 h
= u_minify(ptex
->height0
, i
);
83 h
= util_next_power_of_two(h
);
84 pitch
= util_format_get_stride(ptex
->format
, align(w
, 64));
85 pitch
= align(pitch
, 256);
86 layer_size
= pitch
* h
;
87 if (ptex
->target
== PIPE_TEXTURE_CUBE
)
88 size
= layer_size
* 6;
90 size
= layer_size
* u_minify(ptex
->depth0
, i
);
91 rtex
->offset
[i
] = offset
;
92 rtex
->layer_size
[i
] = layer_size
;
93 rtex
->pitch
[i
] = pitch
;
99 struct pipe_resource
*r600_texture_create(struct pipe_screen
*screen
,
100 const struct pipe_resource
*templ
)
102 struct r600_resource_texture
*rtex
;
103 struct r600_resource
*resource
;
104 struct r600_screen
*rscreen
= r600_screen(screen
);
106 rtex
= CALLOC_STRUCT(r600_resource_texture
);
110 resource
= &rtex
->resource
;
111 resource
->base
.b
= *templ
;
112 resource
->base
.vtbl
= &r600_texture_vtbl
;
113 pipe_reference_init(&resource
->base
.b
.reference
, 1);
114 resource
->base
.b
.screen
= screen
;
115 r600_setup_miptree(rscreen
, rtex
);
117 /* FIXME alignment 4096 enought ? too much ? */
118 resource
->domain
= r600_domain_from_usage(resource
->base
.b
.bind
);
119 resource
->bo
= radeon_bo(rscreen
->rw
, 0, rtex
->size
, 4096, NULL
);
120 if (resource
->bo
== NULL
) {
124 return &resource
->base
.b
;
127 static void r600_texture_destroy(struct pipe_screen
*screen
,
128 struct pipe_resource
*ptex
)
130 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)ptex
;
131 struct r600_resource
*resource
= &rtex
->resource
;
132 struct r600_screen
*rscreen
= r600_screen(screen
);
135 radeon_bo_decref(rscreen
->rw
, resource
->bo
);
140 static struct pipe_surface
*r600_get_tex_surface(struct pipe_screen
*screen
,
141 struct pipe_resource
*texture
,
142 unsigned face
, unsigned level
,
143 unsigned zslice
, unsigned flags
)
145 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)texture
;
146 struct pipe_surface
*surface
= CALLOC_STRUCT(pipe_surface
);
147 unsigned long offset
;
151 offset
= r600_texture_get_offset(rtex
, level
, zslice
, face
);
152 pipe_reference_init(&surface
->reference
, 1);
153 pipe_resource_reference(&surface
->texture
, texture
);
154 surface
->format
= texture
->format
;
155 surface
->width
= u_minify(texture
->width0
, level
);
156 surface
->height
= u_minify(texture
->height0
, level
);
157 surface
->offset
= offset
;
158 surface
->usage
= flags
;
159 surface
->zslice
= zslice
;
160 surface
->texture
= texture
;
161 surface
->face
= face
;
162 surface
->level
= level
;
166 static void r600_tex_surface_destroy(struct pipe_surface
*surface
)
168 pipe_resource_reference(&surface
->texture
, NULL
);
172 struct pipe_resource
*r600_texture_from_handle(struct pipe_screen
*screen
,
173 const struct pipe_resource
*templ
,
174 struct winsys_handle
*whandle
)
176 struct radeon
*rw
= (struct radeon
*)screen
->winsys
;
177 struct r600_resource_texture
*rtex
;
178 struct r600_resource
*resource
;
179 struct radeon_bo
*bo
= NULL
;
181 bo
= radeon_bo(rw
, whandle
->handle
, 0, 0, NULL
);
186 /* Support only 2D textures without mipmaps */
187 if ((templ
->target
!= PIPE_TEXTURE_2D
&& templ
->target
!= PIPE_TEXTURE_RECT
) ||
188 templ
->depth0
!= 1 || templ
->last_level
!= 0)
191 rtex
= CALLOC_STRUCT(r600_resource_texture
);
195 resource
= &rtex
->resource
;
196 resource
->base
.b
= *templ
;
197 resource
->base
.vtbl
= &r600_texture_vtbl
;
198 pipe_reference_init(&resource
->base
.b
.reference
, 1);
199 resource
->base
.b
.screen
= screen
;
201 rtex
->pitch_override
= whandle
->stride
;
202 rtex
->bpt
= util_format_get_blocksize(templ
->format
);
203 rtex
->pitch
[0] = whandle
->stride
;
205 rtex
->size
= align(rtex
->pitch
[0] * templ
->height0
, 64);
207 return &resource
->base
.b
;
210 static unsigned int r600_texture_is_referenced(struct pipe_context
*context
,
211 struct pipe_resource
*texture
,
212 unsigned face
, unsigned level
)
215 return PIPE_REFERENCED_FOR_READ
| PIPE_REFERENCED_FOR_WRITE
;
218 struct pipe_transfer
* r600_texture_get_transfer(struct pipe_context
*ctx
,
219 struct pipe_resource
*texture
,
220 struct pipe_subresource sr
,
222 const struct pipe_box
*box
)
224 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)texture
;
225 struct pipe_resource resource
;
226 struct r600_transfer
*trans
;
228 trans
= CALLOC_STRUCT(r600_transfer
);
231 pipe_resource_reference(&trans
->transfer
.resource
, texture
);
232 trans
->transfer
.sr
= sr
;
233 trans
->transfer
.usage
= usage
;
234 trans
->transfer
.box
= *box
;
235 trans
->transfer
.stride
= rtex
->pitch
[sr
.level
];
236 trans
->offset
= r600_texture_get_offset(rtex
, sr
.level
, box
->z
, sr
.face
);
238 resource
.target
= PIPE_TEXTURE_2D
;
239 resource
.format
= texture
->format
;
240 resource
.width0
= box
->width
;
241 resource
.height0
= box
->height
;
243 resource
.last_level
= 0;
244 resource
.nr_samples
= 0;
245 resource
.usage
= PIPE_USAGE_DYNAMIC
;
248 /* For texture reading, the temporary (detiled) texture is used as
249 * a render target when blitting from a tiled texture. */
250 if (usage
& PIPE_TRANSFER_READ
) {
251 resource
.bind
|= PIPE_BIND_RENDER_TARGET
;
253 /* For texture writing, the temporary texture is used as a sampler
254 * when blitting into a tiled texture. */
255 if (usage
& PIPE_TRANSFER_WRITE
) {
256 resource
.bind
|= PIPE_BIND_SAMPLER_VIEW
;
258 /* Create the temporary texture. */
259 trans
->linear_texture
= ctx
->screen
->resource_create(ctx
->screen
, &resource
);
260 if (trans
->linear_texture
== NULL
) {
261 R600_ERR("failed to create temporary texture to hold untiled copy\n");
262 pipe_resource_reference(&trans
->transfer
.resource
, NULL
);
266 if (usage
& PIPE_TRANSFER_READ
) {
267 /* We cannot map a tiled texture directly because the data is
268 * in a different order, therefore we do detiling using a blit. */
269 r600_copy_from_tiled_texture(ctx
, trans
);
270 /* Always referenced in the blit. */
271 ctx
->flush(ctx
, 0, NULL
);
274 return &trans
->transfer
;
277 void r600_texture_transfer_destroy(struct pipe_context
*ctx
,
278 struct pipe_transfer
*transfer
)
280 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
282 if (rtransfer
->linear_texture
) {
283 pipe_resource_reference(&rtransfer
->linear_texture
, NULL
);
285 pipe_resource_reference(&transfer
->resource
, NULL
);
289 void* r600_texture_transfer_map(struct pipe_context
*ctx
,
290 struct pipe_transfer
* transfer
)
292 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
293 struct r600_resource
*resource
;
294 enum pipe_format format
= transfer
->resource
->format
;
295 struct r600_screen
*rscreen
= r600_screen(ctx
->screen
);
298 r600_flush(ctx
, 0, NULL
);
299 if (rtransfer
->linear_texture
) {
300 resource
= (struct r600_resource
*)rtransfer
->linear_texture
;
302 resource
= (struct r600_resource
*)transfer
->resource
;
304 if (radeon_bo_map(rscreen
->rw
, resource
->bo
)) {
307 radeon_bo_wait(rscreen
->rw
, resource
->bo
);
309 map
= resource
->bo
->data
;
310 if (rtransfer
->linear_texture
) {
314 return map
+ rtransfer
->offset
+
315 transfer
->box
.y
/ util_format_get_blockheight(format
) * transfer
->stride
+
316 transfer
->box
.x
/ util_format_get_blockwidth(format
) * util_format_get_blocksize(format
);
319 void r600_texture_transfer_unmap(struct pipe_context
*ctx
,
320 struct pipe_transfer
* transfer
)
322 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
323 struct r600_screen
*rscreen
= r600_screen(ctx
->screen
);
324 struct r600_resource
*resource
;
326 if (rtransfer
->linear_texture
) {
327 resource
= (struct r600_resource
*)rtransfer
->linear_texture
;
329 resource
= (struct r600_resource
*)transfer
->resource
;
331 radeon_bo_unmap(rscreen
->rw
, resource
->bo
);
334 struct u_resource_vtbl r600_texture_vtbl
=
336 u_default_resource_get_handle
, /* get_handle */
337 r600_texture_destroy
, /* resource_destroy */
338 r600_texture_is_referenced
, /* is_resource_referenced */
339 r600_texture_get_transfer
, /* get_transfer */
340 r600_texture_transfer_destroy
, /* transfer_destroy */
341 r600_texture_transfer_map
, /* transfer_map */
342 u_default_transfer_flush_region
,/* transfer_flush_region */
343 r600_texture_transfer_unmap
, /* transfer_unmap */
344 u_default_transfer_inline_write
/* transfer_inline_write */
347 void r600_init_screen_texture_functions(struct pipe_screen
*screen
)
349 screen
->get_tex_surface
= r600_get_tex_surface
;
350 screen
->tex_surface_destroy
= r600_tex_surface_destroy
;
353 static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format
,
354 const unsigned char *swizzle_view
)
357 unsigned char swizzle
[4];
359 const uint32_t swizzle_shift
[4] = {
362 const uint32_t swizzle_bit
[4] = {
367 /* Combine two sets of swizzles. */
368 for (i
= 0; i
< 4; i
++) {
369 swizzle
[i
] = swizzle_view
[i
] <= UTIL_FORMAT_SWIZZLE_W
?
370 swizzle_format
[swizzle_view
[i
]] : swizzle_view
[i
];
373 memcpy(swizzle
, swizzle_format
, 4);
377 for (i
= 0; i
< 4; i
++) {
378 switch (swizzle
[i
]) {
379 case UTIL_FORMAT_SWIZZLE_Y
:
380 result
|= swizzle_bit
[1] << swizzle_shift
[i
];
382 case UTIL_FORMAT_SWIZZLE_Z
:
383 result
|= swizzle_bit
[2] << swizzle_shift
[i
];
385 case UTIL_FORMAT_SWIZZLE_W
:
386 result
|= swizzle_bit
[3] << swizzle_shift
[i
];
388 case UTIL_FORMAT_SWIZZLE_0
:
389 result
|= V_038010_SQ_SEL_0
<< swizzle_shift
[i
];
391 case UTIL_FORMAT_SWIZZLE_1
:
392 result
|= V_038010_SQ_SEL_1
<< swizzle_shift
[i
];
394 default: /* UTIL_FORMAT_SWIZZLE_X */
395 result
|= swizzle_bit
[0] << swizzle_shift
[i
];
401 /* texture format translate */
402 uint32_t r600_translate_texformat(enum pipe_format format
,
403 const unsigned char *swizzle_view
,
404 uint32_t *word4_p
, uint32_t *yuv_format_p
)
406 uint32_t result
= 0, word4
= 0, yuv_format
= 0;
407 const struct util_format_description
*desc
;
408 boolean uniform
= TRUE
;
410 const uint32_t sign_bit
[4] = {
411 S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED
),
412 S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED
),
413 S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED
),
414 S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED
)
416 desc
= util_format_description(format
);
418 /* Colorspace (return non-RGB formats directly). */
419 switch (desc
->colorspace
) {
420 /* Depth stencil formats */
421 case UTIL_FORMAT_COLORSPACE_ZS
:
423 case PIPE_FORMAT_Z16_UNORM
:
424 result
= V_0280A0_COLOR_16
;
426 case PIPE_FORMAT_Z24X8_UNORM
:
427 result
= V_0280A0_COLOR_8_24
;
429 case PIPE_FORMAT_Z24_UNORM_S8_USCALED
:
430 result
= V_0280A0_COLOR_8_24
;
436 case UTIL_FORMAT_COLORSPACE_YUV
:
437 yuv_format
|= (1 << 30);
439 case PIPE_FORMAT_UYVY
:
440 case PIPE_FORMAT_YUYV
:
444 goto out_unknown
; /* TODO */
446 case UTIL_FORMAT_COLORSPACE_SRGB
:
447 word4
|= S_038010_FORCE_DEGAMMA(1);
448 if (format
== PIPE_FORMAT_L8A8_SRGB
|| format
== PIPE_FORMAT_L8_SRGB
)
449 goto out_unknown
; /* fails for some reason - TODO */
456 word4
|= r600_get_swizzle_combined(desc
->swizzle
, swizzle_view
);
458 /* S3TC formats. TODO */
459 if (desc
->layout
== UTIL_FORMAT_LAYOUT_S3TC
) {
464 for (i
= 0; i
< desc
->nr_channels
; i
++) {
465 if (desc
->channel
[i
].type
== UTIL_FORMAT_TYPE_SIGNED
) {
466 word4
|= sign_bit
[i
];
470 /* R8G8Bx_SNORM - TODO CxV8U8 */
474 /* See whether the components are of the same size. */
475 for (i
= 1; i
< desc
->nr_channels
; i
++) {
476 uniform
= uniform
&& desc
->channel
[0].size
== desc
->channel
[i
].size
;
479 /* Non-uniform formats. */
481 switch(desc
->nr_channels
) {
483 if (desc
->channel
[0].size
== 5 &&
484 desc
->channel
[1].size
== 6 &&
485 desc
->channel
[2].size
== 5) {
486 result
|= V_0280A0_COLOR_5_6_5
;
491 if (desc
->channel
[0].size
== 5 &&
492 desc
->channel
[1].size
== 5 &&
493 desc
->channel
[2].size
== 5 &&
494 desc
->channel
[3].size
== 1) {
495 result
|= V_0280A0_COLOR_1_5_5_5
;
498 if (desc
->channel
[0].size
== 10 &&
499 desc
->channel
[1].size
== 10 &&
500 desc
->channel
[2].size
== 10 &&
501 desc
->channel
[3].size
== 2) {
502 result
|= V_0280A0_COLOR_10_10_10_2
;
510 /* uniform formats */
511 switch (desc
->channel
[0].type
) {
512 case UTIL_FORMAT_TYPE_UNSIGNED
:
513 case UTIL_FORMAT_TYPE_SIGNED
:
514 if (!desc
->channel
[0].normalized
&&
515 desc
->colorspace
!= UTIL_FORMAT_COLORSPACE_SRGB
) {
519 switch (desc
->channel
[0].size
) {
521 switch (desc
->nr_channels
) {
523 result
|= V_0280A0_COLOR_4_4
;
526 result
|= V_0280A0_COLOR_4_4_4_4
;
531 switch (desc
->nr_channels
) {
533 result
|= V_0280A0_COLOR_8
;
536 result
|= V_0280A0_COLOR_8_8
;
539 result
|= V_0280A0_COLOR_8_8_8_8
;
544 switch (desc
->nr_channels
) {
546 result
|= V_0280A0_COLOR_16
;
549 result
|= V_0280A0_COLOR_16_16
;
552 result
|= V_0280A0_COLOR_16_16_16_16
;
558 case UTIL_FORMAT_TYPE_FLOAT
:
559 switch (desc
->channel
[0].size
) {
561 switch (desc
->nr_channels
) {
563 result
|= V_0280A0_COLOR_16_FLOAT
;
566 result
|= V_0280A0_COLOR_16_16_FLOAT
;
569 result
|= V_0280A0_COLOR_16_16_16_16_FLOAT
;
574 switch (desc
->nr_channels
) {
576 result
|= V_0280A0_COLOR_32_FLOAT
;
579 result
|= V_0280A0_COLOR_32_32_FLOAT
;
582 result
|= V_0280A0_COLOR_32_32_32_32_FLOAT
;
592 *yuv_format_p
= yuv_format
;
595 R600_ERR("Unable to handle texformat %d %s\n", format
, util_format_name(format
));